WO1999047972A1 - Dispositif d'affichage et dispositif de projection a cristaux liquides - Google Patents
Dispositif d'affichage et dispositif de projection a cristaux liquides Download PDFInfo
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- WO1999047972A1 WO1999047972A1 PCT/JP1999/001433 JP9901433W WO9947972A1 WO 1999047972 A1 WO1999047972 A1 WO 1999047972A1 JP 9901433 W JP9901433 W JP 9901433W WO 9947972 A1 WO9947972 A1 WO 9947972A1
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- liquid crystal
- light
- line
- crystal device
- capacitance
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Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133509—Filters, e.g. light shielding masks
- G02F1/133512—Light shielding layers, e.g. black matrix
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
Definitions
- Liquid crystal devices Liquid crystal devices, projection display devices and electronic equipment
- the present invention belongs to the technical field of an active matrix driving type liquid crystal device driven by a thin film transistor (hereinafter, referred to as TFT), and in particular, a liquid crystal having a light shielding film below a TFT used for a liquid crystal projector or the like. It belongs to the technical field of equipment.
- TFT thin film transistor
- a liquid crystal device of this type is used as a light knob in a liquid crystal projector or the like, in general, the projected light is incident from the side of the counter electrode that is opposite to the TF array with the liquid crystal layer interposed.
- the projected light impinges on a channel region composed of an a-Si (amorphous silicon) film or a p-Si (polysilicon) film of the TFT, a photocurrent is generated by a photoelectric conversion effect in this region.
- a light-shielding film made of a metal material such as Cr (chromium) or resin black is generally formed on the counter substrate at a position facing each TFT.
- This light-shielding film defines the opening area of each pixel (that is, the area through which the projected light is transmitted), and in addition to shading the p-Si layer of the TFT, improves the contrast and prevents color mixture of the color material. Plays a function.
- a regular Si-type or coplanar type a-Si or a top-gate structure ie, a structure in which a gate electrode is provided above a channel on a TFT array substrate
- p-Si TFT it is necessary to prevent a part of the projected light from returning to the TFT channel from the opposite side of the TFT array as return light by the projection optical system in the liquid crystal projector.
- the projection optical system It is also necessary to prevent some of the projected light that passes through the TFT array from returning to the TFT channel from the side of the TFT array.
- a TFT array made of quartz or the like is also provided at a position facing the TFT on the top (ie, under the TFT), for example, from an opaque high melting point metal.
- a liquid crystal device having a light-shielding film has been proposed.
- a signal is applied to the gate to make the TFT conductive so that the time during which the voltage is held at the pixel electrode is longer than the time during which the image signal is supplied to the pixel electrode.
- a storage capacitor is generally added to the pixel electrode so that the liquid crystal drive voltage can be applied for a sufficient time even if the duty ratio is small.
- a method in which a part of a capacitance line formed along a scanning line is configured as the other storage capacitance electrode has been generalized.
- liquid crystal devices there is a general demand for improved image quality, and for this reason, it is important to increase the driving frequency of the liquid crystal device.
- one of the storage capacitors i is used. Since the capacitance line including the capacitor line is formed of the same polysilicon film as that of the Zhao line, it is difficult to reduce the resistance as compared with a wiring made of a low-resistance metal film such as A1 such as a data line. For this reason, the resistance and the time constant of the capacitance line increase, and the potential of the capacitance line fluctuates due to the capacitance coupling with each data line in the capacitance line crossing under a plurality of data lines. There is a problem that image degradation occurs due to horizontal crosstalk or ghost.
- Such a horizontal crosstalk or ghost occurs when the driving frequency is increased as in a liquid crystal device of a type such as a so-called XGA or SXGA, because the time constant of the capacitance line becomes relatively large. It will be easier.
- a precharge signal of a predetermined level is supplied to the data line prior to the image signal so that mm of the image signal can be written with a small load on the data line. Since it is necessary to secure a certain amount of horizontal retrace period for charging, the image signal of a different voltage is given at a point near the end of the writing of each scanning line, The time until the fluctuation of the potential of the capacitance line due to the coupling becomes stable cannot be secured sufficiently. For this reason, there is a problem that it is difficult to prevent the above-mentioned horizontal crosstalk and ghost when performing precharge.
- the present invention has been made in view of the above-described problems, and has as its object to provide a liquid crystal device capable of displaying high-quality images with a relatively simple configuration using a storage capacitor and a light-shielding film.
- a first liquid crystal device of the present invention has a structure in which liquid crystal is sandwiched between a pair of substrates, and a plurality of pixels arranged in a matrix on one of the pair of substrates.
- An electrode a plurality of thin film transistors respectively driving the plurality of pixel electrodes, a plurality of data lines connected to the plurality of thin film transistors and intersecting each other, and A plurality of scanning lines, a plurality of capacitance lines extending in a direction intersecting the plurality of data lines alongside the plurality of scanning lines, respectively, and providing storage capacitances to the plurality of pixel electrodes, respectively.
- a first interlayer insulating film interposed between the film and the thin film transistor.
- the plurality of capacitance lines that respectively provide the storage capacitance to the plurality of pixel electrodes are arranged in a direction intersecting the plurality of data lines along with the plurality of scanning lines (that is, in the direction intersecting the plurality of data lines). (Parallel or substantially parallel to each scanning line).
- the plurality of light-shielding films extend in a direction intersecting the plurality of data lines (that is, parallel or substantially parallel to each scanning line), and at least a channel region of the plurality of thin film transistors is connected to one of the plurality of thin film transistors. It is provided on one side at a position to cover each as viewed from the opposite side.
- the channel region of the thin film transistor is shielded by the plurality of light-shielding films from the return light or the like incident from one side of the thin film transistor, so that the characteristic deterioration due to the return light or the like from the thin film transistor can be prevented.
- the plurality of light-shielding films are provided on one side at positions at least partially facing the plurality of capacitance lines, and one or more light-shielding films are provided in a direction intersecting the plurality of data lines.
- Each pixel is electrically connected to a plurality of capacitance lines. Therefore, the resistance of the capacitance line can be significantly reduced by the resistance of the plurality of light-shielding films.
- the capacitance line is formed of a polysilicon film and the plurality of light-shielding films are formed of a conductive refractory metal film
- the resistance of the capacitance line in the direction along the scanning line is determined by the resistance of the plurality of light-shielding films. Control. That is, the resistance of the capacitance line can be significantly reduced.
- the storage capacitance is provided to each of the plurality of pixel electrodes by the low-resistance capacitance line, even if the driving frequency of the liquid crystal device is increased, the data line and the capacitance line as in the above-described conventional example are not increased.
- the horizontal crosstalk and ghost caused by the fluctuation of the potential of the capacitance line due to the capacitance coupling are reduced, and high-quality image display can be performed. Even if the precharge method described above is adopted, the problem as in the example does not occur.
- the plurality of light-shielding films extend in a direction intersecting the data lines, respectively.
- the light-shielding films are formed of striped light-shielding films divided into a plurality in the direction along the data lines, for example, the opening of each pixel portion is formed.
- the laminated structure consisting of light-shielding film wiring, interlayer insulating film, polysilicon film, metal film, etc. Stress caused by heating and cooling during the manufacturing process due to differences in physical properties is remarkably reduced. For this reason, the occurrence of cracks in the light-shielding film and the like can be prevented and the yield can be improved.
- a redundant structure can be realized in which a plurality of light-shielding films substitute for the capacitance line even if the capacitance line is broken midway due to foreign matter or the like.
- the plurality of light-shielding films are not formed at positions facing the scanning lines except for positions covering the channel regions. According to this aspect, since little or no capacitance coupling occurs between each light-shielding film and each scanning line in practice, potential fluctuations in the scanning lines do not cause potential fluctuations in the light-shielding film. No potential fluctuation occurs in the capacitance line.
- a second liquid crystal device includes a pair of substrates in which liquid crystal is sandwiched, and a plurality of pixels arranged in a matrix on one of the pair of substrates.
- An electrode, a plurality of thin film transistors respectively driving the plurality of pixel electrodes, a plurality of data lines and a plurality of scanning lines connected to and intersecting with the plurality of thin film transistors, respectively, and the plurality of scanning lines A plurality of capacitance lines extending side by side in a direction intersecting the plurality of data lines and providing storage capacitance to the plurality of pixel electrodes, and a direction intersecting the plurality of data lines.
- the plurality of data A plurality of light-shielding films electrically connected to the plurality of capacitance lines for each of one or a plurality of pixels in a direction intersecting the lines, a first interlayer insulating film interposed between the plurality of light-shielding films and the thin film transistor And characterized in that:
- the plurality of capacitance lines that respectively provide the storage capacitors to the plurality of pixel electrodes include a plurality of ⁇ And extends in a direction intersecting a plurality of data lines.
- the plurality of light-shielding films extend in a direction intersecting with the plurality of data lines, respectively, at a position covering at least a channel region of the plurality of thin-film transistors as viewed from one side. It is provided on one side.
- the plurality of light-shielding films are electrically connected to the plurality of capacitance lines for each of one or a plurality of pixels in a direction intersecting the plurality of data lines. Therefore, the same operation and effect as those of the first liquid crystal device of the present invention described above can be obtained.
- the light-shielding film is provided on one side of the surface at least partially facing the scanning line. That is, at this position, the scanning line is formed on the light shielding film via the first interlayer insulating film which is much thicker than the gate insulating film constituting the thin film transistor, for example. Therefore, even if an abnormally shaped portion such as an unintended projection is formed on the light-shielding film in the process, the light-shielding film short-circuits with the scanning line due to the projection penetrating through the first interlayer insulating film. The possibility can be extremely reduced.
- the configuration of the second liquid crystal device of the present invention in which the light-shielding film is formed at a position facing the scanning line is as follows. Compared with the above-described first liquid crystal device of the present invention, it is more advantageous in improving the process yield.
- the capacitance line and the Zhao line are formed of the same conductive thin film, and are connected to the pixel electrode of the thin film transistor.
- the first storage capacitor extending from the semiconductor layer constituting the connected source or drain region and the capacitor line as the second storage capacitor electrode are the same as the gate insulating film of the thin-film transistor.
- the storage capacitance is provided by being opposed to each other via a dielectric film made of an insulating film.
- the capacitance line and the scanning line are formed of the same conductive thin film such as a polysilicon film, and the dielectric film of the storage capacitor and the gate insulating film of the thin film transistor are formed, for example, at a high temperature.
- the storage capacitor electrode which is made of the same insulating thin film such as a thermal oxide film and is disposed opposite to the capacitor line, is formed on a substrate because it is extended from a semiconductor layer such as a polysilicon film.
- Layer structure can be simplified, and the capacity can be Since both the line and the scanning line can be formed at the same time, or both the dielectric film and the gate insulating film can be formed at the same time, it is very advantageous in manufacturing.
- the plurality of light-shielding films are arranged opposite to the first storage capacitor 3 ⁇ 4 @ and the third storage capacitor via the first interlayer insulating film on the opposite side of the second storage capacitor electrode.
- the storage capacity may be further provided.
- the first interlayer insulating film is interposed between the capacitance line and the plurality of light shielding films; And the plurality of light-shielding films are electrically connected to the first interlayer insulating film via contact holes opened for each of the one or more pixels.
- the plurality of capacitance lines and the plurality of light-shielding films are connected to the first interlayer insulating film via the contact holes opened for each of the one or more pixels.
- a highly reliable electrical connection state can be realized between the two.
- the contact hole may be opened below the data line as viewed from the other substrate side of the pair of substrates.
- the contact hole is opened below the data line, that is, the contact hole is out of the opening area of the pixel portion, and the thin film transistor is close to the semiconductor layer of the thin film transistor. Since the one electrode of the extended storage capacitor is provided in the portion of the first interlayer insulating film where the one electrode is not formed, the pixel region can be effectively used.
- the contact holes may be configured such that a planar shape parallel to the one substrate is, for example, a perfect circle or an ellipse.
- an etching solution is formed at an interface between a plurality of light-shielding films and an adjacent film (that is, the first interlayer insulating film or the like). Can invade and cause cracks Performance can be reduced. That is, if a contact hole having a square plane ⁇ ⁇ is to be opened, the etching solution is particularly likely to penetrate into the corners and stress concentration tends to occur, so that cracks are likely to occur at these corners. .
- the plurality of light-shielding films further include: a first region formed by extending a plane parallel to the one substrate along the ⁇ line; And a second region extending along the data line.
- the contact hole may be formed in the second region.
- the capacitance line and the plurality of light shielding films are connected to a constant potential source.
- the light shielding films are set to the constant potential. Therefore, it is possible to prevent the potential fluctuation of the light-shielding film wiring from adversely affecting the thin-film transistor disposed to face the light-shielding film. Since the capacitance line is also set to a constant potential, it can function well as the storage capacitance 3 ⁇ 4i. In this case, the constant potential of the constant potential source may be, for example, equal to the ground potential.
- the constant potential source may be configured to be a constant potential source supplied to a peripheral circuit for driving the liquid crystal device.
- the constant potential source is a constant potential source such as a negative power supply or a positive power supply, which is supplied to peripheral circuits such as a driving circuit and a data transmission circuit.
- the light-shielding film and the capacitor line can be set at a constant potential without the need to provide a capacitor.
- a counter electrode may be formed at the other end of the pair of the counter electrodes, and the constant potential source may be configured to be a constant potential source supplied to the opposing movement.
- the constant potential source is a constant potential source, such as a negative power supply or a positive power supply, supplied to the opposite electrode, there is no need to provide a special potential wiring or an external circuit connection terminal, and the light shielding film is not required.
- the capacitance line can be set at a constant potential.
- the plurality of light-shielding films each include a capacitance line for forming a storage capacitance to be provided to an adjacent preceding or succeeding pixel. Is electrically connected to
- the plurality of light-shielding films are each provided with a capacitance line at its own stage, that is, a capacitance line for providing storage capacitance to the pixel electrode connected to the TFT where the channel region is located on the light-shielding film.
- a step is smaller than in the case where the pixel is electrically connected.
- an adjacent capacitance line, a preceding or subsequent capacitance line is adjacent to a capacitance line for forming a storage capacitance applied to a pixel electrode connected to a TFT in which a channel region is located on the light-shielding film. It means a capacitance line for providing a storage capacitance to a pixel electrode to be stored.
- each of the plurality of light-shielding films is electrically connected to the corresponding one of the capacitance lines.
- the step difference with respect to other regions where the pixel TFT, the capacitor line, and the light-shielding film are formed overlaps with the data line, but the capacitance is relatively easily formed by a contact hole or the like.
- the line and the light shielding film can be electrically connected.
- the semiconductor device further includes a second interlayer insulating film provided on the scanning line and below the data line, and a third interlayer insulating film provided on the data line and below the pixel 11.
- At least one of the first, second, and third interlayer insulating films is formed so that at least a portion facing the data line is depressed so as to face the liquid crystal of the third interlayer insulating film.
- the side to be formed may be flattened.
- at least one of the first, second, and third interlayer insulating films is formed so as to have a concave portion facing the data line. Steps with respect to other regions where the pixel TFT, the capacitor line, and the light shielding film are formed are reduced.
- the plurality of light-shielding films include Ti
- ribene and Pb (lead).
- the light-shielding film includes at least one of Ti, Cr, W, Ta, Mo, and Pb, which are opaque refractory metals. Since it is made of metal silicide, etc., it is possible to prevent the light-shielding film from being destroyed or melted by the high-temperature treatment in the TF forming process after the TFT array.
- the present invention provides a projection type including a light source, a liquid crystal light valve that receives light emitted from the light source, and performs modulation corresponding to image information, and a projection unit that projects light modulated by the liquid crystal light valve.
- the liquid crystal light valve includes: a liquid crystal device in which liquid crystal is sandwiched between a first substrate disposed on a light incident side and a second substrate disposed on a light exit side; and an outside of the first substrate.
- a plurality of light-shielding films electrically connected to the plurality of capacitance lines for each of one or a plurality of pixels, and a first interlayer insulating film interposed between the plurality of light-shielding films and the thin film transistors.
- a liquid crystal is interposed between a pair of substrates in order to solve the above problem.
- a plurality of pixel electrodes arranged in a matrix, a plurality of thin film transistors respectively driving the plurality of pixel electrodes, and a plurality of thin film transistors are arranged on one side of the pair of substrates.
- a plurality of data lines and a plurality of scanning lines which are connected to each other and cross each other, and the plurality of pixels! ⁇ , a capacitance line formed along the plurality of scanning lines to provide storage capacitance to each of the ⁇ , and a position covering at least a channel region of the plurality of thin film transistors as viewed from the one of the two sides.
- a conductive light-shielding film including a wiring portion extending along the line and electrically connected to the capacitance line; and a conductive light-shielding film interposed between the light-shielding film and the thin-film transistor. And a first interlayer insulating film.
- the light-shielding film is provided on one of the plurality of thin-film transistors at a position covering at least the channel region as viewed from the one of the substrates. Therefore, the channel region of the thin film transistor is shielded from the return light or the like incident from the other side by the light shielding film, so that the characteristic deterioration due to the return light or the like from the thin film transistor can be prevented.
- the capacitance line is formed along a plurality of scanning lines, and the capacitance line is electrically connected to a conductive light-shielding film including a wiring portion extending along the scanning line.
- the resistance of the capacitance line can be significantly reduced by the resistance of the conductive light shielding film.
- the capacitance line is formed of a polysilicon film and the light shielding film is formed of a conductive high melting point metal film, the resistance of the capacitance line in the direction along the scanning line can be controlled by the sheet resistance of the light shielding film. That is, the resistance of the capacitance line can be significantly reduced.
- the light-shielding film substitutes for the capacitor line, so that a redundant structure can be realized.
- the capacitance line and the scanning line are made of the same conductive thin film, and the capacitance line as one storage capacitor ⁇ and the thin film transistor are connected to each other.
- the other storage capacitor m @@, which is extended from the semiconductor layer portion, is opposed to the gate insulating film of the thin-film transistor via a dielectric film made of the same insulating thin film to form a storage capacitor. It is characterized by doing.
- the capacitor line and the s line are formed of the same conductive thin film such as a polysilicon film, for example, and the dielectric film of the storage capacitor and the gate insulating film of the thin film transistor are formed, for example, of a higher size.
- the storage capacitor electrode which is made of the same insulating thin film such as a film, and is arranged opposite to the capacitor line, extends from a semiconductor layer portion such as a polysilicon film.
- the first interlayer insulating film is interposed between the capacitance line and the light shielding film, and the capacitance line and the light shielding film are The connection is made through a contact hole formed in the first inter-layer insulating film. According to this aspect, since the capacitance line and the light shielding film are connected via the contact hole formed in the first interlayer insulating film, a reliable and highly reliable electric connection state is established between the two. realizable.
- the contact hole is formed for each pixel.
- the capacitance line and the light-shielding film are connected via the contact hole formed for each pixel, the resistance of the capacitance line can be reduced by the light-shielding film. , The degree of the redundant structure can be increased.
- the contact hole is formed for each pixel group including a plurality of pixels.
- the contact hole is opened below the data line as viewed from the other side of the pair of the opposite sides. I do.
- the contact hole is opened below the overnight line. That is, the contact hole is out of the pixel opening area, and the portion of the first interlayer insulating film where one electrode of the storage capacitor extending from the semiconductor layer of the thin film transistor is not formed. , The effective use of the pixel area can be achieved.
- the capacitance line and the light shielding film are connected to a constant potential source.
- the light shielding film is connected to the constant potential source, the light shielding film is set to the constant potential. Therefore, the potential fluctuation of the light-shielding film does not adversely affect the thin film transistor arranged opposite to the light-shielding film. Since the capacitance line is also set to a constant potential, it can function well as the storage capacitance ⁇ 1. In this case, the constant potential of the constant potential source may be, for example, equal to the ground potential.
- the constant potential source is a constant potential source supplied to a peripheral circuit for driving the liquid crystal device.
- the constant potential source is a constant potential source such as a negative power supply or a positive power supply, which is supplied to peripheral circuits such as a Zhao line drive circuit, a data mystery circuit, and a sampling circuit.
- the light-shielding film and the capacitor line can be kept at a constant potential without having to provide a potential wiring or an external circuit connector.
- an opposing S @ is formed on the other substrate of the pair of substrates, and the constant potential source is a constant potential source supplied to the opposing substrate. It is characterized by the following.
- the constant potential source is a constant potential source, such as a negative power supply or a positive power supply, supplied to the opposing cage. Therefore, there is no need to provide a special potential wiring or an external circuit connection, and the light shielding film is not required. And the capacitance line can be set at a constant potential.
- the self-capacitance line includes a wiring portion formed along each of the plurality of scanning lines, and the light-shielding film includes a portion of the capacitance line.
- a wiring portion formed along the scanning line so as to overlap each other as viewed from the side of the substrate.
- the resistance of the capacitance line in the direction along the scanning line is reduced by electrically connecting the wiring portion of the capacitance line and the wiring portion of the light shielding film formed along the plurality of lines to each other.
- the redundancy in the redundant structure of the capacitance line described above can be increased, particularly in the direction along the line.
- the 1513 light-shielding film may include at least one of the plurality of scanning lines and the plurality of capacitance lines, and the plurality of data lines. Are provided in a mesh at overlapping positions as viewed from the side. According to this aspect, since the light-shielding film is provided in a mesh shape, the resistance of the capacitance line electrically connected to the light-shielding film can be reduced, and the degree of the redundant structure between the two can be increased.
- the light-shielding film may be arranged such that the light-shielding film is at least one of the plurality of scanning lines and the plurality of capacitance lines, as viewed from a side opposite to the three sides. It is characterized in that it is provided in stripes at overlapping positions.
- the light-shielding film is provided in a stripe shape, it is possible to promote a reduction in the resistance of the capacitance line electrically connected to the light-shielding film, particularly in a direction along the scanning line.
- the degree of the redundant structure can be increased.
- the light-shielding film may include at least one of the plurality of scanning lines and the plurality of capacitance lines, as viewed from the other side.
- a plurality of island-shaped portions provided in an island shape at overlapping positions and arranged in plurality along the scanning line are electrically connected to each other via the capacitance line.
- the light-shielding film is provided in an island shape, and the plurality of island-shaped portions arranged along the scanning line are electrically connected to each other via the capacitor line. Low resistance can be promoted, and the degree of the redundant structure between them can be increased.
- the light shielding film is provided in a stripe shape along the data line.
- the data line by extending along the data line, it is possible to form without lowering the aperture ratio.
- shielding along lines and capacitance lines When an optical film is formed, a contact hole connecting the pixel Sii and the semiconductor layer may be formed in the vicinity.
- the stress of the light-shielding film which is suppressed by the interlayer insulating film, causes the pixels arranged so as not to block the light!
- cracks may occur in the light-shielding film due to the opening of the contact hole between the semiconductor layer and the semiconductor layer.
- the light shielding film can be separated from the contact hole between the pixel mi and the semiconductor layer, and the effect of the stress of the light shielding film can be reduced as much as possible. If a light-shielding film along the data line is connected to the capacitance line, it is possible to lower the resistance of the capacitance line.
- the front light film is connected to a constant potential source.
- the light shielding film includes at least one of Ti, Cr, W, Ta, Mo, and Pb.
- the light-shielding film includes at least one of Ti, Cr, W, Ta, Mo, and Pb, which are opaque refractory metals.
- the light shielding film on the TFT array can be prevented from being broken or melted by the high-temperature treatment in the TFT formation process performed after the formation process.
- the side facing the liquid crystal of the third interlayer insulating film is flattened by forming a portion facing the liquid crystal in a concave shape.
- At least one of the first, second, and third interlayer insulating films is formed to have a concave shape, so that the surface of the liquid crystal of the third interlayer insulating film is exposed. Since the side to be flattened is flattened, the third interlayer insulating Discrimination (poor alignment) of liquid crystal caused by unevenness on the surface of the film can be reduced.
- the present invention is characterized in that the electronic device is provided with a third liquid crystal device.
- the electronic device since the electronic device includes the above-described liquid crystal device of the present invention, the reliability of the device is high due to the redundant structure, and display inferiority such as horizontal crosstalk is reduced, and A liquid crystal device having excellent light-shielding performance against return light and the like enables high-quality image display.
- FIG. 1 is an equivalent circuit of various elements, wiring, and the like provided in a plurality of pixels in a matrix forming an image display area in the first embodiment of the liquid crystal device.
- FIG. 2 is a plan view of a plurality of adjacent pixel groups of a TFT array substrate on which a data line, a scanning line, a pixel electrode, a light-shielding film, and the like are formed in the first embodiment of the liquid crystal device.
- FIG. 3 is a sectional view taken along line AA ′ of FIG.
- FIG. 4 is a block diagram of a pixel portion and peripheral circuits provided on the TFT array in the first embodiment of the liquid crystal device.
- FIG. 5 is a timing chart of various signals related to precharge.
- FIG. 6 is a process diagram (part 1) for sequentially illustrating the manufacturing process of the first embodiment of the liquid crystal device.
- FIG. 7 is a process diagram (part 2) for sequentially illustrating the manufacturing process of the first embodiment of the liquid crystal device.
- FIG. 8 is a process diagram (part 3) for sequentially illustrating the manufacturing process of the first embodiment of the liquid crystal device.
- FIG. 9 is a process diagram (part 4) for sequentially illustrating the manufacturing process of the first embodiment of the liquid crystal device.
- FIG. 10 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, light-shielding films, and the like are formed in the second embodiment of the liquid crystal device.
- FIG. 11 shows a data line, a scanning line, a pixel electrode, and a shield in the third embodiment of the liquid crystal device.
- FIG. 4 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array on which an optical film and the like are formed.
- FIG. 12 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which a data line, a Zhao line, pixels, a light shielding film, and the like are formed in a fourth embodiment of the liquid crystal device.
- FIG. 13 is a plan view of a plurality of adjacent pixel groups on a TFT array substrate on which a data line, a scanning line, a pixel electrode, a light shielding film, and the like are formed in a fifth embodiment of the liquid crystal device.
- FIG. 13 is a plan view of a plurality of adjacent pixel groups on a TFT array substrate on which a data line, a scanning line, a pixel electrode, a light shielding film, and the like are formed in a fifth embodiment of the liquid crystal device.
- FIG. 14 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, light-shielding films, and the like are formed in a sixth embodiment of the liquid crystal device.
- FIG. 15 is a plan view of a plurality of pixel groups adjacent to each other opposite to a TFT array in which data lines, scanning lines, pixel electrodes, light shielding films, and the like are formed in the seventh embodiment of the liquid crystal device.
- FIG. 16 is a sectional view taken along line AA of FIG. 2 in the eighth embodiment of the liquid crystal device.
- FIG. 17 is a sectional view taken along line AA of FIG. 2 in the ninth embodiment of the liquid crystal device.
- FIG. 18 is a plan view of the TFT array substrate in each embodiment of the liquid crystal device together with the components formed thereon as viewed from the counter substrate side.
- FIG. 19 is a sectional view taken along the line H—H ′ of FIG.
- FIG. 20 is a conceptual diagram for explaining display deterioration due to horizontal crosstalk.
- FIG. 21 is a configuration diagram of a projection display device which is an example of an electronic device using a liquid crystal device.
- FIG. 1 is an equivalent circuit of various elements, wirings, and the like in a plurality of pixels formed in a matrix and constituting an image display area of a liquid crystal device.
- FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other in a TFT array in which a data line, a line, a pixel S and a light-shielding film are formed, and
- FIG. 3 is a cross-sectional view taken along line AA ′ of FIG. is there.
- FIG. 4 is a plan view showing a two-dimensional wiring layout of the light-shielding film on the TFT array and the peripheral circuit, and FIG.
- a plurality of pixels formed in a matrix that form an image display area of the liquid crystal device according to the present embodiment include mm M9a and TFTs 30 for controlling the pixel 3 ⁇ 49a in a matrix.
- a plurality of the data lines 6a for supplying image signals are electrically connected to the source region of the TFT 30.
- the image signals Sl, S2,..., Sn to be written to the data line 6a may be supplied line-sequentially in this order. You may supply it for every group.
- the scanning line 3a to the gate of TFT30 are electrically connected, at a predetermined timing, the scanning line 3 a to pulsed scanning signals Gl, G2 S ⁇ ⁇ ⁇ , the Gm, line-sequentially in this order Shirushika ⁇ It is configured to be.
- the pixel 9a is electrically connected to the drain of the TFT 30. By closing the switch of the TFT 30 as a switching element for a period, the image signals Sl, S2,. Write Sn at predetermined timing.
- the image signals S 1, S 2,..., Sn of a predetermined level written on the liquid crystal via the pixel electrode 9 a are constant with respect to an opposing substrate (described later) formed on the opposing substrate (described later). Retained for a period.
- a storage capacitor 70 is added in parallel with a liquid crystal capacitor formed between the pixel TO9a and the opposing pixel.
- the voltage of the pixel electrode 9a is held by the storage capacitor 70 for a time three orders of magnitude longer than the time when the source voltage is applied.
- the holding characteristics are further improved, and a liquid crystal device having a high contrast ratio can be realized.
- a capacitor line 3b which is a wiring for forming the capacitor, may be provided, or a capacitor may be formed between the storage line 70 and the preceding scanning line 3a. Needless to say.
- a plurality of transparent pixel electrodes 9a are provided in a matrix, and the pixel electrodes 9a are provided.
- a data line 6a, a scanning line 3a, and a capacitance line 3b are provided along the vertical and horizontal boundaries of a.
- the data line 6a is electrically connected to a source region described later in the semiconductor layer 1a made of a polysilicon
- the first light-shielding film 11a in the pixel portion is provided in a region shown by oblique lines rising to the right in the drawing. That is, the first light-shielding film 1 la is provided in the pixel portion at a position where the TFT including the channel region of the semiconductor layer la, the data line 6 a, the line 3 a, and the capacitor line 3 b overlap each other when viewed from the side of the TFT array. ing.
- the liquid crystal device includes a TFT array 10 that constitutes an example of one transparent substrate, and an opposing substrate that constitutes an example of the other transparent substrate that is disposed to face the TFT array. 20 and.
- the TFT array mirror 10 is made of, for example, quartz and silicon
- the counter electrode 20 is made of, for example, glass or quartz.
- a pixel array 3a is provided on the TFT array 10 and an alignment film 16 on which a predetermined alignment process such as a rubbing process is performed is provided above the pixel array 9a.
- the pixel electrode 9a is made of, for example, a transparent conductive thin film such as an ITO (Indium Tin Oxide) film.
- the orientation film 16 is made of, for example, an organic thin film such as a polyimide thin film.
- the facing fiber 20 is provided with a facing layer 1 (common 21) over the entire surface thereof, and an orientation film 22 on which a predetermined orientation process such as a rubbing process is performed is provided below.
- the facing layer 21 is made of, for example, a transparent conductive thin film such as an ITO film
- the alignment film 22 is made of an organic thin film such as a polyimide thin film.
- the TFT array substrate 10 is provided with a pixel switching TFT 30 for controlling the switching of each pixel electrode 9 a at a position adjacent to each pixel m 9 a.
- the opposing substrate 20 is provided with a second light-shielding film 23 in a region other than the opening region of each pixel. Therefore, the incident light does not enter the channel region 1 a ′, the low-concentration source region region lb, and the low-concentration drain region 1 c of the semiconductor layer 1 a of the pixel switching TFT 30 from the side of the facing substrate 20. Further, the second light shielding film 23 has functions such as improvement of contrast and prevention of color mixture of color materials.
- a TFT 52 (see FIGS. 18 and 19) described below is provided between the TFT array 10 and the counter panel 20 in which the pixel # 9a and the counter 1 face each other.
- the liquid crystal is sealed in the space surrounded by the, and the liquid crystal layer 50 is formed.
- the liquid crystal layer 50 adopts a predetermined alignment state by the alignment film in a state where no electric field is applied from the pixel electrode 9a.
- the first light-shielding film 1 la in a mesh pattern along the pixel is provided between the TFT array mirror 10 and each pixel switching TFT 30 at a position facing the pixel switching TFT 30. Are provided.
- the first light-shielding film 1 la is preferably made of a metal single alloy, metal silicide, or the like containing at least one of Ti, Cr, W, Ta, Mo, and Pb, which are preferably opaque high-melting metals. With such a material, the first light-shielding film 11a is destroyed by the high-temperature treatment in the step of forming the pixel switching TFT 30 performed after the step of forming the first light-shielding film 1la on the TFT array fiber 10. Melting or melting. Since the first light-shielding film 11a is formed, the return light from the TFT array 10 side receives the channel region la of the pixel switching TFT 30, the low-concentration source region lb, and the low-concentration drain region 1c. Incident on the TFT 30 can be prevented beforehand, and the characteristics of the pixel switching TFT 30 are not degraded by the generation of photocurrent.
- a first interlayer insulating film 12 is provided between the first light shielding film 1 la and the plurality of pixel switching TFTs 30.
- the first interlayer insulating film 12 is provided to electrically insulate the semiconductor layer 1a constituting the pixel switching TFT 30 from the first light shielding film 11a.
- the first interlayer insulating film 12 is formed on the entire surface of the TFT array substrate 10, so that the first interlayer insulating film 12 also has a function as a lower layer for the pixel switching TFT 30.
- the TFT array substrate 10 has a function of preventing deterioration of the characteristics of the TFT 30 for pixel switching due to roughness at the time of polishing the surface of the TFT array substrate 10 or contamination remaining after washing.
- the first interlayer insulating film 12 can prevent the first light-shielding film 11a from contaminating the pixel switching TFT 30 and the like.
- an insulating thin film 2 serving as a gate insulating film is extended from a position facing a gate which is a part of the scanning line 3a and used as a dielectric film, and a semiconductor layer 1a is extended and used as a dielectric film.
- the storage capacitance 70 is configured by setting one storage capacitance m3 ⁇ 4lf and further setting a part of the capacitance line 3b facing these as a second storage capacitance. More specifically, a high-concentration drain region 1e of the semiconductor layer 1a extends below the data line 6a and the scanning line 3a, and also extends along the data line 6a and the scanning line 3a.
- the first storage capacitor electrode 1f is disposed so as to face the extending capacitor line 3b with the insulating thin film 2 interposed therebetween.
- the insulating thin film 2 as a dielectric of the storage capacitor
- the storage capacitor 70 is configured as a storage capacitor having a relatively small area and a large capacity. .
- the space below the opening area that is, the area below the data line 6a and the area parallel to the scanning line 3a (that is, the area where the capacitance line 3b is formed) is effectively used.
- the storage capacity of the pixel a can be increased.
- the capacitance line 3b and the first light shielding film 1la are electrically connected via the contact hole 13. Therefore, the resistance of the capacitor line 3b can be significantly reduced by the resistance of the first light-shielding film 1la.
- the capacitance line 3b is formed of a polysilicon film having a sheet resistance value of, for example, about 25 ⁇ / b, the capacitance line 3b has a small size of about 1.3 inches or about 0.9 inches diagonally.
- a liquid crystal device In the case of a liquid crystal device, it has a resistance of about 100 to 200 ⁇ , but since the first light shielding film 1 la is formed of a conductive high melting point metal film, the capacitance line 3 b The resistance in the direction along the scanning line 3a is greatly reduced.
- the time constant of the capacitance line 3b can also be reduced from, for example, about tens of seconds to about several / seconds due to the presence of the first light shielding film 1la. Therefore, the horizontal coupling caused by the fluctuation of the potential of the capacitance line 3b due to the capacitance coupling between the capacitance line 3b and the data line 6a in the capacitance line 3b crossed under the data line 6a. Etc. can be reduced. That is, as shown in FIG. 20, when trying to display an image 801 in which black is drawn with high contrast with gray as a background, image signals of partially different voltages to be displayed in black are displayed.
- the first light-shielding film 1 la (and the capacitance line 3b electrically connected thereto) is electrically connected to a constant potential source, and the first light-shielding film 1 la and the capacitance line 3b are connected to a constant potential. Is done. Therefore, it is possible to prevent the potential fluctuation of the first light-shielding film 11a from adversely affecting the pixel switching TFT 30 that is disposed to face the first light-shielding film 11a.
- the capacitance line 3b can function favorably as the second storage capacitance 1 of the storage capacitance 70.
- the constant potential source is a constant potential such as a negative power supply or a positive power supply supplied to a peripheral circuit for driving the liquid crystal device (for example, a scanning line driving circuit, a data line driving circuit, a sampling circuit, and the like).
- a peripheral circuit for driving the liquid crystal device for example, a scanning line driving circuit, a data line driving circuit, a sampling circuit, and the like.
- Power source, ground power source, constant potential source supplied to the counter electrode 21, and the like can be kept at a constant potential without providing a dedicated potential wiring or an external circuit connector.
- a pixel switching TFT 30 has an LDD (Lightly Doped Drain) structure, and has a channel region 1 of a semiconductor layer 1 a where a channel is formed by an electric field from a line 3 a and the scanning line 3 a.
- a ' an insulating thin film 2 that insulates the scanning line 3a from the semiconductor layer la, a data line 6a, a low-concentration source region lb and a low-concentration drain region 1c of the semiconductor layer la, and a high-concentration source region of the semiconductor layer 1a 1 d and a high-concentration drain region 1 e.
- the de-emphasis line 6a is formed of a light-shielding thin film such as an alloy film of a metal such as A1 or a metal silicide. Further, a contact hole 5 leading to the high-concentration source region 1 d and a contact hole 8 leading to the high-concentration drain region 1 e were formed on the Zhao line 3 a, the insulating thin film 2 and the first interlayer insulating film 12, respectively. A second interlayer insulating film 4 is formed. The data line 6a is electrically connected to the high-concentration source region 1d via the contact hole 5. Further, a third interlayer insulating film 7 is formed on the data line 6 a and the second interlayer insulating film 4.
- the high-concentration drain region 1e is electrically connected to the pixel electrode 9a via the contact hole 8.
- the pixel 9a and the high-concentration drain region le may be electrically connected to each other by relaying the same A1 film as the data line 6a or the same polysilicon film as the scanning line 3b.
- the pixel switching TFT 30 preferably has an LDD structure as described above.
- the low-concentration source region 1b and the low-concentration drain region 1c may have an offset structure in which impurity ions are not implanted, or a high-concentration impurity ion may be implanted using the gate S as a mask, and may be self-aligned.
- a self-aligned TFT that forms high-concentration source and drain regions may be used.
- a single gate structure in which only one gate ⁇ ⁇ S, which is a part of the Zhao wire 3a of the pixel switching TFT 30 is arranged between the source and drain regions, is used. More than one gate may be arranged. At this time, the same signal is applied to each gate electrode. If the TFT is constituted by a dual gate (double gate) or triple gate or more as described above, it is possible to prevent a leak current at a channel and a source / drain junction, and to reduce a current at an off time. If at least one of these gates 1 has an LDD structure or an offset structure, the off current can be further reduced and a stable switching element can be obtained.
- the polysilicon film forming the channel regions la, and the low-concentration source region 1b and the low-concentration drain region 1c of the semiconductor layer la receives light due to the photoelectric conversion effect of polysilicon when light enters.
- the data line 6a is made of a light-shielding metal thin film such as A1 so that the scanning line 3a overlaps from above. Therefore, at least the incident light (that is, light from above in FIG. 3) incident on the channel region 1 a of the semiconductor layer 1 a, the lightly doped source region lb, and the lightly doped drain region 1 c is formed. It can be effectively prevented.
- the first light-shielding film 11a is provided below the pixel switching TFT 30, at least the channel region 1a of the semiconductor layer 1a and the low-concentration source 11a are provided. Region lb, low iU3 ⁇ 4 It is possible to effectively prevent the return light (that is, light from the lower side in Fig. 3) from entering the drain region lc.
- the configuration of the peripheral circuit used will be described with reference to FIG.
- the liquid crystal device includes, as peripheral circuits, a data line driving circuit 101 driving the data line 6a, a line driving circuit 104 driving the 3 ⁇ 43 ⁇ 4 ⁇ 3a, and a plurality of data lines.
- a precharge signal (NRS) of a predetermined 3 ⁇ 4 ⁇ level is supplied to the evening line 6 a prior to the supply of the image signals S 1, S 2,..., Sn, and the precharge circuit 201 is supplied to the image signal line.
- Sn and supplies the plurality of image signals S 1, S 2,..., Sn to the plurality of data lines 6 a.
- the scanning ⁇ II driving circuit 104 applies the scanning signals Gl, G2, ..., Gm to the line 3a at a predetermined timing based on the power supplied from the external control circuit, the reference clock CLY and its inverted clock, and the like. Printing is performed in a pulsed line-sequential manner.
- the de-drive circuit 101 applies the scan signals G 1, G 2,..., Gm based on the power supplied from the external control circuit, the reference clock CLX and its inverted clock, etc.
- the transfer signals XI, X2,..., Xn from the shift register as sampling circuit drive signals are supplied to the sampling circuit 301 via the sampling circuit drive signal line 306 every data line 6a. Supply at regular timing.
- the precharge circuit 201 includes, for example, a TFT 202 as a switching element for each data line 6a.
- a precharge signal line 204 is connected to a drain or a source of the TFT 202.
- the signal line 206 is connected to the gate electrode of the TFT 202.
- power of a predetermined voltage required for writing a precharge signal (NRS) is supplied from an external power supply via a precharge signal line 204, and each data is supplied via a precharge circuit drive signal line 206.
- the precharge circuit drive signal (NRG) is supplied from the external control circuit so that the precharge signal (NS) is written at the timing preceding the supply of the image signals S1, S2, ..., Sn for line 6a.
- the precharge circuit 201 preferably supplies a precharge signal (NRS) (image auxiliary signal) corresponding to the image signals S1, S2,...
- the sampling circuit 301 includes a TFT 302 for each data line 6a, an image signal line 304 is connected to the drain or source of the TFT 302, and a sampling circuit drive signal line 306 is connected to the TFT 302. Connected to gate electrode.
- image signals S 1, S 2,..., Sn are input via the image signal line 304, these are sampled. That is, the sampling circuit drive signal line 30
- the transfer signals XI, X2,..., And Xn are input from the drive circuit 101 as the sampling circuit drive signal via 6, the image signals Sl, S2,. And Sn are sequentially applied to the data line 6a.
- the data lines 6a are configured to be selected one by one.
- the data lines 6a may be configured to be simultaneously selected in units of a plurality of data lines. No.
- the image is converted from a serial to parallel into a plurality of phases (for example, three-phase, six-phase, twelve-phase,).
- the signals S 1, S 2,..., Sn may be supplied from the image signal line 304, and may be simultaneously sampled for each group.
- the image signal lines 304 are required at least for the number of serial-to-parallel conversions.
- a clock signal (CLX) that defines a selection time t1 per pixel is input as a reference for horizontal scanning to a shift register included in the data driving circuit 101.
- start signal (DX) When the start signal (DX) is input, transfer signals XI, X2, ... are sequentially supplied from this shift register.
- a precharge circuit drive signal (NG) is supplied to the precharge circuit 201 at a timing prior to the input of such a transfer start signal (DX). More specifically, the clock signal (CLY), which is the reference for vertical scanning, goes high, and the image signal (VID) reverses its polarity with respect to the center value of the signal (VID center).
- the precharge circuit drive signal (NRG) After a time t3 which is a margin from inversion to precharge, the precharge circuit drive signal (NRG) is set to a high level.
- the precharge signal (NRS) has a predetermined level of the same polarity as the image signal (VID) during the horizontal retrace period in response to the inversion of the image signal (VID). Therefore, the precharge is performed at time t2 when the precharge circuit drive signal (NRG) is set to the high level.
- a time t4 before the end of the 'horizontal' period and the start of the effective display period, that is, a margin from the end of the precharge to the time when the image signal is written is assumed to be a time t4.
- the precharge circuit 201 supplies the precharge signal (NR S) to the plurality of data lines 6a prior to the image signal in each horizontal blanking period.
- the precharge is performed during the horizontal retrace period, but the fluctuation of the potential of the capacitor line 3b due to the capacitance coupling between the data line 6a and the capacitor line 3b described above occurs within the time t5. And head for stability. Therefore, by setting the evening of each signal so that the time t5 becomes longer, it is considered that such fluctuation of the potential of the capacitance line 3b can be prevented. However, if this time t5 is made longer, then it becomes necessary to shorten the times t3, t2 and t4.
- the time t 3 is made too short, when the precharge circuit drive signal (NRG) becomes high level due to the gate delay of the TFT or the like constituting the precharge circuit, the TFT 30 related to the scanning line in the preceding stage is turned off. There is a danger that the gate will turn on. Also, if the time t2 is shortened, the precharge capability is reduced or a precharge circuit having a high charge supply capability is required. Furthermore, if the time t4 is shortened, the precharge signal and the image signal may be simultaneously applied to the data line 6a. Therefore, in order to perform the precharge satisfactorily, the time t5 for stabilizing the potential fluctuation of the capacitance line 3b due to the capacitance coupling cannot be easily increased.
- NSG precharge circuit drive signal
- the time t5 relative to the time constant of the capacitance line 3b is relatively small. It can be made longer.
- the fluctuation of the potential of the capacitor line 3b due to the capacitive coupling is stabilized while securing a sufficient horizontal retrace period for the precharge.
- the time t5 until can be substantially sufficiently secured.
- the precharge and the above-described scanning line inversion driving can be performed satisfactorily, and horizontal crosstalk and ghost due to capacitive coupling can be prevented. Extremely high-quality image display becomes possible.
- the present embodiment even if the capacitor line 3b is broken in the middle due to a foreign substance or the like, a redundant structure is realized in which the first light shielding film 11a substitutes for the capacitor line 3b. Have been. In other words, even if the capacitor line 3b is broken in the middle, if both sides of the broken portion are electrically connected to each other by the first light-shielding film 11a via the contact hole 13, a practical problem occurs. Absent. Therefore, according to the present embodiment, it is possible to realize a liquid crystal device that has a low defective product rate and is capable of displaying high-quality images with high reliability.
- the capacitance line 3b and the scanning line 3a are made of the same polysilicon film, and the dielectric film having a storage capacity of 70 is the same as the insulating thin film 2 which is the gate insulating film of the TFT 30.
- the first storage capacitor and the channel region 1 a ′, the high-concentration source region ld, the high-concentration drain region 1 e of the TFT 30 are formed of the same semiconductor layer la. Therefore, the laminated structure formed on the TFT array 10 can be simplified. Further, in the method of manufacturing a liquid crystal device described later, the capacitor line 3b and the scanning line 3a are simultaneously formed in the same thin film forming step. The dielectric film and the insulating thin film 2 of the storage capacitor 70 can be formed simultaneously.
- the capacitance line 3 b and the first light-shielding film 1 la are reliably and reliably connected via the contact hole 13 opened in the first interlayer insulating film 12. Although both are electrically connected, such a contact hole 13 may be opened for each pixel, or may be opened for each pixel group including a plurality of pixels. If the contact hole 13 is opened for each pixel, the resistance of the capacitance line 3b can be reduced by the first light shielding film 11a, and the degree of the redundant structure between the two can be increased.
- the contact hole 13 is formed for each pixel group including a plurality of pixels (for example, every two pixels or every three pixels), the capacitance line 3b and the sheet of the first light shielding film 1 la are formed.
- the first light-shielding film 11 makes the first light-shielding film 11 a lower the resistance of the capacitance line 3 b and benefit from the redundant structure, and open many contact holes 13 This can be appropriately balanced with the adverse effects such as the mil reduction in the manufacturing process or the failure of the liquid crystal device, which is very advantageous in practice.
- the contact hole 13 provided for each pixel or each pixel group is formed below the data line 6a when viewed from the side opposite to the opposite S 20. I have. Therefore, the contact hole 13 is provided outside the pixel opening region, and is provided in the portion of the first interlayer insulating film 12 where the TFT 30 and the first storage capacitor lflf are not formed. Contact while making effective use of the pixel area Deterioration of the TFT 30 and other wiring due to the formation of the through hole 13 can be prevented. (Manufacturing Process of First Embodiment of Liquid Crystal Device)
- FIGS. 6 to 9 are process diagrams showing each layer on the opposite side of the TFT array in each step, as in FIG. 3, corresponding to the AA ′ section in FIG.
- a TFT array substrate 10 made of quartz, hard glass, silicon, or the like is prepared.
- a metal such as Ti, Cr, W, Ta, Mo and Pb and a metal alloy film such as a metal silicide are formed on the entire surface of the TFT array substrate 10 thus treated by sputtering to a thickness of about 100 to 500 nm.
- a light shielding film 11 of fl f, preferably about 200 nm TO is formed.
- the first light-shielding film 11a is formed by etching the light-shielding film 11 as shown in step (2).
- step (3) the TEOS (tetra 'ethyl' ortho-silicate) gas, T EB (tetra NSG (non-silicate glass), PSG (phosphorous silicate glass), BSG (boron silicate glass), BPSG (borane silicate glass) using 'Ethyl' boat rate) gas, TMOP (tetra'methyl'oxy.foslate) gas, etc.
- a first interlayer insulating film 12 made of a silicon nitride film, a silicon oxide film, or the like; The thickness of the first interlayer insulating film 12 is, for example, about 500 to 20001111.
- a flow rate of about 400 to 600 cc / mi is applied on the first interlayer insulating film 12 in a relatively low temperature environment of about 450 to 550 ° C, preferably about 500 ° C.
- Amorphous silicon film is formed by low pressure CVD using monosilane gas, disilane gas, etc. (for example, (0) at a pressure of about 20 to 40 ° C.)
- monosilane gas, disilane gas, etc. for example, (0) at a pressure of about 20 to 40 ° C.
- the polysilicon film 1 is solid-phase grown to a thickness of about 50 to 20 Onm, preferably about 10 Onm. Let it.
- an n-channel type pixel switching TFT 30 is formed as the pixel switching TFT 30 shown in FIG. 3, Sb (antimony), As (arsenic), and P (phosphorus) are formed in the channel region.
- impurity ions of a group V element such as the above may be slightly doped by ion implantation or the like.
- impurity ions of a group III element such as B (boron), Ga (gallium), and In (indium) are slightly doped by ion implantation or the like. Is also good.
- the polysilicon film 1 may be directly formed by a JECVD method or the like without passing through the amorphous silicon film.
- the polysilicon film 1 may be formed by implanting silicon ions into a polysilicon film deposited by a method or the like, temporarily forming the film into amorphous, and then recrystallizing the film by annealing or the like.
- a semiconductor layer 1a having a predetermined pattern as shown in FIG. 2 is formed. That is, in particular, in the region where the capacitance line 3b is formed below the data line 6a and in the region where the capacitance line 3b is formed along the scanning line 3a, the semiconductor constituting the pixel switching TFT 30 is formed.
- a first storage capacitor 3 ⁇ 4 1 f extending from the layer 1 a is formed.
- the first storage capacitance f is set to about 900 to: L at 300 ° C., preferably about 1000 ° C., together with the semiconductor layer 1 a constituting the pixel switching TFT 30.
- a thermal silicon oxide film having a relatively small thickness of about 3 Onm is formed by thermal oxidation, and a silicon oxide film ( ⁇ film) and a silicon nitride film are formed by EC VD method or the like for about 5 Onm.
- an insulating thin film 2 serving as a dielectric film for forming a capacitor is formed together with the gate insulating film of the TFT 30 for pixel switching having a multilayer structure (see FIG. 3).
- the thickness of the semiconductor layer la and the first storage capacitor 3 ⁇ 4 If is about 30 to: L5 Onm, preferably about 35 to 5 Onm, and the thickness of the insulating thin film 2 is about 20 ⁇ : L 50nm thickness, preferred The thickness is about 30 to 10 Onm.
- the insulating thin film 2 having a single-layer structure may be formed only by thermally oxidizing the polysilicon film 1.
- P ions are doped at a dose of about 3 ⁇ 10 12 / cm 2 into the semiconductor layer portion to be the first storage capacitor cage 1 f to reduce You may make it resistance.
- a contact hole 13 reaching the first light-shielding film 1 la is formed in the first interlayer insulating film 12 by dry etching such as reactive ion etching or reactive ion beam etching or by wet etching. Is formed.
- the anisotropic etching such as reactive ion etching or reactive ion beam etching has an advantage that the formation of the contact hole 13 or the like can make the shape of the hole I dog almost the same as the mask shape. is there.
- the dry etching and the wet etching are combined, the contact holes 13 and the like can be formed into a tapered shape, so that there is an advantage that disconnection during wiring connection can be prevented.
- step (8) after depositing the polysilicon film 3 by a low pressure CVD method or the like, P is diffused to make the polysilicon film 3 conductive.
- a doped silicon film in which P ions are introduced at the same time as the polysilicon film 3 may be used.
- a capacitor line 3b is formed together with a scanning line 3a having a predetermined pattern as shown in FIG.
- the length of the scanning line 3a and the capacitance line 3 is, for example, about 35 Onm.
- step (10) when the pixel switching TFT 30 shown in FIG. 3 is an n-channel TFT having an LDD structure, first, the low-concentration source region 1b and the low-concentration drain are formed in the semiconductor layer la.
- the gate 3 ⁇ 4i which is a part of the scanning line 3a, is used as a diffusion mask, and a low concentration of impurity ions 60 of a group V element such as P (for example, P ions are l ⁇ 3xl0 13 / doping at a dose of cm 2 ).
- the semiconductor layer la below the line 3a becomes the channel region la.
- the capacitance line 3b and the scanning line 3a are also reduced in resistance.
- the resist is formed using a mask wider than the line 3a.
- the impurity ions 61 of the group V element such as P are also doped at a high concentration (for example, P ions at a dose of 1 to 3 ⁇ 10 15 / cm 2 ). I do.
- a low-concentration source region lb, a low-concentration drain region 1c, a high-concentration source region 1d, and a * H-concentration drain region 1e are provided in the semiconductor layer la. It is doped with a group III impurity ion such as B (boron) to form.
- a TFT having an offset structure may be used without doping with low-concentration impurity ions, and ion implantation using P ions, B ions, or the like may be performed using a gate electrode that is a part of the scanning line 3a as a mask.
- a self-aligned TFT may be used.
- the resistance of the capacitance line 3b and the scanning line 3a is further reduced by the doping of the impurity.
- a p-channel TFT can be formed.
- the data line driving circuit 101 and the scanning line driving circuit 104 having a complementary structure composed of the n-channel TFT and the p-channel TFT are formed in the peripheral portion on the TFT array substrate 10. Becomes possible.
- the semiconductor layer 1a constituting the pixel switching TFT 30 is formed of a polysilicon film, the data line driving circuit 101 and the scanning line can be formed in substantially the same steps when forming the pixel switching TFT 30.
- the sagittal circuit 104 can be formed, which is advantageous in manufacturing.
- the NSG, the normal pressure or the reduced pressure CVD method, the TEOS gas or the like is used to cover the capacitance line 3b together with the scanning line 3a in the pixel switching TFT 30.
- a second interlayer insulating film 4 made of a silicate glass film such as PSG, BSG, or BPSG, a silicon nitride film, an oxidized silicon film, or the like is formed.
- the thickness of the second interlayer insulating film 4 is preferably about 500 to 150 Onm.
- annealing at about 1000 ° C. is performed for about 20 minutes to activate the high-concentration source region Id and the high-concentration drain region 1 e.
- Contact hole 5 for reactive ion etching and reactive ion etching It is formed by dry etching such as electron beam etching or by wet etching. Further, contact holes for connecting the scanning lines 3 a and the capacitance lines 3 b to wirings (not shown) are formed in the second interlayer insulating film 4 in the same process as the contact holes 5.
- a low-resistance metal such as A1 or a metal silicide such as A1 is formed as a metal film 6 on the second interlayer insulating film 4 by sputtering or the like. Deposited to a thickness of about 100 to 50 Onm, preferably about 300 nm, and further, as shown in the step (15), a photolithographic process, an etching step, etc., are used to form a data line 6a.
- a silicate glass film such as NSG, PSG, BSG, BPSG or the like is formed so as to cover the data line 6a by using, for example, normal pressure or reduced pressure CVD or TEOS gas.
- a third interlayer insulating film 7 made of a silicon nitride film—a silicon oxide film or the like is formed.
- the thickness of the third interlayer insulating film 7 is preferably about 500 to 1500 nm.
- a contact hole 8 for electrically connecting the pixel a to the high-concentration drain region 1e is formed by reactive ion etching and reactive ion etching. It is formed by dry etching such as ion etching.
- a transparent conductive thin film 9 such as an ITO film is deposited on the third interlayer insulating film 7 by sputtering or the like to a thickness of about 50 to 20 Onm.
- the pixel electrode 9a is formed.
- the pixel 9a may be formed from an opaque material having a high reflectance such as A1.
- rubbing is performed in a predetermined direction so as to have a predetermined pretilt angle, and the like. Is formed (see Fig. 3).
- the second light shielding film 23 and a third light shielding film as a frame described later are made of, for example, metallic chromium.
- a photo lithograph, etchin It is formed through a plugging process.
- these second light-shielding films may be formed from a metal material such as Cr, Ni (nickel), and A1, or a material such as a resin black in which carbon or Ti is dispersed in a photoresist. Good.
- a counter-electrode 21 is formed by depositing a transparent conductive thin film such as ITO to a thickness of about 50 to 20 O nm on the entire surface of the counter substrate 20 by sputtering or the like. Furthermore, after applying a coating liquid for a polyimide-based alignment film to the entire surface of the opposing mi 21, a rubbing treatment is performed so as to have a predetermined pretilt angle and in a predetermined direction. ) Is formed.
- the TFT array on which each layer is formed as described above is bonded to the anti-aperture 10 and the opposing anti-aperture 20 by a sealing material 52 such that the alignment films 16 and 22 face each other, and is evacuated by vacuum.
- a liquid crystal obtained by mixing a plurality of types of nematic liquid crystals is sucked into the space between the two substrates, and a liquid crystal layer 50 having a predetermined thickness is formed.
- FIG. 10 shows the data lines, lines, and pixels! ⁇ , A plan view of a plurality of pixel groups adjacent to each other on the opposite side of the TFT array on which a light shielding film and the like are formed.
- the first light-shielding film 1 la is composed of a plurality of stripe-shaped (stripe-shaped) portions extending along the scanning line 3 a. That is, the first light-shielding film 1 la is divided at a predetermined region facing the data line 6 a. Therefore, it is possible to promote a reduction in resistance of the capacitance line 3b electrically connected to the first light-shielding film 1la, particularly in a direction along the scanning line 3a. Further, the degree of the redundant structure between the capacitance line 3b and the first light shielding film 11a can be increased.
- the first light-shielding film 1 la is further provided in a stripe shape at the position where the scanning line 3 a and the capacitance line 3 b overlap each other when viewed from the side of the TFT array 10.
- a plurality of striped portions arranged along the scanning line 3a may be electrically connected to each other via the capacitor line 3b. Even with such a configuration, the resistance of the capacitance line 3b can be reduced, and the degree of the redundant structure can be increased.
- FIG. 12 is a plan view of a plurality of pixel groups adjacent to each other on the opposite side of the TFT array on which the data line, the running i pixel m®, the light shielding film, and the like are formed.
- a first light-shielding film 11 a is provided between the TFT array 10 and each pixel switching TFT 30 at a position facing the pixel switching TFT 30. Each is provided.
- the first light-shielding film 1 la is electrically connected to the adjacent capacitor line 3 b provided at the preceding or subsequent stage via the contact hole 13. ing. Therefore, compared to the case where each first light shielding film is electrically connected to the capacitance line at its own stage, the capacitance line 3 overlaps the data line 6a along the edge of the opening area of the pixel portion.
- the step with respect to the other region where the b and the first light shielding film 11a are formed can be reduced. If the steps along the edge of the opening area of the pixel portion are small, the discrimination (poor alignment) of the liquid crystal caused by the steps can be reduced, and the opening area of the pixel portion can be widened. Becomes
- the first light-shielding film 11a has a contact hole 13 formed in a protruding portion protruding from the main line portion extending linearly as described above.
- the first light shielding film 1la is not formed at a position facing the scanning line 3a except for a position covering the channel region la. Therefore, practically little or no capacitive coupling occurs between the first light-shielding film 11a and each scanning line 3a, so that the potential fluctuation in the scanning line 3a causes the potential in the first light-shielding film 1la to change. ⁇ does not occur, and as a result, no potential fluctuation occurs in the capacitance line 3b.
- the capacitance line 3b provided in the adjacent preceding or succeeding pixel is connected to the first light-shielding film 11a, the pixel in the uppermost or lowermost pixel is connected to the pixel.
- a capacitance line 3b for supplying a constant potential to the first light shielding film 11a is required. Therefore, it is preferable that the number of the capacitor lines 3 b is provided one extra than the number of vertical pixels.
- the linear main line portion of the first light shielding film 11 a is formed so as to substantially overlap the linear main line portion of the capacitor line 3 b, but the first light shielding film 11 1 If a is provided at a position that covers the channel region of the TFT 30 and overlaps with the capacitor line 3 b at any point so that the contact hole 13 can be formed, light is shielded from the TFT.
- the function and the function of lowering the resistance of the capacitor line 3b can be exhibited. Therefore, for example, the first light-shielding portion extends to a longitudinal gap region along the scanning line 3a between the adjacent scanning line 3a and the capacitance line 3b, and even to a position slightly overlapping with the scanning line 3a.
- a membrane 1 la may be provided.
- FIG. 4 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which lines, pixel electrodes, light shielding films, and the like are formed.
- the main line portion extending along the scanning line 3 a of the striped first light-shielding film 1 la is disposed below the scanning line 3 a. That is, in this main line portion, the scanning line 3a is formed on the first light-shielding film 11a via the first interlayer insulating film which is much thicker than the gate insulating film constituting the TFT in the pixel portion, for example. Have been. For this reason, even if an unintended abnormal portion such as a wei is formed on the first light-shielding film 1 la in the process, the first light-shielding is performed by the protrusions penetrating the first interlayer insulating film. The possibility that the film 11a is short-circuited to the scanning line 3a can be extremely reduced.
- the semiconductor layer 1a, the insulating thin film 2, and the capacitor line 3b are further laminated on the protrusions and the like formed on the first light shielding film 11a as in the first to third embodiments described above. (See Fig. 3), it is considered that the possibility that the protrusion breaks through the extremely thin insulating thin film 2 via the semiconductor layer la and the semiconductor layer 1a and the capacitance line 3b are short-circuited is increased. Then, the configuration in which the first light-shielding film 11a is formed at a position facing the scanning line 3a in the fourth-fifth-fifth embodiment is more advantageous in improving the process yield.
- the first light shielding film 11a and the capacitance line 3b formed opposite to each other should be made as small as possible. It is desirable to make the ⁇
- the capacitor line 3A is arranged facing.
- the capacitor line 3b opposed to the capacitor line 3b via the extremely thin insulating thin film 2 is formed.
- the possibility of short-circuit between the semiconductor layer 1a and the semiconductor layer 1a is hardly increased at all, and the yield of the liquid crystal device can be finally improved.
- the contact hole 13 for electrically connecting the capacitance line 3b and the first light-shielding film 1la has a square planar shape.
- the plane fiber of this contact hole is made circular, such as a perfect circle or an ellipse.
- Other configurations are the same as those in the first to fourth difficult embodiments.
- the form I of the contact hole 13 of the third embodiment is a modified version of the dog.
- the constituent elements are given the same reference numerals, and their description is omitted.
- FIG. 13 is a plan view of a plurality of adjacent pixel groups on a TFT array substrate on which data lines, lines, pixel electrodes, light-shielding films, and the like are formed.
- a contact hole 13 for electrically connecting the capacitance line 3 b and the first light-shielding film 11 a is configured such that a plane I dog parallel to the substrate is circular. .
- the contact hole 13 in the first embodiment is opened by the dry etching step, the contact hole 13 is formed in accordance with the selectivity between the first interlayer insulating film 12 and the first light shielding film 11a.
- the jet etching step employing the circular contact hole 13 ′ is very advantageous in practice from the viewpoint of preventing penetration and cracking.
- the reliability of the wiring near the contact hole can be improved, and the yield of the liquid crystal device can be improved.
- ⁇ is also applicable to the state.
- the first light-shielding film 11 a is electrically connected to the preceding or succeeding capacitive line 3 b via the contact hole 13 or 13.
- each light-shielding film is electrically connected to the capacitance line of its own stage.
- FIG. 14 is a plan view of a plurality of adjacent pixel groups on the TFT array substrate on which data lines, scanning lines, pixel electrodes, light-shielding films, and the like are formed.
- the first light-shielding film 11 a is provided at a position where the TFT including the channel region of the semiconductor layer 1 a in the pixel portion is covered when viewed from the side opposite to the TFT array.
- the main line extending in a straight line along the scanning line 3a opposite to the linear main line in b, and the next stage along the data line 6a from the intersection with the data line 6a In other words, it has a protruding portion that protrudes downward (ie, downward in the figure) and a protruding portion that protrudes forward (that is, upward in the figure) along the data line 6a from a location that intersects the data line 6a.
- the downward projection of the first light-shielding film 1 la covers the channel region, and further extends downward to a position covering the contact hole 5.
- the upward projection of the first light-shielding film 1 la is overlapped with the upward projection of the capacitance line 3 b below the data line 6 a, and near the tip of this overlap, the first light-shielding film 1 la A circular contact hole 13 ′ for electrically connecting 11 a to the capacitance line 3 b is provided. That is, in the present embodiment, the first light-shielding film 11 a in each stage (that is, each pixel row) is electrically connected to its own capacitance line 3 b through the contact hole 13.
- the upward projection of the first light-shielding film 1 la overlaps with the first storage capacitor 3 ⁇ 4S 1 f, and the third storage capacitor is utilized by utilizing the space below the data line 6 a.
- the storage capacitance 70 formed between the first light-shielding film 11a as the quantity electrode and the first storage capacitance 1f can be increased.
- the contact hole may be square and the capacitance line of the own stage may be electrically connected to the light shielding film. Further, in the third embodiment, since the capacitance line 3b provided in the pixel of the own stage is connected to the first light shielding film 11a, the extra capacitance line 3b is connected to the uppermost or lowermost pixel. This is advantageous because there is no need to provide
- FIG. 15 is a plan view of a plurality of adjacent pixel groups opposite to each other in a TFT array in which data lines, scanning lines, pixel electrodes, light-shielding films and the like are formed.
- the first light shielding film 11a is connected via a contact hole 13 '.
- the first light shielding J3 can be separated from the contact hole 8 for connecting the pixel electrode 9a and the semiconductor film 1a with the first light shielding film 1a. It is possible to prevent the capacitance line 3b and the semiconductor la from being short-circuited due to the stress of the metal film forming 1a, thereby preventing a point defect. Further, it is preferable that the first light-shielding film 1 la is connected to a constant potential line around the pixel region to fix the potential.
- the TFT 30, the scanning line 3 a, the capacitance line 3 b, the data line 6 a, and the like do not have any difference with respect to the step relative to other regions in the stacked region.
- no flattening process is performed, in the eighth embodiment, such a flattening process is performed by forming the first interlayer insulating film 12 in a concave shape.
- Other configurations are the same as those in the first to seventh difficult embodiments, and therefore, the same components are denoted by the same reference symbols in the drawings, and description thereof will be omitted.
- FIG. 16 is a sectional view taken along line AA ′ of FIG. That is, the plane of the liquid crystal device of the eighth embodiment The figures are the same as the first to seventh bell forms.
- the first interlayer insulating film 12 ′ is formed such that a portion facing the TFT 30, the data line 6 a, the scanning line 3 a, and the capacitor line 3 b is recessed.
- the side of the third interlayer insulating film 7 facing the liquid crystal layer 50 is flattened. Therefore, according to the fourth embodiment, the side of the third interlayer insulating film 7 facing the liquid crystal layer 50 is flattened and V, so that the third interlayer insulating film 7 is formed according to the degree of flattening.
- the liquid crystal discrimination (poor alignment) caused by the unevenness of the surface can be reduced.
- higher-quality image display is possible, and the opening area of the pixel portion can be widened.
- the first interlayer insulating film 12 ′ has a two-layer structure, and a thin portion consisting of only one layer is formed as a concave recessed portion. It is sufficient to form and etch a thin portion so that the portion becomes a concave bank portion.
- the first interlayer insulating film 12 may have a single-layer structure, and a concave depression may be opened by etching. In these cases, when dry etching such as reactive ion etching and reactive ion beam etching is used, there is an advantage that a concave portion can be formed as designed.
- the side wall surface of the concave depression can be formed in a tapered shape as shown in FIG. Since the residual amount of the polysilicon S, the resist and the like formed in the recesses around the sidewalls can be reduced, the advantage that the yield is not reduced is obtained.
- a groove may be formed in the TFT array 10 and the wiring or TFT 30 may be formed in the groove area and flattened.
- FIG. 17 is a cross-sectional view corresponding to a cross section taken along line AA 5 of FIG. That is, the plan views of the liquid crystal device of the eighth difficult embodiment are the same as those of the first to seventh embodiments.
- the third interlayer insulating film 7 is formed such that a portion facing the TFT 30, the data line 6 a, the scanning line 3 a, and the capacitor line 3 b is recessed. More specifically, a CMP (Chemical Mechanical Polishing) process is performed on the upper surface of the third interlayer insulating film 7. Thereby, the side of the third interlayer insulating film 7 ′ facing the liquid crystal layer 50 is flattened. Therefore, according to the fifth embodiment, the liquid crystal discrimination (poor alignment) caused by the unevenness of the surface of the third interlayer insulating film 7 'can be reduced according to the degree of the flattening.
- CMP Chemical Mechanical Polishing
- SOG spin-on glass
- a concave portion is formed in the first and third interlayer insulating films, respectively.
- a concave portion may be formed in the second interlayer insulating film. Further, these may be combined.
- the concave portion formed in the first, second or third interlayer insulating film is a portion facing all of the TFT 30, the data line 6 a, the scanning line 3 a, and the capacitor line 3 b.
- the concave portion should be at least a portion opposite to the delineation line 6a where the total becomes thickest when no flattening processing is performed.
- a flattening process may be performed.
- the flattening technique in the eighth and ninth difficult modes as described above is applicable to any of the first to seventh male modes.
- FIG. 18 is a plan view of the TFT array 10 with the components formed thereon viewed from the opposite side 20.
- FIG. 19 is a plan view of the opposite substrate.
- FIG. 18 is a sectional view taken along the line HH of FIG. 18 including the plate 20.
- a sealing material 52 is provided on the TFT array substrate 10 along the edge thereof, and in parallel with the inside thereof, for example, from the same or different material as the second light shielding film 23.
- a third light-shielding film 53 is provided as a frame.
- a data line driving circuit 101 and an external circuit connector 102 are provided along one side of the FT array 110, and the line driving circuit 101 is provided. 04 are provided along two sides adjacent to this one side. If the delay of the scanning signal supplied to the scanning line 3a does not matter, it goes without saying that the scanning 1 driving circuit 104 may be provided on only one side. Further, the data II circuit 101 may be arranged on both sides along the side of the image display area.
- the odd-numbered data lines 6a supply image signals from a data line driving circuit arranged along one side of the image display area, and the even-numbered data lines are on the opposite side of the image display area.
- the image signal may be supplied from a data line driving circuit disposed along the side of the line. If the data lines 6a are driven in a comb-tooth shape in this manner, the area occupied by the data driving circuit can be expanded, so that a complicated circuit can be formed.
- a plurality of wirings 105 for connecting the scanning circuits 104 provided on both sides of the image display area are provided, and a frame is further provided.
- a precharge circuit 201 (see FIG.
- FIG. 19 An inspection circuit for inspecting the quality, defects, and the like of the liquid crystal device during manufacturing or shipping is further provided on the TFT array substrate 10 of the liquid crystal device in each of the embodiments described with reference to FIGS. Etc. may be formed.
- the driving circuit 101 and the scanning ⁇ II driving circuit 104 are mounted on the TFT array Si substrate 10, for example, it is mounted on a T AB (Tape Automated Bonding) substrate.
- the driving LSI may be electrically and mechanically connected to the driving LSI via an anisotropic conductive film provided on the periphery of the TFT array.
- the side of the opposite substrate 20 on which the projected light is incident and On the side where the light emitted from the TFT array substrate 10 is emitted for example, operation modes such as TN (Twisted Nematic) mode, VA (Vertically Aligned) mode, PDLC (Polymer Dipersed Liquid Crystal) mode, Normally White Mode / Normal—Polarizing film, retardation film, polarizing means, etc. are arranged in a predetermined direction according to the black mode.
- TN Transmission Nematic
- VA Very Aligned
- PDLC Polymer Dipersed Liquid Crystal
- Normally White Mode / Normal—Polarizing film Normally White Mode / Normal—Polarizing film
- retardation film polarizing means, etc.
- the liquid crystal device according to each of the embodiments described above is applied to a color liquid crystal projector (projection display device), three liquid crystal devices are used as light valves for the RGB, respectively.
- the light of each color separated through the dichroic mirrors for RGB color separation is respectively incident as projection light. Therefore, in each embodiment, no color filter is provided in the opposition 20.
- an RGB color filter may be formed in a predetermined area facing the pixel 9a where the second light-shielding film 23 is not formed on the opposing surface 20 while keeping the same. In this way, the liquid crystal device in each mode can be applied to a color liquid crystal device such as a direct-view or reflection type color liquid crystal television other than the liquid crystal projector.
- a micro lens may be formed on the opposing substrate 20 so as to correspond to one pixel.
- a dichroic filter that produces RGB colors may be formed by using light interference by depositing many layers of interference layers having different refractive indexes on the opposing substrate 20. According to the opposite configuration with the dichroic fill, a brighter liquid crystal device can be realized.
- incident light is incident from the side of the opposing substrate 20 as in the case of ⁇ 3 ⁇ 43 ⁇ 4.
- the TFT array 10 since the first light-shielding film 1 la is provided, the TFT array 10 Alternatively, the incident light may enter from the side and exit from the opposite side of the counter 20. That is, even when the liquid crystal device is attached to the liquid crystal projector in this manner, it is possible to prevent light from being incident on the channel region 1a, the low concentration source region 1b, and the low concentration drain region 1c of the semiconductor layer 1a. It is possible to display high quality images.
- anti-reflection AR (anti-reflection) coated polarizing means is separately arranged or an AR film is attached. I needed to attach it.
- a first light-shielding film 11a is formed between the surface of the TFT array substrate 10 and at least the channel region 1a and the low-concentration source region 1b and the low-concentration drain region 1c of the semiconductor layer la. Therefore, there is no need to use such an AR-coated polarizing means or AR film, or to use a TFT array substrate 10 itself that has been subjected to AR processing.
- the material cost can be reduced, and the yield is not significantly reduced due to dust, scratches, or the like at the time of attaching the polarizing means, which is extremely advantageous.
- the yield is not significantly reduced due to dust, scratches, or the like at the time of attaching the polarizing means, which is extremely advantageous.
- image quality deterioration such as crosstalk due to light does not occur.
- the switching element provided in each pixel is described as a regular or co-planar type polysilicon TFT. However, other types of switching elements such as a reverse-sigma type TFT or morphous silicon TFT are used. Each embodiment is also effective for TFT.
- the projection-type display device 1100 prepared three liquid crystal devices described above and used them as liquid crystal devices 962 R, 962 G, and 962 B for R GB, respectively.
- 1 shows a schematic configuration diagram of an optical system of a projection type liquid crystal device.
- the optical system of the projection display device of this example employs the above-described light source device 920 and uniform illumination optical system 923.
- the projection display apparatus includes a color separation optical system 9 as a color separation means for separating the light beam W emitted from the uniform illumination optical system 923 into red (R), green (G), and blue (B).
- the light guide system 927 for guiding the blue light flux B to the corresponding light valve 925B is also provided.
- the uniform illumination optical system 9 2 3 includes two lens plates 9 2 1 and 9 2 2 and a reflection mirror 9 3 1, and two lens plates 9 2 1 and 9 2 with the reflection mirror 9 3 1 interposed therebetween. 2 is orthogonal Rooster 3 is placed in the state to be.
- Each of the two lens plates 9 21 and 9 22 of the uniform illumination optical system 9 23 has a plurality of rectangular lenses arranged in a matrix.
- the light beam emitted from the light source device 920 is divided into a plurality of partial light beams by the rectangular lens of the first lens plate 921. These partial luminous fluxes are superimposed near three light W revs 925R, 925G, and 925B by the rectangular lens of the second lens plate 922.
- the uniform illumination optical system 9 23 even if the light source device 9 20 has an uneven illuminance distribution in the cross section of the emitted light beam, the three light valves 9 25 R and 9 9 It is possible to illuminate 25 G and 925 B with uniform illumination light.
- Each color separation optical system 924 is composed of a blue-green reflecting dichroic mirror 941, a green reflecting dichroic mirror 942, and a reflecting mirror 943.
- the blue-green reflecting dichroic mirror 941 the blue light beam B and the green light beam G included in the light beam W are reflected at right angles, and go toward the green reflecting dichroic mirror 942.
- the red luminous flux R is M5 from this mirror 941, is reflected at a right angle by the rear reflecting mirror 943, and is emitted from the emission section 944 of the red luminous flux R to the color combining prism 910 side. Is done.
- the green reflecting dichroic mirror 942 only the green light flux G of the blue and green light fluxes B and G reflected at the blue-green reflecting dichroic mirror 941, is reflected at a right angle to obtain the green light flux.
- the light exits from the G emission section 945 toward the color combining optical system.
- the blue luminous flux B that has passed through the green reflection dichroic mirror 942 is emitted from the emission section 946 of the blue luminous flux B to the light guide system 927 side.
- the emitting portion of the light beam W in the illumination optical element, the emission portion 9 of the color beams in the color separating optical system 9 2 4 4 4, 9 4 5 s 9 4 as distance to 6 are approximately equal Is set.
- Condensing lenses 951, 952 are arranged on the exit sides of the exit sections 944, 945 of the red and green luminous fluxes R, G of the color separation optical system 92.4, respectively. Therefore, the red and green luminous fluxes R and G emitted from the respective emission sections are incident on these condenser lenses 951 and 952 and are collimated.
- the parallelized red and green light beams R and G are incident on the light valves 925R and 925G and modulated, and image information corresponding to each color light is added. That is, Switching of these liquid crystal devices is controlled by driving means (not shown) in accordance with image information, whereby each color light passing therethrough is modulated.
- the blue light flux B is guided to the corresponding light valve 925B via the light guide system 927, where it is similarly modulated according to the image signal.
- the light valves 925R, 925G, 925B of the present example are further provided with incident side polarizing means 960R, 960G, 960B and outgoing side polarizing means.
- the liquid crystal light valve is composed of 966 R, 966 G, 966 B, and liquid crystal devices 962 R, 962 G, 962 B disposed therebetween.
- the light guide system 9 27 includes a condenser lens 9 54 disposed on the exit side of the exit portion 9 46 of the blue light beam B, an entrance-side reflection mirror 9 71, an exit-side reflection mirror 9 7 2, It comprises an intermediate lens 973 disposed between these reflecting mirrors, and a condenser lens 953 disposed in front of the light valve 925B.
- the blue light flux B emitted from the condenser lens 946 is guided to the liquid crystal device 962B via the light guide system 927 and is modulated.
- the optical path length of each color light beam that is, the distance from the light emitting portion of the light beam W to each of the liquid crystal devices 9 6 9 6 2 G and 9 62 B, is the longest for the blue light beam B, and therefore, the light loss of the blue light beam is the smallest. More. However, light loss can be suppressed by interposing the light guide system 927.
- Each color light flux R, G, B modulated through each light valve 925R, 925G, 925B is incident on a color combining prism 910, where it is combined. Then, the light combined by the color combining prism 910 is enlarged and projected on the surface of the projection surface 100 at a predetermined position via the projection lens unit 900.
- the liquid crystal devices 962R, 962G, and 962B are provided with a light-blocking layer below the TFT, so that the liquid crystal devices 962R, 962G, 9 6 2 Reflected light from the projection optical system in the liquid crystal projector based on the light projected from B, TFT array when the projected light passes through, reflected light from the opposite surface, projection optical system after exiting from another liquid crystal device Even if a part of the projection light that penetrates through the TFT array enters as a return light from the side of the TFT array, it is possible to sufficiently shield the switching TFT channel of the pixel.
- the polarization means 961 R, 961 G, and 96 IB are used to directly perform a return light prevention treatment on the liquid crystal device. Need not be attached. Therefore, as shown in FIG. 18, the polarizing means is separated from the liquid crystal device, and more specifically, one of the polarizing means 961 R and 96 lG 961 B is a color combining prism 9 10 And the other polarizing means 960 R, 960 G, and 96 OB can be attached to the condenser lenses 953, 945, and 944.
- the polarizing means by attaching the polarizing means to the prism unit or the condenser lens, the heat of the polarizing means is absorbed by the prism unit or the condenser lens, so that a rise in the temperature of the liquid crystal device can be prevented.
- an air layer is formed between the liquid crystal device and the polarizing device by forming the liquid crystal device and the polarizing device separately, so that a cooling device is provided, and the liquid crystal device and the polarizing device are provided between the liquid crystal device and the polarizing device.
- the storage capacitance is given to each of the plurality of pixel electrodes by the capacitance line having low resistance using the plurality of light-shielding films, so that the driving frequency of the liquid crystal device can be increased.
- horizontal crosstalk and ghost caused by potential fluctuations of the capacitance line due to capacitance coupling between the data line and the capacitance line are reduced, and high-quality image display can be performed. Further, precharge and scanning line inversion driving can be performed well.
- the wiring by the light-shielding film replaces the capacitance line, so that a redundant structure can be realized, and the occurrence of cracks related to the wiring by the light-shielding film is reduced.
- a high L ⁇ liquid crystal device with high reliability and good product ratio can be realized.
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Application Number | Priority Date | Filing Date | Title |
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JP53819399A JP3684578B2 (ja) | 1998-03-19 | 1999-03-19 | 液晶装置および電子機器 |
US09/423,818 US6556265B1 (en) | 1998-03-19 | 1999-03-19 | LCD having auxiliary capacitance lines and light shielding films electrically connected via contact holes |
KR10-1999-7010599A KR100519205B1 (ko) | 1998-03-19 | 1999-03-19 | 액정장치, 투사형 표시장치 및 전자기기 |
Applications Claiming Priority (4)
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JP10/71035 | 1998-03-19 | ||
JP7103598 | 1998-03-19 | ||
JP10/176244 | 1998-06-23 | ||
JP17624498 | 1998-06-23 |
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WO1999047972A1 true WO1999047972A1 (fr) | 1999-09-23 |
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ID=26412154
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP1999/001433 WO1999047972A1 (fr) | 1998-03-19 | 1999-03-19 | Dispositif d'affichage et dispositif de projection a cristaux liquides |
Country Status (6)
Country | Link |
---|---|
US (1) | US6556265B1 (ja) |
JP (1) | JP3684578B2 (ja) |
KR (1) | KR100519205B1 (ja) |
CN (2) | CN1267781C (ja) |
TW (1) | TW482918B (ja) |
WO (1) | WO1999047972A1 (ja) |
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Also Published As
Publication number | Publication date |
---|---|
CN1258357A (zh) | 2000-06-28 |
CN100426113C (zh) | 2008-10-15 |
KR100519205B1 (ko) | 2005-10-06 |
KR20010012638A (ko) | 2001-02-26 |
CN1808255A (zh) | 2006-07-26 |
CN1267781C (zh) | 2006-08-02 |
JP3684578B2 (ja) | 2005-08-17 |
TW482918B (en) | 2002-04-11 |
US6556265B1 (en) | 2003-04-29 |
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