CN107910301B - 显示基板的制作方法、显示基板及显示装置 - Google Patents
显示基板的制作方法、显示基板及显示装置 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 106
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 44
- 239000010408 film Substances 0.000 claims description 59
- 229920002120 photoresistant polymer Polymers 0.000 claims description 35
- 238000000034 method Methods 0.000 claims description 34
- 238000005530 etching Methods 0.000 claims description 30
- 239000004020 conductor Substances 0.000 claims description 14
- 230000001681 protective effect Effects 0.000 claims description 12
- 239000007789 gas Substances 0.000 claims description 9
- 238000009413 insulation Methods 0.000 claims description 8
- 239000010409 thin film Substances 0.000 claims description 7
- 238000012545 processing Methods 0.000 claims description 6
- 238000002161 passivation Methods 0.000 claims description 5
- 238000000059 patterning Methods 0.000 claims description 5
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 claims description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 129
- 239000000463 material Substances 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 239000007769 metal material Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910001257 Nb alloy Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- DTSBBUTWIOVIBV-UHFFFAOYSA-N molybdenum niobium Chemical compound [Nb].[Mo] DTSBBUTWIOVIBV-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
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- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/3105—After-treatment
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- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
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- H01L21/475—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers using masks
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- H01L21/4757—After-treatment
- H01L21/47573—Etching the layer
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- H01L21/4763—Deposition of non-insulating, e.g. conductive -, resistive -, layers on insulating layers; After-treatment of these layers
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Abstract
本发明涉及显示技术领域,公开了一种显示基板的制作方法、显示基板及显示装置,采用本发明实施例提供的制作方法在衬底基板上制作薄膜晶体管,在保证不会出现刻蚀残留的前提下,可以获得良好的栅极绝缘层形貌,从而使得后续对有源层进行导体化处理时位于栅极绝缘层下方的沟道区长度不会受到影响,进而改善了TFT的阈值电压特性,提高显示装置的产品品质。
Description
技术领域
本发明涉及显示技术领域,特别是涉及一种显示基板的制作方法、显示基板及显示装置。
背景技术
有机发光二极管(Organic Light-Emitting Diode,简称OLED)显示装置由于具有薄、轻、宽视角、主动发光、发光颜色连续可调、成本低、响应速度快、能耗小、驱动电压低、工作温度范围宽、生产工艺简单、发光效率高及可柔性显示等优点,已被列为极具发展前景的下一代显示技术。
OLED显示装置的显示基板上的薄膜晶体管(Thin Film Transistor,简称TFT)通常包括顶栅和底栅两种类型。如图1所示,现有一种顶栅型TFT包括:在衬底基板上依次设置的遮光层、第一绝缘层、有源层、栅极绝缘层、栅极、第二绝缘层和源漏极层,源漏极层的源极和漏极相对设置。在显示基板的制作过程中,在衬底基板上依次形成栅极之后,需要对栅极绝缘层进行部分刻蚀,以使覆盖于栅极绝缘层之下的有源层能够部分暴露出来,然后对暴露出的部分有源层进行导体化处理,最后通过过孔实现源极和漏极与导体化后的有源层的连接。
现有技术存在的缺陷在于,在显示基板的制作过程中,如果达不到刻蚀工艺要求,难以形成理想的栅极绝缘层形貌,例如1所示的TFT中栅极绝缘层靠近栅极的一侧表面的边缘与栅极的边缘完全重合的情况。在对有源层进行导体化处理后,位于栅极绝缘层下方未被导体化处理的沟道区长度就会变短,从而导致TFT阈值电压的特性变差,影响显示装置的产品品质。
发明内容
本发明实施例的目的是提供一种显示基板的制作方法、显示基板及显示装置,以改善TFT的阈值电压特性,提高显示装置的产品品质。
本发明实施例提供了一种显示基板的制作方法,包括在衬底基板一侧制作顶栅型薄膜晶体管,所述在衬底基板一侧制作顶栅型薄膜晶体管,包括以下步骤:
形成有源层;
在所述有源层远离所述衬底基板的一侧依次形成栅极绝缘膜层、栅极膜层和光刻胶膜层;
以掩模板为保护掩模,对所述光刻胶膜层进行曝光,使所述光刻胶膜层对应预形成栅极的区域未曝光,对应栅极膜层的刻蚀区的区域完全曝光;
对曝光后的光刻胶膜层进行显影,显影后的所述光刻胶膜层的厚度为1.8~2.2um,坡度角不小于70°;
以显影后的所述光刻胶膜层为保护掩模,对所述栅极膜层进行过度刻蚀形成栅极,所述栅极在所述衬底基板的正投影位于显影后的所述光刻胶膜层在所述衬底基板的正投影的区域内;
以显影后的所述光刻胶膜层为保护掩模,采用气相腐蚀的方法对所述栅极绝缘层膜层进行过刻时间为(20%~30%)*t的过度刻蚀形成栅极绝缘层,气相腐蚀的气体氛围为流量为2000~2500SCCM的四氟化碳CF4和流量为200~650SCCM的氧气O2,其中,t为正常刻蚀栅极绝缘膜层的时间;
剥离所述栅极表面残留的光刻胶膜层;
以栅极绝缘层为保护掩模,对有源层进行导体化处理。
采用本发明实施例提供的制作方法在衬底基板上制作薄膜晶体管,在保证不会出现刻蚀残留的前提下,可以获得良好的栅极绝缘层形貌,从而使得后续对有源层进行导体化处理时位于栅极绝缘层下方的沟道区长度不会受到影响,进而改善了TFT的阈值电压特性,提高显示装置的产品品质。
较佳的,所述栅极在所述衬底基板的正投影的边缘与显影后的所述光刻胶膜层在所述衬底基板的正投影的边缘的间距为1~1.5um。
优选的,在所述形成有源层的步骤之前,所述显示基板的制作方法还包括:
在所述衬底基板上形成遮光层,所述有源层与所述遮光层位置相对;
在所述遮光层远离所述衬底基板的一侧形成覆盖所述遮光层的第一绝缘层。
优选的,所述显示基板的制作方法还包括:
在所述栅极远离所述衬底基板的一侧形成第二绝缘层;
形成通向导体化处理后的有源层的第一过孔和第二过孔,所述第一过孔和第二过孔在衬底基板的正投影分别位于所述栅极在衬底基板的正投影的两侧;
在所述第二绝缘层远离所述衬底基板的一侧形成源极和漏极,所述源极和漏极分别通过所述第一过孔和第二过孔与导体化处理后的有源层连接。
优选的,所述显示基板的制作方法还包括:
形成通向第一绝缘层的第三过孔,所述第三过孔在衬底基板的正投影与所述有源层在衬底基板的正投影相间隔;
形成通向所述遮光层的第四过孔,所述第四过孔在衬底基板的正投影与所述第三过孔在衬底基板的正投影重合;所述遮光层通过所述第四过孔和第三过孔与所述源极或所述漏极连接。
由于遮光层通常为金属材质,采用该实施例方案,通过将遮光层与源极或漏极连接,减小了层间的跨线阻抗,从而改善TFT的性能。
优选的,所述第四过孔与第一过孔和第二过孔通过一次构图工艺形成。这样可以大大简化显示基板的制作工艺。
优选的,在所述第二绝缘层远离所述衬底基板的一侧形成源极和漏极之后,所述显示基板的制作方法还包括:
在所述源极和漏极远离所述衬底基板的一侧形成钝化层。
本发明实施例还提供了一种根据前述任一技术方案所述的显示基板的制作方法制作而成的显示基板。该显示基板的TFT阈值电压的特性得以改善。
本发明实施例还提供了一种显示装置,包括前述技术方案所述的显示基板。由于显示基板的TFT阈值电压的特性得以改善,显示装置也具有较佳的产品品质。
附图说明
图1为本发明实施例显示基板的制作方法流程图;
图2为本发明实施例显示基板的制作流程示意图一;
图3为本发明实施例显示基板的制作流程示意图二。
附图标记:
100-衬底基板 10-有源层 20-栅极绝缘膜层 30-栅极膜层
40-光刻胶膜层 50-掩模板 21-栅极绝缘层 31-栅极
60-遮光层 70-第一绝缘层 80-第二绝缘层 81-第一过孔
81-第二过孔 83-第三过孔 84-第四过孔 11-源极
12-漏极 90-钝化层
具体实施方式
为改善TFT的阈值电压特性,提高显示装置的产品品质,本发明实施例提供了一种显示基板的制作方法、显示基板及显示装置。为使本发明的目的、技术方案和优点更加清楚,以下举实施例对本发明作进一步详细说明。
如图1和图2所示,本发明实施例提供的一种显示基板的制作方法,包括在衬底基板100一侧制作顶栅型薄膜晶体管,在衬底基板100一侧制作顶栅型薄膜晶体管,包括以下步骤:
形成有源层10;
在有源层10远离衬底基板100的一侧依次形成栅极绝缘膜层20、栅极膜层30和光刻胶膜层40;
以掩模板50为保护掩模,对光刻胶膜层40进行曝光,使光刻胶膜层40对应预形成栅极的区域未曝光,对应栅极膜层30的刻蚀区的区域完全曝光;
对曝光后的光刻胶膜层40进行显影,显影后的光刻胶膜层40的厚度为1.8~2.2um,坡度角不小于70°;
以显影后的光刻胶膜层40为保护掩模,对栅极膜层30进行过度刻蚀形成栅极31,栅极31在衬底基板100的正投影位于显影后的光刻胶膜层40在衬底基板100的正投影的区域内;
以显影后的光刻胶膜层40为保护掩模,采用气相腐蚀的方法对栅极绝缘层膜层20进行过刻时间为(20%~30%)*t的过度刻蚀形成栅极绝缘层21,气相腐蚀的气体氛围为流量为2000~2500SCCM的四氟化碳CF4和流量为200~650SCCM的氧气O2,其中,t为正常刻蚀栅极绝缘膜层20的时间;
剥离栅极表面残留的光刻胶膜层40;
以栅极绝缘层21为保护掩模,对有源层10进行导体化处理。
其中,SCCM为体积流量单位,表示标准工况下毫升/分钟,流量为2000~2500SCCM的四氟化碳CF4即表示标准工况下流量为2000~2500毫升/分钟的四氟化碳CF4,流量为200~650SCCM的氧气O2即表示标准工况下流量为200~650毫升/分钟的O2;有源层10的具体材质不限,优选为氧化铟锡IGZO材质,厚度为0.05~0.09um;栅极绝缘层21的具体材质不限,优选为氧化硅材质,厚度为0.1~0.2um;栅极31的具体材质不限,优选为铜或铝等金属材质,厚度为0.4~0.6um。需要说明的是,对栅极膜层30进行刻蚀时采用湿刻的方法,当栅极膜层30为铜材质时,刻蚀溶剂可使用双氧水,当栅极膜层30为铝材质时,刻蚀溶剂可使用混酸。
需要说明的是,对光刻胶膜层40进行曝光前,需要进行前烘工艺,对光刻胶膜层40进行曝光后,跳过了后烘工艺而直接进行显影,这样有利于获得上述理想厚度与坡度角的光刻胶膜层40。对栅极膜层30和栅极绝缘膜层20进行过度刻蚀的目的是为了不出现刻蚀残留,当栅极绝缘膜层20的厚度为h时,正常刻蚀栅极绝缘膜层20的时间即刻蚀深度达到h时所用的时间。
采用本发明实施例提供的制作方法在衬底基板100上制作薄膜晶体管,在保证不会出现刻蚀残留的前提下,可以获得良好的栅极绝缘层21形貌,从而使得后续对有源层10进行导体化处理时位于栅极绝缘层21下方的沟道区长度不会受到影响,进而改善了TFT的阈值电压特性,提高显示装置的产品品质。
较佳的,栅极31在衬底基板100的正投影的边缘与显影后的光刻胶膜层40在衬底基板100的正投影的边缘的间距为1~1.5um。
本申请的发明人经过大量试验,根据上述制作方法,可使得栅极绝缘层21在衬底基板100的正投影位于显影后的光刻胶膜层40在衬底基板100的正投影的区域内,且栅极绝缘层21靠近栅极31的一侧表面的边缘超出栅极31的边缘,从而获得良好的栅极绝缘层21形貌,使位于栅极绝缘层21下方的沟道区长度不会受到影响,改善TFT的阈值电压特性。
在本发明的优选实施例中,在形成有源层10的步骤之前,显示基板的制作方法还包括:
在衬底基板上形成遮光层60,有源层10与遮光层60位置相对;
在遮光层60远离衬底基板100的一侧形成覆盖遮光层60的第一绝缘层70。
其中,遮光层60的具体材质不限,优选为钼或钼铌合金等金属材质,厚度为0.15um;第一绝缘层70的具体材质不限,优选为氧化硅材质,厚度为0.3~0.5um。
如图3所示,在本发明的优选实施例中,显示基板的制作方法还包括:
在栅极31远离衬底基板100的一侧形成第二绝缘层80;
形成通向导体化处理后的有源层10的第一过孔81和第二过孔82,第一过孔81和第二过孔82在衬底基板100的正投影分别位于栅极31在衬底基板100的正投影的两侧;
在第二绝缘层80远离衬底基板100的一侧形成源极11和漏极12,源极11和漏极12分别通过第一过孔81和第二过孔82与导体化处理后的有源层10连接。
其中,第二绝缘层80的具体材质不限,优选为氧化硅材质,厚度为0.3~0.5um;源极11和漏极12的具体材质不限,优选为铜或铝等金属材质,厚度为0.5~0.7um。
请继续参考图3所示,在本发明的优选实施例中,显示基板的制作方法还包括:
形成通向第一绝缘层70的第三过孔83,第三过孔83在衬底基板100的正投影与有源层10在衬底基板100的正投影相间隔;
形成通向遮光层60的第四过孔84,第四过孔84在衬底基板100的正投影与第三过孔83在衬底基板100的正投影重合;遮光层60通过第四过孔84和第三过孔83与源极11或漏极12连接。
由于遮光层60通常为金属材质,采用该实施例方案,通过将遮光层60与源极11或漏极12连接,减小了层间的跨线阻抗,从而改善TFT的性能。
优选的,第四过孔84与第一过孔81和第二过孔82通过一次构图工艺形成,也就是说,在栅极31远离衬底基板100的一侧形成第二绝缘层80后,通过一次构图工艺形成通向第一绝缘层70的第三过孔83,然后再通过一次构图工艺同时形成第四过孔84与第一过孔81和第二过孔82,这样可以大大简化显示基板的制作工艺。
优选的,在第二绝缘层80远离衬底基板100的一侧形成源极11和漏极12之后,显示基板的制作方法还包括:
在源极11和漏极12远离衬底基板100的一侧形成钝化层90。
其中,钝化层90的具体材质不限,优选为氧化硅或者氧化硅与氮化硅的组合材质,厚度为0.3~0.4um。
本发明实施例还提供了一种根据前述任一技术方案的显示基板的制作方法制作而成的显示基板。该显示基板的TFT阈值电压的特性得以改善。
本发明实施例还提供了一种显示装置,包括前述技术方案的显示基板。由于显示基板的TFT阈值电压的特性得以改善,显示装置也具有较佳的产品品质。显示装置的具体产品类型不限,例如,可以为显示器、显示屏、平板电视等等。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (9)
1.一种显示基板的制作方法,包括在衬底基板一侧制作顶栅型薄膜晶体管,其特征在于,所述在衬底基板一侧制作顶栅型薄膜晶体管,包括以下步骤:
形成有源层;
在所述有源层远离所述衬底基板的一侧依次形成栅极绝缘膜层、栅极膜层和光刻胶膜层;
以掩模板为保护掩模,对所述光刻胶膜层进行曝光,使所述光刻胶膜层对应预形成栅极的区域未曝光,对应栅极膜层的刻蚀区的区域完全曝光;
对曝光后的光刻胶膜层进行显影,显影后的所述光刻胶膜层的厚度为1.8~2.2um,坡度角不小于70°;
以显影后的所述光刻胶膜层为保护掩模,对所述栅极膜层进行过度刻蚀形成栅极,所述栅极在所述衬底基板的正投影位于显影后的所述光刻胶膜层在所述衬底基板的正投影的区域内;
以显影后的所述光刻胶膜层为保护掩模,采用气相腐蚀的方法对所述栅极绝缘层膜层进行过刻时间为(20%~30%)*t的过度刻蚀形成栅极绝缘层,气相腐蚀的气体氛围为流量为2000~2500SCCM的四氟化碳CF4和流量为200~650SCCM的氧气O2,其中,t为正常刻蚀栅极绝缘膜层的时间;
剥离所述栅极表面残留的光刻胶膜层;
以栅极绝缘层为保护掩模,对有源层进行导体化处理。
2.如权利要求1所述的制作方法,其特征在于,所述栅极在所述衬底基板的正投影的边缘与显影后的所述光刻胶膜层在所述衬底基板的正投影的边缘的间距为1~1.5um。
3.如权利要求1所述的制作方法,其特征在于,在所述形成有源层的步骤之前,所述制作方法还包括:
在所述衬底基板上形成遮光层,所述有源层与所述遮光层位置相对;
在所述遮光层远离所述衬底基板的一侧形成覆盖所述遮光层的第一绝缘层。
4.如权利要求3所述的制作方法,其特征在于,所述制作方法还包括:
在所述栅极远离所述衬底基板的一侧形成第二绝缘层;
形成通向导体化处理后的有源层的第一过孔和第二过孔,所述第一过孔和第二过孔在衬底基板的正投影分别位于所述栅极在衬底基板的正投影的两侧;
在所述第二绝缘层远离所述衬底基板的一侧形成源极和漏极,所述源极和漏极分别通过所述第一过孔和第二过孔与导体化处理后的有源层连接。
5.如权利要求4所述的制作方法,其特征在于,所述制作方法还包括:
形成通向第一绝缘层的第三过孔,所述第三过孔在衬底基板的正投影与所述有源层在衬底基板的正投影相间隔;
形成通向所述遮光层的第四过孔,所述第四过孔在衬底基板的正投影与所述第三过孔在衬底基板的正投影重合;所述遮光层通过所述第四过孔和第三过孔与所述源极或所述漏极连接。
6.如权利要求5所述的制作方法,其特征在于,所述第四过孔与第一过孔和第二过孔通过一次构图工艺形成。
7.如权利要求4所述的制作方法,其特征在于,在所述第二绝缘层远离所述衬底基板的一侧形成源极和漏极之后,所述制作方法还包括:
在所述源极和漏极远离所述衬底基板的一侧形成钝化层。
8.一种显示基板,其特征在于,所述显示基板根据权利要求1~7任一项所述的显示基板的制作方法制作而成。
9.一种显示装置,其特征在于,包括如权利要求8所述的显示基板。
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US15/983,055 US20190157432A1 (en) | 2017-11-23 | 2018-05-17 | Manufacturing method of display substrate, display substrate and display device |
US17/449,607 US20220020867A1 (en) | 2017-11-23 | 2021-09-30 | Manufacturing method of display substrate, display substrate and display device |
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US20190214503A1 (en) * | 2018-01-08 | 2019-07-11 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | A p-type thin-film transistor and manufacturing method for the same |
CN111883574A (zh) * | 2020-09-02 | 2020-11-03 | 深圳市华星光电半导体显示技术有限公司 | Oled显示面板及其制作方法 |
WO2024007197A1 (zh) * | 2022-07-06 | 2024-01-11 | 京东方科技集团股份有限公司 | 显示基板及其制作方法和显示装置 |
Family Cites Families (15)
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US6556265B1 (en) * | 1998-03-19 | 2003-04-29 | Seiko Epson Corporation | LCD having auxiliary capacitance lines and light shielding films electrically connected via contact holes |
JP3883706B2 (ja) * | 1998-07-31 | 2007-02-21 | シャープ株式会社 | エッチング方法、及び薄膜トランジスタマトリックス基板の製造方法 |
JP4403329B2 (ja) * | 1999-08-30 | 2010-01-27 | ソニー株式会社 | 液晶表示装置の製造方法 |
CN1375113A (zh) * | 1999-09-16 | 2002-10-16 | 松下电器产业株式会社 | 薄膜晶体管及其制造方法 |
JP4673513B2 (ja) * | 2001-08-01 | 2011-04-20 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP2003188183A (ja) * | 2001-12-20 | 2003-07-04 | Fujitsu Display Technologies Corp | 薄膜トランジスタ装置、その製造方法及び液晶表示装置 |
KR102141557B1 (ko) * | 2013-12-26 | 2020-08-05 | 엘지디스플레이 주식회사 | 어레이 기판 |
US9337030B2 (en) * | 2014-03-26 | 2016-05-10 | Intermolecular, Inc. | Method to grow in-situ crystalline IGZO using co-sputtering targets |
CN104076537A (zh) * | 2014-06-19 | 2014-10-01 | 京东方科技集团股份有限公司 | 阵列基板及其制作方法、显示装置及测量方法 |
CN104375348A (zh) * | 2014-12-10 | 2015-02-25 | 京东方科技集团股份有限公司 | 阵列基板及其制造方法和全反射式液晶显示器 |
CN104867942B (zh) * | 2015-04-29 | 2018-03-06 | 深圳市华星光电技术有限公司 | Tft基板的制作方法及其结构 |
KR102400022B1 (ko) * | 2015-12-30 | 2022-05-19 | 엘지디스플레이 주식회사 | 측부 구부림 구조를 갖는 플렉서블 유기발광 다이오드 표시장치 |
CN105470267A (zh) * | 2016-01-11 | 2016-04-06 | 武汉华星光电技术有限公司 | 一种阵列基板及其制备方法 |
US10141387B2 (en) * | 2016-04-08 | 2018-11-27 | Innolux Corporation | Display device |
CN106935659B (zh) * | 2017-05-11 | 2021-01-22 | 京东方科技集团股份有限公司 | 薄膜晶体管及其制造方法、阵列基板以及显示装置 |
-
2017
- 2017-11-23 CN CN201711181291.9A patent/CN107910301B/zh active Active
-
2018
- 2018-05-17 US US15/983,055 patent/US20190157432A1/en not_active Abandoned
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2021
- 2021-09-30 US US17/449,607 patent/US20220020867A1/en active Pending
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US20220020867A1 (en) | 2022-01-20 |
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