KR900005470A - 반도체장치 - Google Patents

반도체장치 Download PDF

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Publication number
KR900005470A
KR900005470A KR1019890013817A KR890013817A KR900005470A KR 900005470 A KR900005470 A KR 900005470A KR 1019890013817 A KR1019890013817 A KR 1019890013817A KR 890013817 A KR890013817 A KR 890013817A KR 900005470 A KR900005470 A KR 900005470A
Authority
KR
South Korea
Prior art keywords
diffusion layer
layer electrode
electrode
gate electrode
semiconductor device
Prior art date
Application number
KR1019890013817A
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English (en)
Other versions
KR930003560B1 (ko
Inventor
구니요시 요시가와
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR900005470A publication Critical patent/KR900005470A/ko
Application granted granted Critical
Publication of KR930003560B1 publication Critical patent/KR930003560B1/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885Hot carrier injection from the channel
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음

Description

반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도~제4도는 본 발명의 1실시예에 따른 EPROM의 구조를 나타낸 평면도.
제5도는 제4도를 Y-Y방향으로 자른 단면도.
제6도는 제4도를 X-X방향으로 자른 단면도.

Claims (4)

  1. 제1의 확산층전극(27)및 제2의 확산층전극(207)과, 이 제1의 확산층전극(27)과 제2의 확산층전극(207)사이의 채널영역위에 형성되어 전기적으로 부유상태로 된 부유게이트전극(32), 이 부유게이트전극(32)위에 형성된 절연막(30), 이 절연막(30)위에 형성된 제어게이트전극(31)을 구비하고, 상기 제1의 확산층전극(27)및 제2의 확산층전극(207)이 상기 부유게이트전극(32)의 긴 변 방향으로 평행하게 형성되고, 부유게이트전극(32)의 짧은 변 방향에 평행하게 제어게이트전극(31)이 형성됨에 따라, 상기 제1의 확산층전극(27)및 제2의 확산층전극(207)과 제어게이트전극(31)의 배선방향이 교차되게 배치되어 있는 불휘발성 반도체장치에 있어서, 상기 제1의 확산층전극(27)및 제2의 확산층전극(207)중 부유게이트전극(32)에 인접하고 있는 부분의 불순물농도가 서로 다른 것을 특징으로 하는 반도체 장치.
  2. 제1항에 있어서, 부유게이트전극(32)에 인접하고있는 제2의확산층전극(207)부분의 불순물농도가 부유게이트전극(32)에 인접하고 있는 제1의 확산층전극(27)부분을 불순물농도보다도 약 1자리수에서 2자리수까지 낮은 것을 특징으로 하는 반도체장치.
  3. 제1항에 있어서, 제1의 확산층전극(27)을 드레인으로 하고 제2의 확산층전극(207)을 소오스로 하여 기입동작을 하도록 된 것을 특징으로 하는 반도체장치.
  4. 제1항에 있어서, 제1의 확산층전극(27)을 소오스로 하고 제2의 확산층전극(207)을 드레인으로 하여 독출동작을 하도록 된 것을 특징으로 하는 반도체 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890013817A 1988-09-26 1989-09-26 반도체장치 KR930003560B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP88-240002 1988-09-26
JP63-240002 1988-09-26
JP63240002A JP2755613B2 (ja) 1988-09-26 1988-09-26 半導体装置

Publications (2)

Publication Number Publication Date
KR900005470A true KR900005470A (ko) 1990-04-14
KR930003560B1 KR930003560B1 (ko) 1993-05-06

Family

ID=17053003

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890013817A KR930003560B1 (ko) 1988-09-26 1989-09-26 반도체장치

Country Status (5)

Country Link
US (1) US5053840A (ko)
EP (1) EP0364769B1 (ko)
JP (1) JP2755613B2 (ko)
KR (1) KR930003560B1 (ko)
DE (1) DE68905425T2 (ko)

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JP2893894B2 (ja) * 1990-08-15 1999-05-24 日本電気株式会社 不揮発性メモリ及びその製造方法
JP2793722B2 (ja) * 1991-01-29 1998-09-03 富士通株式会社 不揮発性半導体記憶装置およびその製造方法
EP0752721B1 (en) * 1995-06-29 2009-04-29 Sharp Kabushiki Kaisha Nonvolatile semiconductor memory and driving method and fabrication method of the same
US5877054A (en) * 1995-06-29 1999-03-02 Sharp Kabushiki Kaisha Method of making nonvolatile semiconductor memory
JP3366173B2 (ja) * 1995-07-31 2003-01-14 シャープ株式会社 不揮発性半導体メモリの製造方法
US5789298A (en) * 1996-11-04 1998-08-04 Advanced Micro Devices, Inc. High performance mosfet structure having asymmetrical spacer formation and method of making the same
US6091100A (en) * 1998-02-06 2000-07-18 Texas Instruments - Acer Incorporated High density NAND structure nonvolatile memories
JP3264241B2 (ja) 1998-02-10 2002-03-11 日本電気株式会社 半導体装置の製造方法
DE19808182C1 (de) * 1998-02-26 1999-08-12 Siemens Ag Elektrisch programmierbare Speicherzellenanordnung und ein Verfahren zu deren Herstellung
US6020606A (en) * 1998-03-20 2000-02-01 United Silicon Incorporated Structure of a memory cell
KR100295136B1 (ko) * 1998-04-13 2001-09-17 윤종용 불휘발성메모리장치및그제조방법
JP3097657B2 (ja) * 1998-05-13 2000-10-10 日本電気株式会社 半導体記憶装置とその製造方法
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DE10058947A1 (de) * 2000-11-28 2002-07-18 Infineon Technologies Ag Nichtflüchtige NOR-Eintransistor-Halbleiterspeicherzelle sowie dazugehörige Halbleiterspeichereinrichtung, Herstellungsverfahren und Verfahren zu deren Programmierung
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US6791191B2 (en) 2001-01-24 2004-09-14 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations
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Also Published As

Publication number Publication date
JP2755613B2 (ja) 1998-05-20
US5053840A (en) 1991-10-01
JPH0287578A (ja) 1990-03-28
EP0364769A3 (en) 1990-05-02
DE68905425T2 (de) 1993-09-09
KR930003560B1 (ko) 1993-05-06
EP0364769A2 (en) 1990-04-25
DE68905425D1 (de) 1993-04-22
EP0364769B1 (en) 1993-03-17

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