KR900002319A - 자외선소거형 불휘발성 반도체기억장치 - Google Patents

자외선소거형 불휘발성 반도체기억장치 Download PDF

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Publication number
KR900002319A
KR900002319A KR1019890009524A KR890009524A KR900002319A KR 900002319 A KR900002319 A KR 900002319A KR 1019890009524 A KR1019890009524 A KR 1019890009524A KR 890009524 A KR890009524 A KR 890009524A KR 900002319 A KR900002319 A KR 900002319A
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KR
South Korea
Prior art keywords
memory device
film
semiconductor memory
insulating film
nonvolatile semiconductor
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KR1019890009524A
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English (en)
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KR930000158B1 (ko
Inventor
세이이치 모리
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
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Publication of KR900002319A publication Critical patent/KR900002319A/ko
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Publication of KR930000158B1 publication Critical patent/KR930000158B1/ko

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885—Hot carrier injection from the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)

Abstract

내용 없음.

Description

자외선소거형 불휘발성 반도체기억장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 자외선소거형 반도체기억장치의 일부구조를 도시한 단면도.
제2도는 제1 도에 일부구조를 도시한 자외선소거형 반도체기억장치의 제조공정을 순차로 도시한 단면도.
제3도는 종래의 자외선소거형 반도체기억장치의 메모리셀구조를 도시한 단면도이다.
* 도면의 주요부분에 대한 부호의 설명
11 : Ｐ형 실린콘반도체기판 12,14,16 : 실리콘산화막
13 : 부유게이트 15실리콘질화막
17 : 제어게이트 18 : 소스영역
19 : 드레인영역 20 : 후산화막(後酸化膜)
21 : 내산화성막

Claims (2)

  1. 반도체기판(11)상에 제 1 절연막(12)을 매개로 형성된 부유게이트(13)와, 이 부유게이트(13)상에 제2절연막을 형성된 제어게이트(17), 상기 부유게이트(13)의 양측에 위치하도록 상기 기판(11)내에 형성된 소스영역(18) 및 드레인영역(19)을 구비하여 구성된 자외선소거형 불휘발성도체기억장치에 있어서, 상기 제 1 절연막 (12)중 상기 드레인영역(19)측 단부의 막두께(20Ｂ)가 상기 소스영역(18)측 단부의 막두께 (20Ａ)보다 두껍게 설정된 것을 특징으로 하는 자외선소거형 불휘발성반도체기억장치.
  2. 제1항에 있어서, 상기 제2절연막이 실리콘산화막(16)과 실리콘질화막(15)을 포함하는 복합막으로 구성된 것을 특징으로 하는 자외선소거형 불휘발성반도체기억장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890009524A 1988-07-05 1989-07-05 자외선소거형 불휘발성 반도체기억장치 KR930000158B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP88-167608 1988-07-05
JP63167608A JPH088311B2 (ja) 1988-07-05 1988-07-05 紫外線消去型不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
KR900002319A true KR900002319A (ko) 1990-02-28
KR930000158B1 KR930000158B1 (ko) 1993-01-09

Family

ID=15852933

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890009524A KR930000158B1 (ko) 1988-07-05 1989-07-05 자외선소거형 불휘발성 반도체기억장치

Country Status (3)

Country Link
US (1) US5051794A (ko)
JP (1) JPH088311B2 (ko)
KR (1) KR930000158B1 (ko)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR920006736B1 (ko) * 1989-11-08 1992-08-17 삼성전자 주식회사 반도체장치 및 그 제조방법
JP2679389B2 (ja) * 1990-10-12 1997-11-19 日本電気株式会社 不揮発性半導体記憶セルのデータ消去方法
US5289030A (en) 1991-03-06 1994-02-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device with oxide layer
US5468987A (en) * 1991-03-06 1995-11-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US5314834A (en) * 1991-08-26 1994-05-24 Motorola, Inc. Field effect transistor having a gate dielectric with variable thickness
TW223178B (en) * 1992-03-27 1994-05-01 Semiconductor Energy Res Co Ltd Semiconductor device and its production method
US6624450B1 (en) 1992-03-27 2003-09-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US5262352A (en) * 1992-08-31 1993-11-16 Motorola, Inc. Method for forming an interconnection structure for conductive layers
US5342801A (en) * 1993-03-08 1994-08-30 National Semiconductor Corporation Controllable isotropic plasma etching technique for the suppression of stringers in memory cells
US5444279A (en) * 1993-08-11 1995-08-22 Micron Semiconductor, Inc. Floating gate memory device having discontinuous gate oxide thickness over the channel region
JP2663887B2 (ja) * 1994-11-29 1997-10-15 日本電気株式会社 不揮発性半導体記憶装置
US5986302A (en) * 1997-02-04 1999-11-16 Denso Corporation Semiconductor memory device
KR19990003490A (ko) * 1997-06-25 1999-01-15 김영환 반도체 소자의 산화막 형성방법
US6063713A (en) 1997-11-10 2000-05-16 Micron Technology, Inc. Methods for forming silicon nitride layers on silicon-comprising substrates
JPH11154711A (ja) 1997-11-20 1999-06-08 Toshiba Corp 半導体装置の製造方法
US6686298B1 (en) 2000-06-22 2004-02-03 Micron Technology, Inc. Methods of forming structures over semiconductor substrates, and methods of forming transistors associated with semiconductor substrates
US6833329B1 (en) 2000-06-22 2004-12-21 Micron Technology, Inc. Methods of forming oxide regions over semiconductor substrates
US6660657B1 (en) * 2000-08-07 2003-12-09 Micron Technology, Inc. Methods of incorporating nitrogen into silicon-oxide-containing layers
US6562684B1 (en) 2000-08-30 2003-05-13 Micron Technology, Inc. Methods of forming dielectric materials
US6878585B2 (en) 2001-08-29 2005-04-12 Micron Technology, Inc. Methods of forming capacitors
US6723599B2 (en) 2001-12-03 2004-04-20 Micron Technology, Inc. Methods of forming capacitors and methods of forming capacitor dielectric layers
JP4567396B2 (ja) * 2004-08-10 2010-10-20 セイコーインスツル株式会社 半導体集積回路装置
JP2006253311A (ja) * 2005-03-09 2006-09-21 Toshiba Corp 半導体装置及びその製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50142173A (ko) * 1974-05-02 1975-11-15
JPS6273774A (ja) * 1985-09-27 1987-04-04 Toshiba Corp 半導体記憶装置の製造方法
JPS62131582A (ja) * 1985-11-26 1987-06-13 モトロ−ラ・インコ−ポレ−テツド 丸いエツジを有する分離した中間層キヤパシタ
JPS62160770A (ja) * 1986-01-09 1987-07-16 Toshiba Corp 絶縁ゲート型電界効果トランジスタおよびその製造方法
US4794565A (en) * 1986-09-15 1988-12-27 The Regents Of The University Of California Electrically programmable memory device employing source side injection
US4878101A (en) * 1986-12-29 1989-10-31 Ning Hsieh Single transistor cell for electrically-erasable programmable read-only memory and array thereof

Also Published As

Publication number Publication date
JPH088311B2 (ja) 1996-01-29
KR930000158B1 (ko) 1993-01-09
JPH0216774A (ja) 1990-01-19
US5051794A (en) 1991-09-24

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