KR910019235A - 반도체기억장치 - Google Patents

반도체기억장치 Download PDF

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Publication number
KR910019235A
KR910019235A KR1019910006368A KR910006368A KR910019235A KR 910019235 A KR910019235 A KR 910019235A KR 1019910006368 A KR1019910006368 A KR 1019910006368A KR 910006368 A KR910006368 A KR 910006368A KR 910019235 A KR910019235 A KR 910019235A
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KR
South Korea
Prior art keywords
memory device
semiconductor memory
substrate
electrode
insulating film
Prior art date
Application number
KR1019910006368A
Other languages
English (en)
Other versions
KR950006472B1 (ko
Inventor
줌페이 구마가이
시즈오 사와다
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR910019235A publication Critical patent/KR910019235A/ko
Application granted granted Critical
Publication of KR950006472B1 publication Critical patent/KR950006472B1/ko

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/34—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being at least partially in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/39—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
    • H10B12/395—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)

Abstract

내용 없음

Description

반도체기억장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명의 제 1 실시예에 따른 메모리셀의 개략적인 평면도, 제 3 도는 제 1 도중의 3-3선에 따른 단면도, 제 15 도는 본 발명의 제 2 실시예에 따른 메모리셀의 개략적인 평면도, 제 16 도는 제 15 도중의 16-16선에 따른 단면도, 제 17 도는 제 15 도중의 17-17선에 따른 단면도.

Claims (1)

  1. 제 1 도 전형의 반도체기판(10,200)상에 제 2 도전형의 확산층으로 형성된 비트선(12,212)과, 일단을 상기 비트선(12,212)에 접속시키고, 다른 단을 제 1 전극(30)에 접속시키며, 상기 기판(10,200)에 대해 거의 수직한 방향으로 채널(18)을 형성하는 종형 트랜지스터 및, 상기 제 1 전극(30)에 유전체막(28)을 매개하여 형성된 제 2 전극(26,24)으로 구성되는 메모리셀을 구비한 반도체기억장치에 있어서, 상기 비트선(12,212)과 상기 기판(10,200)간의 적어도 일부의 영역에 절연막(11,210)을 갖추고, 상기 비트선(12,212)과 상기 기판(10,200)을 상기 절연막(11,210)에 의해 분리하는 것을 특징으로 하는 메모리셀을 구비한 반도체기억장치.
    ※ 참고사항 : 최초출원내용에 의하여 공개하는 것임.
KR1019910006368A 1990-04-21 1991-04-20 반도체기억장치 KR950006472B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2105911A JPH0834302B2 (ja) 1990-04-21 1990-04-21 半導体記憶装置
JP02-105911 1990-04-21

Publications (2)

Publication Number Publication Date
KR910019235A true KR910019235A (ko) 1991-11-30
KR950006472B1 KR950006472B1 (ko) 1995-06-15

Family

ID=14420051

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910006368A KR950006472B1 (ko) 1990-04-21 1991-04-20 반도체기억장치

Country Status (4)

Country Link
EP (1) EP0453998B1 (ko)
JP (1) JPH0834302B2 (ko)
KR (1) KR950006472B1 (ko)
DE (1) DE69126680T2 (ko)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06260610A (ja) * 1993-03-02 1994-09-16 Toshiba Corp 半導体記憶装置及びその製造方法
KR0141218B1 (ko) * 1993-11-24 1998-07-15 윤종용 고집적 반도체장치의 제조방법
KR960016773B1 (en) * 1994-03-28 1996-12-20 Samsung Electronics Co Ltd Buried bit line and cylindrical gate cell and forming method thereof
DE19519160C1 (de) * 1995-05-24 1996-09-12 Siemens Ag DRAM-Zellenanordnung und Verfahren zu deren Herstellung
JP4021602B2 (ja) * 2000-06-16 2007-12-12 株式会社東芝 半導体記憶装置
KR100399436B1 (ko) * 2001-03-28 2003-09-29 주식회사 하이닉스반도체 마그네틱 램 및 그 형성방법
US7262089B2 (en) * 2004-03-11 2007-08-28 Micron Technology, Inc. Methods of forming semiconductor structures
US7122425B2 (en) * 2004-08-24 2006-10-17 Micron Technology, Inc. Methods of forming semiconductor constructions
US7547945B2 (en) 2004-09-01 2009-06-16 Micron Technology, Inc. Transistor devices, transistor structures and semiconductor constructions
US7384849B2 (en) 2005-03-25 2008-06-10 Micron Technology, Inc. Methods of forming recessed access devices associated with semiconductor constructions
US7282401B2 (en) 2005-07-08 2007-10-16 Micron Technology, Inc. Method and apparatus for a self-aligned recessed access device (RAD) transistor gate
US7867851B2 (en) 2005-08-30 2011-01-11 Micron Technology, Inc. Methods of forming field effect transistors on substrates
US7700441B2 (en) 2006-02-02 2010-04-20 Micron Technology, Inc. Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates
US7602001B2 (en) 2006-07-17 2009-10-13 Micron Technology, Inc. Capacitorless one transistor DRAM cell, integrated circuitry comprising an array of capacitorless one transistor DRAM cells, and method of forming lines of capacitorless one transistor DRAM cells
US7772632B2 (en) 2006-08-21 2010-08-10 Micron Technology, Inc. Memory arrays and methods of fabricating memory arrays
US7589995B2 (en) 2006-09-07 2009-09-15 Micron Technology, Inc. One-transistor memory cell with bias gate
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
KR100869353B1 (ko) * 2007-06-26 2008-11-19 주식회사 하이닉스반도체 수직 채널 트랜지스터를 구비한 반도체 소자의 제조 방법
JP5612803B2 (ja) * 2007-12-25 2014-10-22 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体記憶装置
KR100972900B1 (ko) * 2007-12-31 2010-07-28 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법
KR101980865B1 (ko) * 2017-11-28 2019-05-23 주식회사 에스디에이 프로브 카드
CN117794232A (zh) * 2022-09-20 2024-03-29 长鑫存储技术有限公司 半导体结构及其形成方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4364074A (en) * 1980-06-12 1982-12-14 International Business Machines Corporation V-MOS Device with self-aligned multiple electrodes
US4829017A (en) * 1986-09-25 1989-05-09 Texas Instruments Incorporated Method for lubricating a high capacity dram cell
JPH088357B2 (ja) * 1986-12-01 1996-01-29 三菱電機株式会社 縦型ｍｏｓトランジスタ
JPH07105477B2 (ja) * 1988-05-28 1995-11-13 富士通株式会社 半導体装置及びその製造方法
JPH02198170A (ja) * 1989-01-27 1990-08-06 Hitachi Ltd 半導体集積回路装置及びその製造方法

Also Published As

Publication number Publication date
DE69126680T2 (de) 1998-01-02
EP0453998B1 (en) 1997-07-02
KR950006472B1 (ko) 1995-06-15
DE69126680D1 (de) 1997-08-07
JPH045856A (ja) 1992-01-09
EP0453998A1 (en) 1991-10-30
JPH0834302B2 (ja) 1996-03-29

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