KR870005462A - 감지증폭회로 - Google Patents
감지증폭회로 Download PDFInfo
- Publication number
- KR870005462A KR870005462A KR860009693A KR860009693A KR870005462A KR 870005462 A KR870005462 A KR 870005462A KR 860009693 A KR860009693 A KR 860009693A KR 860009693 A KR860009693 A KR 860009693A KR 870005462 A KR870005462 A KR 870005462A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor substrate
- gate electrode
- amplifier circuit
- detection amplifier
- drain
- Prior art date
Links
- 238000001514 detection method Methods 0.000 title description 2
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 5
- 230000003321 amplification Effects 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/919—Elements of similar construction connected in series or parallel to average out manufacturing variations in characteristics
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Amplifiers (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 반도체메모리내의 랫치형 감지증폭회로의 회로도.
제5도는 본 발명의 제1실시예에 관한 감지증폭기 유니트의 구조를 나타낸 도면.
제6도는 본 발명의 제2실시예에 관한 CMOS감지증폭기 유니트의 구조를 나타낸 도면.
*도면의 주요 부분에 대한 부호의 설명
10A,10B,26 : 배선층 12,54 : 기판
14A,14B,30 : 게이트 전극
16A,16B,22A,22B,60A-60D,62A-60D,62A-62H,70A,70B : 접속구
18A,20B : 드레인영역 18B,20A : 소오스영역
24A,24B,52A-52D,58A-58A-58M,68 : 도전층 50A,50B,72A,72B : 감지증폭기
56A-56F : n-형 영역 64A,64B : 전극층
74 : n-형 웰영역 76A-76F : P-형 영역
Claims (1)
- 반도체기판과 이 반도체기판의 상방에서 한 방향으로 연장된 제1게이트전극 및 이 제1게이트전극의 양측에서 반도체기판내에 자기정합적으로 형성되어 1쌍의 소오스와 드레인으로 동작하는 제1, 제2반도체영역으로 이루어진 제1 MIS트랜지스터와, 반도체기판의 상방에서 한 방향으로 연장된 제2게이트전극과 이 제2게이트전극의 양측에서 반도체기판내에 자기정합적으로 형성되어 1쌍의 소오스와 드레인으로 동작하는 제3, 제4반도체영역으로 이루어진 제2 MIS트랜지스터를 구비하고 있는 감지증폭회로에 있어서,상기 제1, 제2MIS트랜지스터 상호간에 그 드레인으로부터 소오스로의 배열방향을 일치시킨 것을 특징으로 하는 감지증폭회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60-256084 | 1985-11-15 | ||
JP60256084A JPH0642537B2 (ja) | 1985-11-15 | 1985-11-15 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR870005462A true KR870005462A (ko) | 1987-06-09 |
KR910001159B1 KR910001159B1 (ko) | 1991-02-25 |
Family
ID=17287667
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019860009693A KR910001159B1 (ko) | 1985-11-15 | 1986-11-14 | 감지증폭회로 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5175604A (ko) |
EP (1) | EP0222396B1 (ko) |
JP (1) | JPH0642537B2 (ko) |
KR (1) | KR910001159B1 (ko) |
DE (1) | DE3677141D1 (ko) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0192992A (ja) | 1987-10-02 | 1989-04-12 | Matsushita Electric Ind Co Ltd | センスアンプ回路 |
JPH01130574A (ja) * | 1987-11-17 | 1989-05-23 | Rohm Co Ltd | 半導体装置 |
JPH0738547B2 (ja) * | 1988-07-25 | 1995-04-26 | 日本電気株式会社 | 演算増幅器 |
JP2700489B2 (ja) * | 1989-05-18 | 1998-01-21 | 三菱電機株式会社 | 半導体記憶装置 |
US5289040A (en) * | 1991-08-12 | 1994-02-22 | National Semiconductor Corporation | Compensating lead structure for distributed IC components |
US5389810A (en) * | 1992-03-27 | 1995-02-14 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device having at least one symmetrical pair of MOSFETs |
JP3533227B2 (ja) * | 1992-09-10 | 2004-05-31 | 株式会社日立製作所 | 半導体記憶装置 |
JP3004177B2 (ja) * | 1993-09-16 | 2000-01-31 | 株式会社東芝 | 半導体集積回路装置 |
TW310470B (ko) * | 1995-05-01 | 1997-07-11 | Micron Technology Inc | |
JP2004235515A (ja) | 2003-01-31 | 2004-08-19 | Renesas Technology Corp | 半導体装置 |
US20080031029A1 (en) * | 2006-08-05 | 2008-02-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor memory device with split bit-line structure |
KR100761854B1 (ko) | 2006-08-08 | 2007-09-28 | 삼성전자주식회사 | 비트라인 이퀄라이저 및 이를 구비하는 반도체 메모리장치, 그리고 비트라인 이퀄라이저의 제조 방법 |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3477031A (en) * | 1966-09-09 | 1969-11-04 | Hitachi Ltd | Differential amplifier circuit employing multiple differential amplifier stages |
FR1563879A (ko) * | 1968-02-09 | 1969-04-18 | ||
JPS53675B2 (ko) * | 1972-03-16 | 1978-01-11 | ||
JPS5927101B2 (ja) * | 1976-06-21 | 1984-07-03 | 日本電信電話株式会社 | 半導体装置 |
JPS538528A (en) * | 1976-07-12 | 1978-01-26 | Nec Corp | Memory circuit |
JPS5925381B2 (ja) * | 1977-12-30 | 1984-06-16 | 富士通株式会社 | 半導体集積回路装置 |
JPS55115353A (en) * | 1979-02-27 | 1980-09-05 | Fujitsu Ltd | Cell rotatable by 90 |
JPS5615079A (en) * | 1979-07-16 | 1981-02-13 | Mitsubishi Electric Corp | Insulated gate field effect transistor couple |
US4280855A (en) * | 1980-01-23 | 1981-07-28 | Ibm Corporation | Method of making a dual DMOS device by ion implantation and diffusion |
US4356504A (en) * | 1980-03-28 | 1982-10-26 | International Microcircuits, Inc. | MOS Integrated circuit structure for discretionary interconnection |
DE3101520A1 (de) * | 1981-01-19 | 1982-08-26 | Siemens AG, 1000 Berlin und 8000 München | Monolithisch integrierter halbleiterspeicher |
JPS5812195A (ja) * | 1981-07-15 | 1983-01-24 | Nec Corp | 半導体記憶装置 |
JPS5943824B2 (ja) * | 1982-03-03 | 1984-10-24 | 三菱電機株式会社 | 半導体集積回路装置 |
JPS5927101A (ja) * | 1982-08-02 | 1984-02-13 | 大阪瓦斯株式会社 | 廃熱回収装置 |
JPS6065547A (ja) * | 1983-09-20 | 1985-04-15 | Sharp Corp | 半導体装置 |
JPS60130855A (ja) * | 1983-12-20 | 1985-07-12 | Toshiba Corp | 半導体集積回路 |
EP0170052B1 (en) * | 1984-07-02 | 1992-04-01 | Fujitsu Limited | Master slice type semiconductor circuit device |
JPS61100947A (ja) * | 1984-10-22 | 1986-05-19 | Toshiba Corp | 半導体集積回路装置 |
JPH0638468B2 (ja) * | 1984-12-18 | 1994-05-18 | 三洋電機株式会社 | 半導体集積回路装置 |
JPH0752757B2 (ja) * | 1985-04-12 | 1995-06-05 | 株式会社日立製作所 | 半導体記憶装置 |
US4602270A (en) * | 1985-05-17 | 1986-07-22 | United Technologies Corporation | Gate array with reduced isolation |
-
1985
- 1985-11-15 JP JP60256084A patent/JPH0642537B2/ja not_active Expired - Lifetime
-
1986
- 1986-11-12 EP EP86115726A patent/EP0222396B1/en not_active Expired - Lifetime
- 1986-11-12 DE DE8686115726T patent/DE3677141D1/de not_active Expired - Lifetime
- 1986-11-14 KR KR1019860009693A patent/KR910001159B1/ko not_active IP Right Cessation
-
1991
- 1991-04-08 US US07/681,665 patent/US5175604A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS62115861A (ja) | 1987-05-27 |
US5175604A (en) | 1992-12-29 |
JPH0642537B2 (ja) | 1994-06-01 |
DE3677141D1 (de) | 1991-02-28 |
EP0222396B1 (en) | 1991-01-23 |
EP0222396A1 (en) | 1987-05-20 |
KR910001159B1 (ko) | 1991-02-25 |
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Legal Events
Date | Code | Title | Description |
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20060131 Year of fee payment: 16 |
|
EXPY | Expiration of term |