DE3686490T2 - Halbleiterstruktur. - Google Patents
Halbleiterstruktur.Info
- Publication number
- DE3686490T2 DE3686490T2 DE8686400082T DE3686490T DE3686490T2 DE 3686490 T2 DE3686490 T2 DE 3686490T2 DE 8686400082 T DE8686400082 T DE 8686400082T DE 3686490 T DE3686490 T DE 3686490T DE 3686490 T2 DE3686490 T2 DE 3686490T2
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor structure
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US69306285A | 1985-01-22 | 1985-01-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3686490D1 DE3686490D1 (de) | 1992-10-01 |
DE3686490T2 true DE3686490T2 (de) | 1993-03-18 |
Family
ID=24783153
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686400082T Expired - Lifetime DE3686490T2 (de) | 1985-01-22 | 1986-01-16 | Halbleiterstruktur. |
Country Status (4)
Country | Link |
---|---|
EP (2) | EP0490877A3 (de) |
JP (1) | JPS61210662A (de) |
CA (3) | CA1264865A (de) |
DE (1) | DE3686490T2 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1235824A (en) * | 1985-06-28 | 1988-04-26 | Vu Q. Ho | Vlsi mosfet circuits using refractory metal and/or refractory metal silicide |
GB2194676B (en) * | 1986-07-30 | 1991-03-20 | Mitsubishi Electric Corp | A semiconductor integrated circuit device and a method of producing same |
JPS63284854A (ja) * | 1987-05-18 | 1988-11-22 | Seiko Epson Corp | 半導体装置とその製造方法 |
NL8800220A (nl) * | 1988-01-29 | 1989-08-16 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij een metalen geleiderspoor op een oppervlak van een halfgeleiderlichaam wordt gebracht. |
US5079182A (en) * | 1990-04-02 | 1992-01-07 | National Semiconductor Corporation | Bicmos device having self-aligned well tap and method of fabrication |
US5094981A (en) * | 1990-04-17 | 1992-03-10 | North American Philips Corporation, Signetics Div. | Technique for manufacturing interconnections for a semiconductor device by annealing layers of titanium and a barrier material above 550° C. |
TW215975B (de) * | 1991-12-30 | 1993-11-11 | American Telephone & Telegraph | |
JP3256048B2 (ja) * | 1993-09-20 | 2002-02-12 | 富士通株式会社 | 半導体装置及びその製造方法 |
US5541427A (en) * | 1993-12-03 | 1996-07-30 | International Business Machines Corporation | SRAM cell with capacitor |
US8394683B2 (en) | 2008-01-15 | 2013-03-12 | Micron Technology, Inc. | Methods of forming semiconductor constructions, and methods of forming NAND unit cells |
US10665702B2 (en) * | 2017-12-27 | 2020-05-26 | Samsung Electronics Co., Ltd. | Vertical bipolar transistors |
WO2019148170A2 (en) * | 2018-01-29 | 2019-08-01 | Massachusetts Institute Of Technology | Back-gate field-effect transistors and methods for making the same |
EP3803365A4 (de) | 2018-06-08 | 2022-01-26 | Massachusetts Institute of Technology | Systeme, vorrichtungen und verfahren zur gasdetektion |
WO2020086181A2 (en) | 2018-09-10 | 2020-04-30 | Massachusetts Institute Of Technology | Systems and methods for designing integrated circuits |
CN112840448A (zh) | 2018-09-24 | 2021-05-25 | 麻省理工学院 | 通过工程化原子层沉积对碳纳米管的可调掺杂 |
WO2020113205A1 (en) | 2018-11-30 | 2020-06-04 | Massachusetts Institute Of Technology | Rinse - removal of incubated nanotubes through selective exfoliation |
CN110277372B (zh) * | 2019-07-23 | 2024-05-31 | 南方电网科学研究院有限责任公司 | 一种集成电路光刻蚀结构,制备方法及集成电路 |
CN113809073B (zh) * | 2020-08-31 | 2024-03-22 | 台湾积体电路制造股份有限公司 | 具有有源区域凹凸部的集成电路 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3648125A (en) | 1971-02-02 | 1972-03-07 | Fairchild Camera Instr Co | Method of fabricating integrated circuits with oxidized isolation and the resulting structure |
CA1120611A (en) * | 1978-12-29 | 1982-03-23 | Hormazdyar M. Dalal | Forming interconnections for multilevel interconnection metallurgy systems |
JPS5638869A (en) * | 1979-09-07 | 1981-04-14 | Seiko Epson Corp | Manufacture of mos-type semiconductor device |
NL8103032A (nl) * | 1980-08-04 | 1982-03-01 | Fairchild Camera Instr Co | Werkwijze voor het vervaardigen van een snelwerkende bipolaire transistor en transistor vervaardigd volgens deze werkwijze. |
JPS5780739A (en) * | 1980-11-07 | 1982-05-20 | Hitachi Ltd | Semiconductor integrated circuit device and manufacture thereof |
EP0054259B1 (de) * | 1980-12-12 | 1986-08-06 | Kabushiki Kaisha Toshiba | Verfahren zur Herstellung einer Halbleiteranordnung vom MIS-Typ |
JPS57132352A (en) * | 1981-02-10 | 1982-08-16 | Mitsubishi Electric Corp | Complementary type metal oxide semiconductor integrated circuit device |
JPS58138053A (ja) * | 1982-02-12 | 1983-08-16 | Nec Corp | 半導体装置およびその製造方法 |
JPS5832469A (ja) * | 1981-08-20 | 1983-02-25 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US4554644A (en) * | 1982-06-21 | 1985-11-19 | Fairchild Camera & Instrument Corporation | Static RAM cell |
JPS5910270A (ja) * | 1982-07-09 | 1984-01-19 | Nec Corp | 半導体集積回路装置 |
DE3235880A1 (de) * | 1982-09-28 | 1984-04-05 | Siemens AG, 1000 Berlin und 8000 München | Statische speicherzelle in zwei-kanal-technik |
JPS5982760A (ja) * | 1982-11-02 | 1984-05-12 | Nec Corp | 相補型半導体集積回路装置 |
DE3304642A1 (de) * | 1983-02-10 | 1984-08-16 | Siemens AG, 1000 Berlin und 8000 München | Integrierte halbleiterschaltung mit bipolartransistor-strukturen und verfahren zu ihrer herstellung |
JPS59181672A (ja) * | 1983-03-31 | 1984-10-16 | Toshiba Corp | 半導体装置の製造方法 |
US4539744A (en) | 1984-02-03 | 1985-09-10 | Fairchild Camera & Instrument Corporation | Semiconductor planarization process and structures made thereby |
US4654269A (en) | 1985-06-21 | 1987-03-31 | Fairchild Camera & Instrument Corp. | Stress relieved intermediate insulating layer for multilayer metalization |
-
1986
- 1986-01-16 DE DE8686400082T patent/DE3686490T2/de not_active Expired - Lifetime
- 1986-01-16 EP EP19920102717 patent/EP0490877A3/en not_active Withdrawn
- 1986-01-16 EP EP86400082A patent/EP0190070B1/de not_active Expired - Lifetime
- 1986-01-21 JP JP61009058A patent/JPS61210662A/ja active Pending
- 1986-01-21 CA CA000499954A patent/CA1264865A/en not_active Expired - Fee Related
-
1989
- 1989-10-04 CA CA000615507A patent/CA1284391C/en not_active Expired - Fee Related
-
1990
- 1990-12-18 CA CA000615959A patent/CA1307055C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0190070A3 (en) | 1987-09-23 |
JPS61210662A (ja) | 1986-09-18 |
DE3686490D1 (de) | 1992-10-01 |
CA1284391C (en) | 1991-05-21 |
EP0490877A2 (de) | 1992-06-17 |
EP0490877A3 (en) | 1992-08-26 |
CA1264865A (en) | 1990-01-23 |
EP0190070B1 (de) | 1992-08-26 |
CA1307055C (en) | 1992-09-01 |
EP0190070A2 (de) | 1986-08-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |