DE3669793D1 - Halbleiterkreiseinrichtung. - Google Patents

Halbleiterkreiseinrichtung.

Info

Publication number
DE3669793D1
DE3669793D1 DE8686300240T DE3669793T DE3669793D1 DE 3669793 D1 DE3669793 D1 DE 3669793D1 DE 8686300240 T DE8686300240 T DE 8686300240T DE 3669793 T DE3669793 T DE 3669793T DE 3669793 D1 DE3669793 D1 DE 3669793D1
Authority
DE
Germany
Prior art keywords
semiconductor circuit
semiconductor
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686300240T
Other languages
English (en)
Inventor
Takumi Miyashita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3669793D1 publication Critical patent/DE3669793D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H01L27/0222—Charge pumping, substrate bias generation structures
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/901—MOSFET substrate bias

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE8686300240T 1985-01-16 1986-01-15 Halbleiterkreiseinrichtung. Expired - Fee Related DE3669793D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60005333A JPS61164249A (ja) 1985-01-16 1985-01-16 半導体装置

Publications (1)

Publication Number Publication Date
DE3669793D1 true DE3669793D1 (de) 1990-04-26

Family

ID=11608308

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686300240T Expired - Fee Related DE3669793D1 (de) 1985-01-16 1986-01-15 Halbleiterkreiseinrichtung.

Country Status (5)

Country Link
US (1) US4864373A (de)
EP (1) EP0188378B1 (de)
JP (1) JPS61164249A (de)
KR (1) KR890004961B1 (de)
DE (1) DE3669793D1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0666443B2 (ja) * 1988-07-07 1994-08-24 株式会社東芝 半導体メモリセルおよび半導体メモリ
JPH0831791B2 (ja) * 1988-12-28 1996-03-27 三菱電機株式会社 半導体装置
US5196374A (en) * 1990-01-26 1993-03-23 Sgs-Thomson Microelectronics, Inc. Integrated circuit package with molded cell
US5403782A (en) * 1992-12-21 1995-04-04 Sgs-Thomson Microelectronics, Inc. Surface mountable integrated circuit package with integrated battery mount
US5338978A (en) * 1993-02-10 1994-08-16 National Semiconductor Corporation Full swing power down buffer circuit with multiple power supply isolation
US5387826A (en) * 1993-02-10 1995-02-07 National Semiconductor Corporation Overvoltage protection against charge leakage in an output driver
US5381061A (en) * 1993-03-02 1995-01-10 National Semiconductor Corporation Overvoltage tolerant output buffer circuit
US5406140A (en) * 1993-06-07 1995-04-11 National Semiconductor Corporation Voltage translation and overvoltage protection
KR100282287B1 (ko) * 1993-06-07 2001-02-15 클라크 3세 존 엠. 과전압에 대한 보호
US6252452B1 (en) 1998-08-25 2001-06-26 Kabushiki Kaisha Toshiba Semiconductor device
US6639924B2 (en) * 2000-12-22 2003-10-28 Ngk Insulators, Ltd. Driving module of laser diode
US9325308B2 (en) * 2014-05-30 2016-04-26 Delta Electronics, Inc. Semiconductor device and cascode circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3794862A (en) * 1972-04-05 1974-02-26 Rockwell International Corp Substrate bias circuit
JPS5189392A (de) * 1975-02-03 1976-08-05
US4115710A (en) * 1976-12-27 1978-09-19 Texas Instruments Incorporated Substrate bias for MOS integrated circuit
JPS5627952A (en) * 1979-08-17 1981-03-18 Hitachi Ltd Circuit for generating substrate bias voltage
JPS5632758A (en) * 1979-08-27 1981-04-02 Fujitsu Ltd Substrate bias generating circuit
JPS5739566A (en) * 1980-08-22 1982-03-04 Toshiba Corp Semiconductor device
US4631421A (en) * 1984-08-14 1986-12-23 Texas Instruments CMOS substrate bias generator
US4628214A (en) * 1985-05-22 1986-12-09 Sgs Semiconductor Corporation Back bias generator

Also Published As

Publication number Publication date
KR890004961B1 (en) 1989-12-02
EP0188378A3 (en) 1986-11-26
EP0188378B1 (de) 1990-03-21
US4864373A (en) 1989-09-05
EP0188378A2 (de) 1986-07-23
JPS61164249A (ja) 1986-07-24
JPH0363827B2 (de) 1991-10-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee