DE3686994D1 - Halbleiterspeicher. - Google Patents

Halbleiterspeicher.

Info

Publication number
DE3686994D1
DE3686994D1 DE8686308476T DE3686994T DE3686994D1 DE 3686994 D1 DE3686994 D1 DE 3686994D1 DE 8686308476 T DE8686308476 T DE 8686308476T DE 3686994 T DE3686994 T DE 3686994T DE 3686994 D1 DE3686994 D1 DE 3686994D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686308476T
Other languages
English (en)
Other versions
DE3686994T2 (de
Inventor
Shigeru Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE3686994D1 publication Critical patent/DE3686994D1/de
Application granted granted Critical
Publication of DE3686994T2 publication Critical patent/DE3686994T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/04Addressing variable-length words or parts of words
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/60Memory management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Dram (AREA)
  • Image Processing (AREA)
  • Memory System (AREA)
DE8686308476T 1985-10-30 1986-10-30 Halbleiterspeicher. Expired - Fee Related DE3686994T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60243354A JPS62103893A (ja) 1985-10-30 1985-10-30 半導体メモリ及び半導体メモリシステム

Publications (2)

Publication Number Publication Date
DE3686994D1 true DE3686994D1 (de) 1992-11-26
DE3686994T2 DE3686994T2 (de) 1993-04-08

Family

ID=17102585

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686308476T Expired - Fee Related DE3686994T2 (de) 1985-10-30 1986-10-30 Halbleiterspeicher.

Country Status (4)

Country Link
US (1) US4833657A (de)
EP (1) EP0225059B1 (de)
JP (1) JPS62103893A (de)
DE (1) DE3686994T2 (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5201037A (en) * 1986-04-28 1993-04-06 Hitachi, Ltd. Multi-port memory as a frame buffer
JPH0731496B2 (ja) * 1986-07-25 1995-04-10 沖電気工業株式会社 画像表示制御装置
US5276846A (en) * 1986-09-15 1994-01-04 International Business Machines Corporation Fast access memory structure
JPS63195452U (de) * 1987-06-02 1988-12-15
GB2206984B (en) * 1987-07-14 1992-01-15 Sony Corp Methods of and apparatus for storing digital video signals
JPS6428752A (en) * 1987-07-24 1989-01-31 Toshiba Corp Data processor
DE3829261A1 (de) * 1988-08-29 1990-03-01 Siemens Ag Verfahren zur abfrage der daten eines bildspeichers einer datenverarbeitungsanlage
US4916654A (en) * 1988-09-06 1990-04-10 International Business Machines Corporation Method for transfer of data via a window buffer from a bit-planar memory to a selected position in a target memory
US4982343A (en) * 1988-10-11 1991-01-01 Next, Inc. Method and apparatus for displaying a plurality of graphic images
US5027326A (en) * 1988-11-10 1991-06-25 Dallas Semiconductor Corporation Self-timed sequential access multiport memory
US5179691A (en) * 1989-04-12 1993-01-12 Unisys Corporation N-byte stack-oriented CPU using a byte-selecting control for enhancing a dual-operation with an M-byte instruction word user program where M<N<2M
US5121354A (en) * 1990-03-12 1992-06-09 International Business Machines Corp. Random access memory with access on bit boundaries
JPH0831276B2 (ja) * 1990-06-15 1996-03-27 松下電器産業株式会社 半導体メモリ
US5121360A (en) * 1990-06-19 1992-06-09 International Business Machines Corporation Video random access memory serial port access
US5179372A (en) * 1990-06-19 1993-01-12 International Business Machines Corporation Video Random Access Memory serial port access
US5285421A (en) * 1990-07-25 1994-02-08 Advanced Micro Devices Scheme for eliminating page boundary limitation on initial access of a serial contiguous access memory
US5247644A (en) * 1991-02-06 1993-09-21 Advanced Micro Devices, Inc. Processing system with improved sequential memory accessing
US5559990A (en) * 1992-02-14 1996-09-24 Advanced Micro Devices, Inc. Memories with burst mode access
US5544338A (en) * 1992-12-31 1996-08-06 International Business Machines Corporation Apparatus and method for raster generation from sparse area array output
US5500818A (en) * 1993-10-29 1996-03-19 Sun Microsystems, Inc. Method and apparatus for providing accurate T(on) and T(off) times for the output of a memory array
US6671219B1 (en) * 1999-05-28 2003-12-30 Hitachi, Ltd. Storage, storage method, and data processing system
US7225281B2 (en) 2001-08-27 2007-05-29 Intel Corporation Multiprocessor infrastructure for providing flexible bandwidth allocation via multiple instantiations of separate data buses, control buses and support mechanisms
US6868476B2 (en) * 2001-08-27 2005-03-15 Intel Corporation Software controlled content addressable memory in a general purpose execution datapath
US7216204B2 (en) 2001-08-27 2007-05-08 Intel Corporation Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment
US7487505B2 (en) * 2001-08-27 2009-02-03 Intel Corporation Multithreaded microprocessor with register allocation based on number of active threads
US7610451B2 (en) * 2002-01-25 2009-10-27 Intel Corporation Data transfer mechanism using unidirectional pull bus and push bus
US7337275B2 (en) * 2002-08-13 2008-02-26 Intel Corporation Free list and ring data structure management
US6941438B2 (en) * 2003-01-10 2005-09-06 Intel Corporation Memory interleaving
US7213099B2 (en) * 2003-12-30 2007-05-01 Intel Corporation Method and apparatus utilizing non-uniformly distributed DRAM configurations and to detect in-range memory address matches
FR2884002B1 (fr) * 2005-04-01 2008-03-07 St Microelectronics Sa Procede d'adressage d'un symbole dans une memoire, et dispositif de traitement de symboles
DE102006009026A1 (de) * 2006-02-27 2007-08-30 Infineon Technologies Ag Speicheranordnung
KR100764052B1 (ko) * 2006-08-03 2007-10-08 삼성전자주식회사 유동적 어드레스 바운더리를 갖는 플래시 메모리 장치 및그것의 프로그램 방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3440615A (en) 1966-08-22 1969-04-22 Ibm Overlapping boundary storage
JPS53114617A (en) * 1977-03-17 1978-10-06 Toshiba Corp Memory unit for picture processing
JPS55118170A (en) * 1979-03-06 1980-09-10 Mitsubishi Electric Corp Memory access device
DE3015125A1 (de) * 1980-04-19 1981-10-22 Ibm Deutschland Gmbh, 7000 Stuttgart Einrichtung zur speicherung und darstellung graphischer information
DE3138897A1 (de) * 1981-09-30 1983-04-14 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zur verarbeitung von speicheroperanden fuer dezimale und logische befehle
US4500958A (en) 1982-04-21 1985-02-19 Digital Equipment Corporation Memory controller with data rotation arrangement
DE3381991D1 (de) * 1982-06-28 1990-12-20 Toshiba Kawasaki Kk Bildanzeigesteuereinrichtung.
US4667190A (en) * 1982-07-30 1987-05-19 Honeywell Inc. Two axis fast access memory
JPS59174958A (ja) * 1983-03-24 1984-10-03 Ricoh Co Ltd メモリへのデ−タ書込み方法
JPS59218566A (ja) * 1983-05-27 1984-12-08 Hitachi Ltd メモリアクセス回路
US4667313A (en) * 1985-01-22 1987-05-19 Texas Instruments Incorporated Serially accessed semiconductor memory with tapped shift register
US4742474A (en) * 1985-04-05 1988-05-03 Tektronix, Inc. Variable access frame buffer memory

Also Published As

Publication number Publication date
DE3686994T2 (de) 1993-04-08
JPS62103893A (ja) 1987-05-14
JPH0420489B2 (de) 1992-04-03
EP0225059A2 (de) 1987-06-10
US4833657A (en) 1989-05-23
EP0225059A3 (en) 1989-09-20
EP0225059B1 (de) 1992-10-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee