CN101114628B - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN101114628B
CN101114628B CN200710001452.1A CN200710001452A CN101114628B CN 101114628 B CN101114628 B CN 101114628B CN 200710001452 A CN200710001452 A CN 200710001452A CN 101114628 B CN101114628 B CN 101114628B
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wire
electrode
projection
semiconductor chip
semiconductor device
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CN200710001452.1A
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CN101114628A (zh
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西村隆雄
成泽良明
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Socionext Inc
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Fujitsu Semiconductor Ltd
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Abstract

本发明提供一种小且高性能的半导体器件及该半导体器件的有效制造方法，在该半导体器件中防止了相邻导线的接触，从而提高了设计线路配置图的灵活性。本发明的半导体器件包括：基板(10)，其表面上设置有电极(21A)；以及第一半导体元件(11A)，包括设置在其表面上的电极(22)，并且该第一半导体元件(11A)由该基板(10)支撑，其中，第一导线(41)通过第一凸块(31)连接到该基板(10)和该第一半导体元件(11A)的上方的所述电极中的至少一个电极(即电极(21)和电极(22)中的至少一个)，并且第二导线(42)通过第二凸块(32)连接到第一导线(41)的焊接部分。

Description

半导体器件及其制造方法
相关申请的交叉参考
本申请基于并且要求2006年7月27日提交的在先日本专利申请No.2006-205381的优先权，其全部内容通过参考合并于此。
技术领域
本发明涉及一种半导体器件及其制造方法。尤其是，本发明涉及这样一种半导体器件及该半导体器件的有效制造方法，在这种半导体器件中防止了相邻导线的接触，从而提高了设计线路配置图的灵活性。
背景技术
传统上，在半导体器件中相邻电极之间的电连接有时会涉及多条导线与半导体芯片或半导体元件上形成的一个电极的连接(例如，参见日本专利申请特开(JP-A)No.04-142073、No.06-37250、No.11-204720、No.2000-114452、No.2000-307057、No.2002-110898、No.2003-243436、以及No.2003-243442)。
在这种情况下，可以通过将多条导线(例如两条导线)与半导体芯片上的一个电极端子相连接来减少电极端子的数量，并因此实现半导体芯片的最小化，从而减小半导体器件的尺寸。
日本专利申请No.04-142073、No.06-37250、No.11-20472、No.2000-114452、No.2000-307057、No.2002-110898、No.2003-243436、以及No.2003-243442公开了一种半导体器件，其中多个半导体芯片以一个在另一个的顶部上的方式互相层叠，并且通过导线互相连接。
这种半导体器件内具有多个半导体芯片，因此能够提供高性能和多功能性。此外，当半导体器件安装在***板等上时，由于半导体芯片以一个在另一个的顶部上的方式互相层叠，因此可以减小***板中由半导体器件所占用的面积。
而且，在这种具有多个半导体芯片的半导体器件中，一个半导体芯片的电极焊盘通过导线连接到另一个半导体芯片的电极焊盘，并且连接到一起的电极焊盘中的一个电极焊盘还使用另一条导线连接到又一个半导体芯片的电极焊盘、布线板的焊盘或者引线框的焊接引线。
由于可以避免使用过长的导线，因此具有这种结构的半导体器件与使用不同导线将单个半导体芯片的电极焊盘连接到布线板的焊盘或引线框的焊接引线的半导体器件相比具有优势。太长的导线会导致难以控制稳定的导线环路(wire loop)的形成，由此在布线时可能使相邻的导线相互接触，从而不期望地降低产量。而且，由于导线环路的高度增加而导致不能实现半导体器件的小型化(变小)。另外，导线易于变形。为此，当将导线封装在树脂中时，流动的树脂使相邻的导线相互接触，这会导致所得到的半导体器件出现故障。
如上所述，前述结构适于减小半导体器件的尺寸。但是用于实现这种结构的导线焊接会导致以下问题。特别是，日本专利申请No.04-142073、No.06-37250和No.11-204720没有公开具体的线路配置图(wiring layout)(即，形成导线的环路形状和方法)，可以看到由导线形成而导致相邻导线接触的可能性很高。
日本专利申请No.2000-307057和No.2004-221264公开了一种将两条导线(第一和第二导线)焊接到一个电极焊盘的方法。更具体地，预先在待焊接两条导线的半导体芯片的电极焊盘上设置凸块(bump)。在另一个半导体芯片的电极焊盘、布线板的焊接焊盘或者引线框的焊接引线上进行第一焊接，之后在该凸块上进行第二焊接，以形成第一导线。随后，在另一个半导体芯片的电极焊盘、布线板的焊盘或者引线框的焊接引线上进行第一焊接，之后在该凸块上进行第二焊接，以形成第二导线。
通常用于第一焊接的导线焊接操作采用所谓的球焊(也称为“钉头式接合”)，其中通过将导线的一端点火(spark)而形成球状物，并且通过焊针(bonding capillary)施加负荷和超声振动来将所得到的球状物焊接到电极焊盘等上。第二焊接通过所谓的针脚式焊(stitch bonding)来进行，其中在焊针的末端(表面)将导线压在电极焊盘等上。但是，这种方案具有如下问题，即在凸块上第二导线的第二焊接端要形成在或紧邻于第一导线的第二焊接末端的情况下，一旦进行第二导线的第二焊接，焊针就不期望地接触到预先形成的第一导线的第二焊接端，因此会导致第一导线的第二焊接端的连接劣化。
日本专利申请No.2000-114452、No.2000-307057、No.2002-110898、No.2003-243436和No.2003-243442还公开了一种在一个电极焊盘上焊接两条导线的方法。
更具体地，预先在待焊接两条导线的半导体芯片的电极焊盘上设置凸块。然后，在另一个半导体芯片的电极焊盘、布线板的焊盘或者引线框的焊接引线上进行第一焊接，之后在该凸块上进行第二焊接，以形成第一导线。随后，在另一个半导体芯片的电极焊盘、布线板的焊盘或者引线框的焊接引线上进行第一焊接，之后在该凸块上进行第二焊接，以形成第二导线。注意，如上所述，通常采用所谓的球焊进行第一焊接，并采用所谓的针脚式焊进行第二焊接。
由这种通常的焊接操作形成的导线环路的形状为使其在第一焊接侧从第一焊接端向上升高，水平地位于第二焊接侧并且朝着第一焊接端逐渐升高。因此，导线环路的高度在第一焊接侧较高，而在第二焊接侧较低。因此，类似环形的导线以阶梯图案连续地产生。
当要将导线封装到密封树脂中时，必须设置导线以根据半导体芯片上的电极焊盘、布线板的焊盘以及引线框的焊接引线的设置来使相邻的两条导线交叉。这有时会使导线焊接操作难以进行。此外，如果相邻的导线交叉，则会存在这样一个问题，即所得到的半导体器件由于导线的接触而不能正常工作。例如，如日本专利申请No.04-142073中的图1A所示，当类似的环路导线以阶梯图案连续形成时，在导线交叉处可能发生短路。
目前还没有提供这样一种技术，其能在通过导线焊接电连接半导体器件中相邻的电极时避免导线相互接触，从而使设计线路配置图时更为灵活。因此，期望进行深入的研究。
发明内容
本发明的目的是解决上述传统问题并且实现下述目的。
具体地，本发明的目的是提供一种小且高性能的半导体器件以及该半导体器件的有效制造方法，在该半导体器件中防止了相邻导线之间的接触，从而提高了在设计线路配置图时的灵活性。
以下是用于解决上述问题的装置：
本发明的半导体器件包括：基板，其表面上设置有电极；第一半导体元件，其表面上设置有电极，并且该第一半导体元件由该基板支撑第一导线，其通过第一凸块连接到布置在该第一半导体元件上的电极中的至少一个电极；第二导线，其通过第二凸块连接到该第一导线的焊接部分；第三导线，其与该第一导线和该第二导线中的至少一条导线交叉，并且设置为远离该第一导线和该第二导线，所述第三导线的环路的顶部高度的位置不同于所述第一导线和所述第二导线中的至少一个环路的顶部高度的位置；以及第二半导体元件，其表面上设置有电极，并且该第二半导体元件由该第一半导体元件支撑，所述第二导线和所述第三导线都连接到所述第二半导体元件。
在该半导体器件中，该第一导线和该第二导线连接到位于该基板和该第一半导体元件的上方的电极中的至少一个电极，并且该第二凸块设置在该第一导线和该第二导线之间，因此防止了该第一导线的焊接部分劣化。此外，可以避免相邻导线的互相接触，特别是在它们设置成相互交叉的情况下由于接触而导致的短路，由此实现了设计线路配置图的灵活性的提高。因此能够实现高密度布线，并且所得到的半导体器件小且性能高。
本发明的半导体器件包括：第一半导体元件，其表面上设置有电极；以及基底，其表面上设置有电极，并且该基底由该第一半导体元件支撑，其中，第一导线通过第一凸块连接到设置在该基底和该第一半导体元件中的至少一个上的电极中的至少一个电极，以及第二导线通过第二凸块连接到该第一导线的焊接部分。
同样，在该半导体器件中，该第一导线和该第二导线连接到该基板和该第一半导体元件的上方的电极中的至少一个电极，并且该第二凸块设置在该第一导线和该第二导线之间，因此不仅防止了该第一导线的焊接部分劣化，而且防止了相邻导线相互接触。因此，可以在设计线路配置图时实现灵活性的提高。
本发明的半导体器件的制造方法包括以下步骤：在基板的上方设置第一半导体元件，该第一半导体元件的表面上设置有电极，该基板的表面上设置有电极；形成第一凸块，通过该第一凸块将第一导线连接到设置在该基板和该第一半导体元件上的电极中的至少一个电极；和在该第一导线的焊接部分形成第二凸块；通过该第二凸块将第二导线连接到该第一导线的焊接部分；设置第三导线，其与该第一导线和该第二导线中的至少一条导线交叉，设置为远离该第一导线和该第二导线，并且所述第三导线的环路的顶部高度的位置不同于所述第一导线和所述第二导线中的至少一个环路的顶部高度的位置；以及在该第一半导体元件的上方设置第二半导体元件，该第二半导体元件的表面上设置有电极，并且所述第二导线和所述第三导线都连接到所述第二半导体元件。
在该方法中，首先，表面上具有电极的半导体元件设置在表面上具有电极的基板上。然后，第一导线通过第一凸块连接到该基板和该半导体元件的上方的电极中的至少一个电极。因此，防止了相邻导线之间的接触，从而实现了设计线路配置图的灵活性的提高。特别是，能够防止在所述导线设置成相互交叉的情况下由于相邻导线之间的接触而导致的短路。因此，能够实现具有高密度布线的半导体器件的有效制造。
附图说明
图1是示出了本发明的半导体器件的第一实例的竖直剖视图。
图2是示出了本发明的半导体器件的第一实例的改型的竖直剖视图。
图3是示出了本发明的半导体器件的第一实例的另一个改型的竖直剖视图。
图4是示出了本发明的半导体器件的第二实例的竖直剖视图。
图5是示出了本发明的半导体器件的第三实例的竖直剖视图。
图6是示出了本发明的半导体器件的第四实例的竖直剖视图。
图7是示出了本发明的半导体器件的第五实例的竖直剖视图。
图8是示出了本发明的半导体器件的第五实例的改型的竖直剖视图。
图9是示出了本发明的半导体器件的第六实例的竖直剖视图。
图10是示出了本发明的半导体器件的第七实例的竖直剖视图。
图11是示出了本发明的半导体器件的第八实例的竖直剖视图。
图12A是示出了本发明的半导体器件的制造方法中在电极上形成第一凸块的第一步骤的剖视图。
图12B是示出了本发明的半导体器件的制造方法中在电极上形成第一凸块的第二步骤的剖视图。
图12C是示出了本发明的半导体器件的制造方法中在电极上形成第一凸块的第三步骤的剖视图。
图13A是示出了本发明的半导体器件的制造方法中连接第一导线的第一步骤的剖视图。
图13B是示出了本发明的半导体器件的制造方法中连接第一导线的第二步骤的剖视图。
图13C是示出了本发明的半导体器件的制造方法中连接第一导线的第三步骤的剖视图。
图13D是示出了本发明的半导体器件的制造方法中连接第一导线的第四步骤的剖视图。
图13E是示出了本发明的半导体器件的制造方法中连接第一导线的第五步骤的剖视图。
图13F是示出了本发明的半导体器件的制造方法中连接第一导线的第六步骤的剖视图。
图14A是示出了本发明的半导体器件的制造方法中在针脚式焊部分上形成第二凸块的第一步骤的剖视图。
图14B是示出了本发明的半导体器件的制造方法中在针脚式焊部分上形成第二凸块的第二步骤的剖视图。
图14C是示出了本发明的半导体器件的制造方法中在针脚式焊部分上形成第二凸块的第三步骤的剖视图。
图15A是示出了本发明的半导体器件的制造方法中连接第二导线的第一步骤的剖视图。
图15B是示出了本发明的半导体器件的制造方法中连接第二导线的第二步骤的剖视图。
图15C是示出了本发明的半导体器件的制造方法中连接第二导线的第三步骤的剖视图。
图15D是示出了本发明的半导体器件的制造方法中连接第二导线的第四步骤的剖视图。
图15E是示出了本发明的半导体器件的制造方法中连接第二导线的第五步骤的剖视图。
图15F是示出了本发明的半导体器件的制造方法中连接第二导线的第六步骤的剖视图。
图16A示出了线路配置图的实例。
图16B是图16A所示的线路配置图的俯视图和侧视图，其中根据本发明连接导线。
图16C是俯视图和侧视图，每一个图均示出了图16A所示的线路配置图中出现的问题，其中没有根据本发明连接导线。
图16D是俯视图和侧视图，每一个图均示出了图16A所示的线路配置图中出现的问题，其中没有根据本发明连接导线。
图17A示出了线路配置图的另一个实例。
图17B是图17A所示的线路配置图的俯视图和侧视图，其中根据本发明连接导线。
图17C是示出了图17A所示的线路配置图中出现的问题的侧视图，其中没有根据本发明连接导线。
图17D是示出了图17A所示的线路配置图中出现的问题的侧视图，其中没有根据本发明连接导线。
具体实施方式
以下，将参考实例详细描述根据本发明的半导体器件及其制造方法，但其不应被理解为限制本发明。
(实例1)
图1示出了本发明的半导体器件的第一实例。
本实例中的半导体器件100是所谓的球栅阵列(BGA)半导体器件。
该半导体器件100具有设置在基板的上表面上的、两个层叠的半导体芯片(半导体元件)11A和11B；半导体芯片11A通过粘合剂12A接合到基板，并且半导体芯片11B通过粘合剂12B接合到半导体芯片11A。
使用这种多芯片层叠的封装以使半导体器件能够提供由不同半导体芯片的组合使用所实现的多功能性、以及由增加了的存储器存储容量所实现的高性能等。
通过所谓的光蚀刻、选择镀等形成的多个电极(也称为“电极焊盘”)21选择性地设置在基板10的上表面上方的、接近半导体芯片11A的位置处。另外，通过所述晶片处理(wafer process)形成的多个电极(电极焊盘)22也设置在半导体芯片11A的上表面上方，该表面设有电路。类似地，通过所谓晶片处理形成的多个电极(电极焊盘)23设置在半导体芯片11B的上表面上方，该表面设有电路。
基板10上选出的电极21和半导体芯片11A上选出的电极22通过焊线(bonding wire)(连接线，连接导线；下文称为“导线”)41连接到一起。半导体芯片11A上选出的电极22和半导体芯片11B上选出的电极23通过导线42连接到一起。
使用密封树脂13密封基板10以及半导体芯片11A和11B的上表面，同时将导线41和42封装于其内。基板10具有设置在其它表面(下表面)上的多个焊球，这些焊球用作外部连接端子14。
在图1中应当注意到，尽管由于从与半导体芯片11A和11B层叠的方向垂直的方向观察半导体器件，从而在该图中仅示出了多个电极21、多个电极22和多个电极23中的每一个电极的一个电极，但在基板10以及半导体芯片11A和11B上必然形成多个电极。
在该示意性实例中，两条导线连接到半导体芯片11A上的电极22。
示意性的电极22示出了形成于半导体芯片11A上的一个或多个电极，并且接收与半导体芯片11B的电极23相同的电压或电信号。
在半导体芯片11A的电极22上形成凸块31。
导线41的一端可以具有球状部分B并且通过所谓的球焊连接到基板10上的电极21，另一端通过所谓的针脚式焊连接到在半导体芯片11A的电极22上形成的凸块31。
该实例的特征结构在于，在导线41的针脚式焊部分S上设置了凸块32。
导线42的一端可以具有球状部分B并且通过所谓的球焊连接到半导体芯片11B上的电极23，另一端通过针脚式焊连接到凸块32。
更具体地，在半导体芯片11A上选出的电极22处，导线41针脚式焊接到在电极22上形成的凸块32，凸块32形成于导线41的针脚式焊部分S上，并且导线42针脚式焊接到凸块32。导线41和42的针脚式焊部分S层叠在半导体芯片11A上的电极22的上方，并且通过凸块32连接到一起。
注意，导线41和42连接的顺序不限于上述顺序；当然，可以将导线42针脚式焊接到凸块31，将凸块32设置到所得到的针脚式焊部分S，并且将导线41针脚式焊接到凸块32。
在该结构中，基板10由诸如玻璃纤维环氧树脂(glass epoxy)、玻璃BT或聚酰亚胺(polyimide)之类的有机绝缘材料，或者诸如陶瓷或玻璃之类的无机绝缘材料制成。在基板10的表面或内侧上设置由铜等制成的互连层。如果必要的话，这些互连层可以以一个在另一个的顶部上的方式互相层叠，并且在每两个互连层之间夹设绝缘层，从而使基板10具有所谓的多层互连结构。
电极21也由与互连层相同的材料制成。
设置在半导体芯片11A上的电极22和设置在半导体芯片11B上的电极23也可称为电极焊盘，它们通过在所谓的晶片处理中对例如铝(Al)合金或者铜(Cu)合金进行处理而形成。
半导体芯片11A和11B由诸如硅(Si)或砷化镓(GaAs)之类的半导体材料制成，并且通过所谓的晶片处理在它们的一个表面上形成包括有源元件和无源元件的电路。电极22和23分别设置在半导体芯片11A和11B上，同时在形成电路的表面上设置绝缘层或者多层互连层。有源元件、无源元件以及电极分别与互连层连接到一起。
使用由金(Au)、铝(Al)、铜(Cu)或它们的合金制成的线性材料作为导线41和42的材料，并且在这些材料中，选择直径大约为18μm到30μm的材料。
将与形成导线41和42的材料类似的材料用于凸块31和32，并且形成凸块31和32的方法可以采用所谓的球焊方法。
可以使用诸如环氧树脂粘合剂、聚亚胺树脂粘合剂、以及丙烯酸树脂粘合剂之类的绝缘树脂粘合剂作为粘合剂12A和12B。
环氧树脂可以用于密封树脂13。
如上所述，在该实例1中，所谓的针脚式焊接方法用于将每条导线连接到待连接多条导线的电极22。
该结构可以降低围绕电极22的、由连接的导线(导线41和42)所形成的环路的高度。
为此，可以在导线41和42的上方设置另一条导线，并且不使其环路的高度增加到超出所需的高度，因此提高了线路配置图的灵活性。这样还降低了密封树脂13的高度(厚度)，因此能够实现半导体器件的小型化。
此外，当导线41连接到电极22时，凸块31设置在电极22上，并且导线41通过针脚式焊连接到凸块31。此后，凸块32设置在包括导线41的针脚式焊部分S的凸块31的上方。
通过这种凸块32层叠在凸块31的上方的结构，可以加强凸块31和导线41之间的连接。
此外，当导线42连接到电极22时，凸块32设置在包括导线41的针脚式焊部分S的凸块31的上方，并且导线42通过针脚式焊连接到凸块32。
因此，导线42的针脚式焊部分S与导线41的针脚式焊部分S分离，由此，在没有影响导线41的针脚式焊部分S的情况下，导线42针脚式焊接到凸块32。
而且在此，凸块32的存在增加了导线42可延伸焊接的方向的数目。因此，对导线41和42延伸焊接的方向没有作出限制。
(实例1的第一改型)
可以对实例1的半导体器件100作出以下改型。
即，可以采用所谓的引线框结构来替代基板10。
在半导体器件150中，在引线框15的压料垫(die pad)15A上设置层叠的半导体芯片11A和11B。
使用密封树脂13密封压料垫15A、引线框15的内引线15B、以及半导体芯片11A和11B，同时将导线41和42封装在其内。
在这种结构中，导线41的一端可以具有球状部分B并且通过所谓的球焊连接到引线框15的内导线15B，另一端通过针脚式焊连接到凸块31，该凸块31设置在半导体芯片11A上选出的电极22上。
然后，在导线41的针脚式焊部分S上设置凸块32。
导线42的一端也可以具有球状部分B并且通过所谓的球焊连接到半导体芯片11B上选出的电极23，另一端通过针脚式焊连接到凸块32。
该结构也可以提供与上述实例1类似的效果。
(实例1的第二改型)
图3示出了一种半导体器件的结构，其中两条导线(即导线41和42)以与它们在实例1的半导体器件100中的连接顺序相反的顺序连接到电极22。
更具体地，首先使用导线42将设置在半导体芯片11A上的电极22连接到设置在半导体芯片11B上的电极23。此后，使用导线41将设置在基板10上的电极21连接到设置在半导体芯片11A上的电极22。
在该过程中，导线42的另一端首先针脚式焊接到设置在电极22上的凸块31，在所得到的针脚式焊部分S上设置凸块32，并且导线41的另一端针脚式焊接到凸块32。
导线42的一端通过球焊连接到设置在半导体芯片11B上的电极23。导线41的一端通过球焊连接到设置在基板10上的电极21。
该过程也可以提供与实例1所描述的效果类似的效果。
注意在图3和其后的附图中，省略了对密封树脂13和用作外部连接端子14的焊球的示出和描述。
(实例2)
图4示出了本发明的半导体器件的第二实例。
除了在凸块31和32之间设置了两个层叠的凸块33以外，本实例的半导体器件200与实施例1的第二改型相同。
通过在凸块31和32之间设置这种额外的凸块33，增加了导线41和42之间的距离。这可以更加确保在不影响导线42的情况下进行导线41的针脚式焊。
此外，凸块33的设置增加了导线41的针脚式焊部分S在电极22处的高度，因此增加了导线41的环路高度。
因此，可以在环路导线42的下方设置额外的导线(未示出)，并且增加了设计线路配置图的灵活性。
尽管在该具体实例中凸块33的数目或者凸块33的级(stage)数为2，但是该数目不特别限于2。不言而喻，该数目可以是1，或者可以是3或更多。
甚至对于实例1的半导体器件结构而言，如果需要的话，也可以在导线41的针脚式焊部分S上设置凸块33。
(实例3)
图5示出了本发明的半导体器件的第三实例。
在本实例的半导体器件300中，在已通过针脚式焊连接到凸块32的导线42的针脚式焊部分S上设置额外的凸块34，该凸块32设置在电极22处的凸块31的上方。
导线42的针脚式焊部分S上的额外的凸块34的设置使得针脚式焊部分S牢固地固定到凸块32。
而且，还可以将额外的导线连接到凸块34，从而提高设计的灵活性。
(实例4)
图6示出了本发明的半导体器件的第四实例。
在本实例的半导体器件400中，选择性地设置在基板10的上表面上方的两个电极21A和21B分别通过导线41A和41B连接到设置在半导体芯片11A上的电极22。
此外，设置在半导体芯片11A上的半导体芯片11B上的电极23通过导线42连接到半导体芯片11A的电极22。
更具体地，在半导体器件400中，三条导线连接到一个电极22。
为了实现这种结构，导线41A的一端可以具有球状部分B并且通过所谓的球焊连接到基板10上的电极21A，另一端通过所谓的针脚式焊连接到凸块31，该凸块31形成在半导体芯片11A的电极22上。
然后，在导线41A的针脚式焊部分S上设置凸块32。
导线42的一端也可以具有球状部分B并且通过所谓的球焊连接到半导体芯片11B上的电极23，另一端通过针脚式焊连接到凸块32。
然后，在导线42的针脚式焊部分S上设置凸块34。
另外，导线41B的一端可以具有球状部分B并且通过所谓的球焊连接到基板10上的电极21B，另一端通过针脚式焊连接到凸块34。
在实例4中，当要将多条导线连接到一个电极(电极22)时，在导线的相邻焊接部分之间设置凸块，由此使导线能够连接到一起，并且没有影响它们的焊接部分。因此，提高了设计线路配置图的灵活性。
如果需要提高半导体芯片11A和11B的电源，可以在该实例的线路配置图中，通过将电极21A和21B设置在基板10上以起电源端子的作用，从而为半导体器件提供提高的电源。
(实例5)
图7示出了本发明的半导体器件的第五实例。
在本实例的半导体器件500中，半导体芯片11B设置半导体芯片11A上的、远离半导体芯片11A的电极22的位置处，并且在半导体芯片11B和电极22之间设置中继元件(relay member)50。使用粘合剂12将中继元件50固定到半导体芯片11A。
中继元件50包括选择性地设置在该中继元件50的基底(base)51上的中继电极52，该基底51由板状半导体构件或者板状绝缘构件构成。在电极52上设置凸块31。
在包括中继元件50的结构中，半导体芯片11A上的电极22和中继元件50上的电极52通过导线41连接到一起。中继元件50上的电极52和半导体芯片11B上的电极23通过导线42连接到一起。
在本实例中，导线41的一端可以具有球状部分B并且通过所谓的球焊连接到半导体芯片11A上的电极22，另一端通过针脚式焊连接到中继元件50的电极52上的凸块31。
然后，在导线41的针脚式焊部分S上设置凸块32。
导线42的一端可以具有球状部分B并且通过所谓的球焊连接到半导体芯片11B上的电极23，另一端通过针脚式焊连接到凸块32。
注意，导线41和42的连接顺序不限于上述顺序；当然也可以将导线42的另一端(端子)针脚式焊接到凸块31，将凸块32设置到所得到的针脚式焊部分S，然后将另一端针脚式焊接到凸块32。
在这种结构中，中继元件50例如由硅(Si)、玻璃纤维环氧树脂、玻璃BT或聚酰亚胺制成。当使用硅形成中继元件50时，使用所谓的晶片处理用于半导体芯片，由此能够以高精度在硅基板上形成小电极(电极焊盘)。
在这种情况下，可以使用与用于半导体芯片11B的设备类似的设备制造中继元件50。
优选的是，中继元件50与半导体芯片11B一样厚；例如，中继元件50的厚度优选为50μm到200μm。
而且，如果需要可以在中继元件50上设置多个电极，并且还可以设置与电极互相连接的互连层。
如上所述，在实例5中，包括位于其表面上的电极52的中继元件50设置在半导体芯片11A上。然后，中继元件50接续(relay)半导体芯片11A和11B之间的导线。
因此，可以提高设计线路配置图的灵活性。
而且，半导体芯片11A上的电极22和半导体芯片11B上的电极23可以使用两个短导线而不使用单个长导线而连接到一起。为此，可以避免由于长导线的环路变形而导致的相邻导线之间的接触，从而还能够避免由于导线接触导致的短路。
(实例5的改型)
可以对实例5的半导体器件500作出以下改型。
即，如图8所示，中继元件50可以为具有较大面积的、已制成的板状，并且夹设在半导体芯片11A和11B之间。
在这种半导体器件550中，半导体芯片11A、板状中继元件50、以及半导体芯片11B分别使用粘合剂12A、12B和12C依次层叠在基板10的上表面上方。
在这种结构中，中继元件50上的电极52设置在这样的位置处，即，使位于半导体芯片11A和11B的上方的电极的导线可以连接到电极52。例如，电极52的位置选择为使其与半导体芯片11A和11B的上方的多个电极之间的距离均相等。
这种结构也可以提供与实例5所描述的效果类似的效果，并且可以通过中继元件50接续导线。因此，可以提高设计线路配置图的灵活性并且防止短路。
注意，在该改型中，导线41和42连接到中继元件50上的电极52的顺序与图3所示的结构(实例1的第二改型)中的顺序相同。
更具体地，在使用导线42将设置在半导体芯片11B上的电极23连接到设置在中继元件50上的电极52之后，在导线42的针脚式焊部分S上设置凸块32，并且从半导体芯片11A上的电极22延伸的导线41的一端针脚式焊接到凸块32。
当然，也可以先连接导线41，然后再连接导线42。
(实例6)
图9示出了本发明的半导体器件的第六实例。
在本实例的半导体器件600中，三个半导体芯片(半导体元件)11A、11B和11C分别使用粘合剂12A、12B和12C层叠在基板10的上表面上方。
电极21选择性地设置在基板10的上表面上方的、接近半导体芯片11A的位置处。通过所谓的晶片处理形成的多个电极(电极焊盘)22设置在半导体芯片11A的上表面上方，该表面设有电路。类似地，通过所谓的晶片处理形成的多个电极(电极焊盘)23和24分别设置在每个半导体芯片11B和11C的上表面上方。
基板10上选出的电极21和半导体芯片11A上选出的电极22通过导线41连接到一起，并且半导体芯片11A上的电极22和半导体芯片11B上选出的电极23通过导线42连接到一起。而且，半导体芯片11B上的电极23和半导体芯片11C上选出的电极24通过导线43连接到一起。
在图9中应当注意到，尽管由于从与半导体芯片11A、11B和11C层叠的方向垂直的方向观察半导体器件，从而在该图中仅示出了多个电极21、多个电极22、多个电极23和多个电极24中的每一个电极的一个电极，但在基板10以及半导体芯片11A、11B和11C上必然形成多个电极。
在半导体芯片11A的电极22上设置凸块31a，在半导体芯片11B的电极23上设置凸块31b。
导线41的一端可以具有球状部分B并且通过所谓的球焊连接到基板10上的电极21，另一端通过所谓的针脚式焊连接到凸块31a，该凸块31a形成于半导体芯片11A的电极22上。
导线42的一端可以具有球状部分B并且通过所谓的球焊连接到电极22上的凸块31a，该凸块31a包括导线41的针脚式焊部分S。导线42的另一端通过所谓的针脚式焊连接到凸块31b，该凸块31b形成于半导体芯片11B上的电极23上。
此外，在导线42的针脚式焊部分S上设置凸块32。
而且，导线43的一端也可以具有球状部分B并且通过球焊连接到半导体芯片11C上的电极24，另一端通过所谓的针脚式焊连接到凸块32，该凸块32形成于半导体芯片11B的电极23上。
如上所述，在实例6中，凸块31a设置在半导体芯片11A的电极22上，并且导线41针脚式焊接到凸块31a，其中导线42的一端通过球焊连接到针脚式焊部分S。
半导体芯片11B上的电极用作接续导线，该接续导线将半导体芯片11A和11C连接到一起。
因此，可以在使用导线连接多个半导体芯片时，扩大建立线路配置图的选择范围。
(实例7)
图10示出了本发明的半导体器件的第七实例。
在本实例的半导体器件700中，半导体芯片(半导体元件)11A使用粘合剂12A固定到基板10的上表面。
电极选择性地设置在基板10的上表面上方的、接近半导体芯片11A的位置处，并且多个电极22设置在半导体芯片11A的上表面上方，该表面设有电路。从设置在基板10的上方的电极中选出的电极21A和21B分别经由导线41A和41B连接到半导体芯片11A上的电极22。
在半导体芯片11A的电极22上设置凸块31。
在该结构中，导线41A的一端可以具有球状部分B并且通过所谓的球焊连接到基板10的电极21A，另一端通过针脚式焊连接到凸块31，该凸块31设置在半导体芯片11A的电极22上。
然后，在导线41A的针脚式焊部分S上设置凸块32。
而且，导线41B的一端也可以具有球状部分B并且通过球焊连接到基板10的电极21B，另一端通过针脚式焊连接到凸块32。
当电极22用作半导体芯片11A上的电源端子时，该线路配置图能够使电力从基板10上形成的多个电极供应到电极22，从而构成具有增强电源的半导体器件。
在这种情况下，可以在需要时容易地增加基板10上的电极的数目。在此，在预先连接到凸块32的导线的针脚式焊部分上形成额外的凸块，然后另一条导线针脚式焊接到该凸块。
(实例8)
图11示出了本发明的半导体器件的第八实例。
在本实例的半导体器件800中，两个半导体芯片(半导体元件)11A和11B分别使用粘合剂12A和12B层叠在基板10的上表面上方。
在基板10的上表面上方的、接近半导体芯片11A的位置处选择性地设置多个电极。还在形成有电路的、每个半导体芯片11A和11B的上表面上方设置多个电极。
从设置在基板10的上表面上方的电极中选出电极21A和21B，并且从设置在半导体芯片11A的上表面上方的电极中选出电极22。此外，在设置在半导体芯片11B的上表面上方的电极中选出一个设置在半导体芯片11B的中央附近的电极(电极23A)以及一个设置在半导体芯片11B的边缘附近的电极(电极23B)。
在此，基板10上选出的电极21A和半导体芯片11A上选出的电极22通过导线44连接到一起。
同时，通过导线45将基板10上选出的电极21B和半导体芯片11B上选出的电极23B连接到一起，并且通过导线46将半导体芯片11B上选出的电极23A和23B连接到一起。
然后，在电极23B上设置凸块31。
在这种结构中，导线44的一端可以具有球状部分B并且通过球焊连接到半导体芯片11A上的电极22，另一端通过针脚式焊连接到基板10上的电极21A。
同时，导线46的一端也可以具有球状部分B并且通过球焊连接到半导体芯片11B上的电极23A，电极23A设置在半导体芯片11B的中央附近。导线46的另一端通过针脚式焊连接到凸块31，该凸块31位于半导体芯片11B的电极23B上。
然后，在导线46的针脚式焊部分S上设置凸块32。
同时，导线45的一端也可以具有球状部分B并且通过所谓的球焊连接到基板10上的电极21B，另一端通过针脚式焊连接到凸块32。
应当注意，导线44的结构当然可以与实例1中所描述的导线的结构类似，即导线44的一端可以通过球焊连接到基板10上的电极21A，其另一端可以通过针脚式焊连接到半导体芯片11A的电极22。
此外，导线45的连接在导线44的连接之后进行。
当设置在半导体芯片11B上的电极23A和23B欲作为普通电源端子时，该线路配置图能够易于实现以下构造，即直接将电力供应至设置在半导体芯片11B的电路中央处的电极23B。因此，可以稳定半导体芯片11B的运行。
(实例9)
通过解释上述半导体器件100的制造方法，参考附图描述本发明半导体器件的制造方法。
在半导体器件100中，分别使用粘合剂12A和12B将两个半导体元件(半导体芯片)11A和11B依次层叠在基板10的上表面上方。
通过所谓的光蚀刻、选择镀等形成的电极(也称为“电极焊盘”)21选择性地设置在基板10的上表面上方的、接近半导体芯片11A的位置处。通过所谓的晶片处理形成的多个电极(电极焊盘)22设置在半导体芯片11A的上表面上方，该表面设有电路。类似地，通过所谓的晶片处理形成的多个电极(电极焊盘)23设置在半导体芯片11B的上表面上方。
为了制造这种由基板和半导体芯片组成的层压体(laminate)，首先将基板10放置在焊接台(bonding stage)(未示出)上，该基板10包括半导体芯片11A和11B，半导体芯片11A和11B分别通过设置在它们下方的粘合剂12A和12B层叠在基板10的上表面上方。此后，将半导体芯片11A和11B以及基板10加热到70℃至200℃。
执行以下过程以通过导线焊接将基板10上的电极与半导体芯片11A和11B连接到一起。
使用焊炬电极(未示出)通过高压点火(high-voltage sparking)来熔化从焊针61的末端延伸出来的Au(金)导线的末端，从而形成球形部分30(见图12A)。
然后，球形部分30可以紧靠在半导体芯片11A的电极22上，之后通过焊针61在球形部分30上施加负荷，并沿与施加负荷方向垂直的方向施加超声振动，由此将球形部分30焊接到电极22(见图12B)。
超声振动的施加通过去除存在于电极(电极焊盘)22表面上的氧化膜或者灰尘，从而有效地确保了球形部分30可靠地焊接到电极22。
通过相对于电极22的表面垂直提升焊针61，Au导线断开，由此在电极22上形成Au凸块31(见图12C)。
在提升焊针61之前或者在形成凸块31之后，可以使凸块31的顶部平坦化。
在基板10的电极21的上方，将从焊针61延伸出来的Au导线(导线41)的末端熔化，从而形成球状部分B(见图13A)。
上述使用焊炬电极的高压点火可以用于球的形成。
然后，球状部分30可以紧靠电极22，之后通过焊针61在球形部分30上施加负荷，并沿与施加负荷方向垂直的方向施加超声振动，由此将球形部分30焊接到电极21(见图13B)。
然后，沿着垂直于电极21表面的方向提升焊针61(见图13C)。
之后，当进一步将Au导线41从焊针61中拉出来时，焊针61移动到在半导体芯片11A的电极22上所形成的凸块31的上方，从而将导线41焊接到凸块31(见图13D)。
将Au导线41的端部压向Au凸块31，以将该Au导线41针脚式焊接到该Au凸块31上(参见图13E)。
注意，由于在此处将同样的金属材料焊接到一起，即执行金到金的焊接，因此不需要施加超声振动。
结果，Au导线41的端部(端子)针脚式焊接到Au凸块31，从而形成针脚式焊部分S(见图13F)。
接下来，与形成Au凸块31一样，在包括Au导线41的针脚式焊部分S的Au凸块31上形成Au凸块32。
更具体地，在从焊针61延伸出来的Au导线的末端形成另一个Au球状部分30(见图14A)。
如上所述，将使用焊炬电极的高压点火应用于球的形成。
然后，由此形成的球状部分30可以紧靠到具有针脚式焊部分S的Au凸块31，并且施加负荷以将该球状部分30焊接到Au凸块31(见图14B)。
然后，提升焊针61以断开Au导线，从而在Au凸块31上形成Au凸块32(见图14C)。
必要时，可以平坦化Au凸块32的顶部。
接下来，通过Au导线42将半导体芯片11B上的电极23和半导体芯片11A上的电极22连接到一起。
更具体地，将焊针61移动到电极23的上方，并在从焊针61延伸出来的Au导线42的末端形成另一个Au球状部分30(见图15A)。
然后，使由此形成的球状部分30紧靠电极23，然后通过焊针61在球状部分30上施加负荷，并且沿着与施加负荷方向垂直的方向施加超声振动，由此将球状部分30焊接到电极23(见图15B)。
然后，沿着垂直于电极23表面的方向提升焊针61(见图15C)。
之后，当进一步将Au导线42从焊针61拉出来时，焊针61移动到在半导体芯片11A的电极22上所形成的凸块32的上方，以将导线41焊接到凸块32(见图15D)。
然后，将Au导线42的端部压向Au凸块32，从而将Au导线42针脚式焊接到Au凸块32(见图15E)。
结果，Au导线42的端部(端子)针脚式焊接到Au凸块32，从而形成针脚式焊部分S(见图15F)。
这样，基板10以及半导体芯片11A和11B的电极通过导线焊接连接到一起。
然后，使用密封树脂13密封由此形成的层压体，之后在基板10的背面上形成焊球14。这样就制造出了上述的半导体器件100。
通过本发明的这个方法，凸块32层叠在凸块31的上方，因此可以通过凸块32加强凸块31处的导线41的针脚式焊部分。
此外，当导线42欲连接到电极22时，导线42的针脚式焊部分S通过凸块32连接到电极22。这使得导线42的针脚式焊部分S与导线41分离，由此在不干涉导线41的情况下实现导线42的针脚式焊。
(实例10)
如上所述，当基板10以及半导体芯片11A和11B上的电极通过导线焊接连接到一起时，在某些情况下用于将这些电极连接到一起的导线可能交叉。
该实例示出了包括前述凸块设置的线路配置图，该线路配置图使用涉及导线交叉的导线焊接方法来设计。
图16A示出了用于将设置在基板10以及半导体芯片11A和11B上的电极连接到一起的线路配置图的实例，图16B示出了在这种线路配置图中使用交叉导线将三个电极连接到一起的状态。
在图16B中，图16B-i是示出了线路配置图的俯视图，图16B-ii是从与半导体芯片11A和11B的层叠方向垂直的方向(即图16B-i的箭头P的方向)看过去的线路配置图的侧视图。
如图16A所示，半导体芯片11A和11B依次层叠在基板10的上表面上方。
在基板10上方的、接近半导体芯片11A的位置处设置的多个电极之中，示出了电极21A、21B和21C。在设置在半导体芯片11A的上方的多个电极(电极焊盘)之中，示出了电极22A和22B。在设置在半导体芯片11B的上方的多个电极(电极焊盘)之中，示出了电极23A和23B。
半导体芯片11A上的电极22A和22B位于半导体芯片11A的边缘附近，半导体芯片11B上的电极23A和23B位于半导体芯片11B的边缘附近。
通过Au导线101将基板10上选出的电极21A和半导体芯片11A上选出的电极22B连接到一起，并且通过Au导线102将基板10上选出的电极21B和半导体芯片11B上选出的电极23B连接到一起。
同时，通过Au导线103将基板10上选出的电极21C和半导体芯片11A上选出的电极22A连接到一起，并且通过Au导线104将半导体芯片11A上选出的电极22A和半导体芯片11B上选出的电极23A连接到一起。
在这种线路配置图中，导线101在基板10的上方与导线102和103交叉，而导线102在半导体芯片11A的上方与导线104交叉，从而形成交叉点X1到X3。
因此，需要提供一种线路配置图，其能防止这些导线在它们的交叉点相互接触。
图16B示出了一种状态，其中采用本发明的线路配置图和布线工艺将图16A所示的基板10以及半导体芯片11A和11B上的电极连接到一起。
在示意性实施例中，两条导线连接到半导体芯片11A上的电极22A。
在这种结构中，在半导体芯片11A的电极22A上设置凸块31，在半导体芯片11B的电极23B上设置另一个凸块31。
导线101的一端可以具有球状部分B并且通过球焊连接到半导体芯片11A上的电极22B，另一端通过针脚式焊连接到基板10上的电极21A。
导线102的一端可以具有球状部分B并且通过球焊连接到基板10上的电极21B，另一端通过针脚式焊连接到位于半导体芯片11B上的电极23B上的凸块31。
导线103的一端可以具有球状部分B并且通过球焊连接到基板10上的电极21C，另一端通过针脚式焊连接到位于半导体芯片11A上的电极22A上的凸块31。此外，在导线103的针脚式焊部分S上设置凸块32。
而且，导线104的一端也可以具有球状部分B并且通过球焊连接到半导体芯片11B上的电极23A，另一端通过针脚式焊连接到凸块32，该凸块32设置在半导体芯片11A上的电极22A上形成的凸块31上。
如上所述，在该实例中，待连接到半导体芯片11A上的电极22A的多条导线中的每一条导线均通过针脚式焊连接。
因此，可以降低电极22A附近的、导线103和104的环路的高度。
这使得导线103和104位于电极22A附近的、远离导线101和102的位置，由此防止导线在任一交叉点X1到X3处相互接触而导致短路。
因此，可以制造具有交叉导线的半导体器件，由此使得半导体器件的尺寸更小。
以下描述图16B中所示的导线连接到它们相应的电极的顺序。
首先在半导体芯片11A上的电极22A上设置凸块31，在半导体芯片11B上的电极23B上设置另一个凸块31。
然后，导线103的一端通过球焊连接到基板10上的电极21C，另一端通过针脚式焊连接到位于半导体芯片11A上的电极22A上的凸块31。此后，在导线103的针脚式焊部分S上设置凸块32。
然后，导线101的一端通过球焊连接到半导体芯片11A上的电极22B，另一端通过针脚式焊连接到基板10上的电极21A。
在此，导线101和103的延伸方向不同，所以所得到的环路的顶部高度也不同。因此，可以防止导线101和103在如图16A所示的交叉点X1处相互接触。
然后，导线102的一端通过球焊连接到基板10上的电极21B，另一端通过针脚式焊连接到半导体芯片11B上的电极23B。
在此，导线101和102的延伸方向也不同，所以所得到的环路的顶部高度也不同。因此，可以防止导线101和102在如图16A所示的交叉点X2处相互接触。
导线104的一端通过球焊连接到半导体芯片11B上的电极23A，另一端通过针脚式焊连接到位于半导体芯片11A上的电极22A上的凸块32。
因此，导线102和104以不同方向延伸，所以所得到的环路的顶部高度也不同。因此，也可以防止导线102和104在如图16A所示的交叉点X3处相互接触。
也就是说，即使在连接以不同高度接近地隔开的多个电极而使得导线彼此交叉时，也可以选择适当的布线顺序使导线环路的顶端高度不同，从而防止导线彼此接触。
通过这样做，还可以防止焊针与导线接触，因此可以有效地制造半导体器件。
如果没有根据本发明的这种布线工艺，则出现如图16C和图16D(仅作为参考目的示出)所示的导线接触的可能性变大。
在图16C中，图16C-i是示出了线路配置图的俯视图，图16C-ii是从与半导体芯片11A和11B的层叠方向垂直的方向(即图16C-i的箭头P的方向)看过去的侧视图。
在图16D中，图16D-i是示出了线路配置图的俯视图，图16D-ii是从与半导体芯片11A和11B的层叠方向垂直的方向(即图16D-i的箭头P的方向)看过去的侧视图。
图16C和图16B所示的线路配置图中导线103延伸焊接的方向不同。
也就是说，导线103的一端通过球焊连接到位于半导体芯片11A上的电极22A上的凸块31，另一端通过针脚式焊连接到基板10上的电极21C。
因此，导线101和103以相同方向延伸，所以所得到的导线环路的顶部几乎位于相同的高度，这会不期望地导致导线101和103在如图16A所示的交叉点X1处相互接触。
此外，图16D和图16B所示的线路配置图中导线104延伸焊接的方向不同。
也就是说，导线104的一端通过球焊连接到半导体芯片11A上的电极22A上的凸块31，另一端通过针脚式焊连接到半导体芯片11B上的电极23A上的凸块31。
因此，对于导线102和104，所得到的导线环路的顶部几乎位于相同的高度，这会不期望地导致导线102和104在图16A所示的交叉点X3处相互接触。
注意，在图16B到图16D的侧视图中，看起来重叠的部件由圆括号中的标号表示。
(实例11)
如上所述，当通过导线焊接将基板10以及半导体芯片11A和11B上的电极连接到一起时，在某些情况下用于将这些电极连接到一起的导线可能交叉。
该实例示出了包括前述凸块设置的线路配置图，其中半导体电极设置在半导体芯片的中央处，使用涉及导线交叉的导线焊接方法来设计线路配置图。
图17A示出了将基板10以及半导体芯片11A和11B上的电极连接到一起的线路配置图的实例，图17B示出了使用交叉导线将半导体芯片11A和11B上的电极连接到一起的状态。
在图17B中，图17B-i是示出了线路配置图的俯视图，图17B-ii是从与半导体芯片11A和11B的层叠方向垂直的方向(即图17B-i的箭头P的方向)看过去的侧视图。
在如图17A所示的结构中，半导体芯片11A上的电极22A和22B设置在半导体芯片11A的边缘附近，因此使它们接近设置在基板10上的电极21A和21B。
另一方面，半导体芯片11B上的电极23A和23B设置在半导体芯片11B的中央附近。
通过导线111将基板10上选出的电极21A和半导体芯片11A上选出的电极22A连接到一起。通过导线112将半导体芯片11A上选出的电极22A和半导体芯片11B上选出的电极23B连接到一起。
另外，通过导线113将基板10上选出的电极21B和半导体芯片11A上选出的电极22B连接到一起。通过导线114将半导体芯片11A上选出的电极22B和半导体芯片11B上选出的电极23A连接到一起。
图17B示出了一种状态，其中使用本发明的线路配置图和布线工艺将如图17A所示的基板10以及半导体芯片11A和11B上的电极连接到一起。
在示意性实施例中，两条导线连接到半导体芯片11A上的每个电极22A和22B。
在这种结构中，在半导体芯片11A的电极22A和22B上设置凸块31，在半导体芯片11B的电极23A上设置另一个凸块31。
在半导体芯片11A的电极22A上设置凸块31，在半导体芯片11B的电极23B上设置另一个凸块31。
导线111的一端可以具有球状部分B并且通过球焊连接到基板10上的电极21A，另一端通过针脚式焊连接到位于半导体芯片11A上的电极22A上的凸块31。
该实例的特有特征在于，在设置在电极22A上的凸块31处，在凸块32与导线111的针脚式焊部分S之间设置三个凸块33。
导线112的一端可以具有球状部分B并且通过球焊连接到半导体芯片11B上的电极23B，另一端通过针脚式焊连接到凸块32。
导线113的一端可以具有球状部分B并且通过球焊连接到基板10上的电极21B，另一端通过针脚式焊连接到位于半导体芯片11A上的电极22B上的凸块31。
而且，导线114的一端也可以具有球状部分B并且通过球焊连接到凸块32，该凸块32包括电极22B上的导线113的针脚式焊部分S，另一端通过针脚式焊连接到凸块31，该凸块31设置在半导体芯片11B上的电极23A上。
如上所述，在该实例中，待与两条导线连接的半导体芯片11A和11B通过所谓的针脚式焊分别连接到导线111和112。此外，三个凸块33设置在电极22A处的凸块31和32之间。因此，导线111和112的焊接部分沿着高度方向(即电极层叠的方向)分开较长的距离。
因此，可以在不干涉导线111的情况下对导线112实现更可靠的针脚式焊。
此外，由于导线112的针脚式焊部分S的高度主要在半导体芯片11A的电极22A处增加，因此防止了导线112与半导体芯片11B的边缘接触。
而且，由于由导线102和104所形成的环路的顶部高度不同，所以可以防止在图17A所示的交叉点X处的短路。
因此，可以制造具有交叉导线的半导体器件，由此使半导体器件的尺寸变小。
接下来，将描述图17B中所示的导线连接到它们相应的电极的顺序。
首先在半导体芯片11A上的各电极22A和22B上设置凸块31，还在半导体芯片11B的电极23A上设置另一个凸块31。
在导线111的一端通过球焊连接到基板10上的电极21A之后，另一端通过针脚式焊连接到位于半导体芯片11A上的电极22A上的凸块31。
此后，在导线113的一端(引线)通过球焊连接到基板10上的电极21B之后，其另一端通过针脚式焊连接到位于半导体芯片11A上的电极22B上的凸块31。
注意，导线111和113可以以相反的顺序连接。
然后，在已连接到电极22A上的凸块31的导线111的针脚式焊部分S上设置多个凸块33。这里，三个凸块以层叠方式设置。
然后，在凸块33上设置凸块32，其中该凸块33已设置在电极22A上的凸块31上。
在此，优选的是，凸块32的高度等于或者大于固定至半导体芯片11A的半导体芯片11B的表面高度。
可以选择待设置的凸块33的数目以满足上述关系。在凸块32的高度达到半导体芯片11B的上表面的情况下，不必需要设置凸块33。
然后，导线112的一端通过球焊连接到半导体芯片11B上的电极23B，另一端通过针脚式焊连接到电极22A上的凸块32。
因为导线112由于设置了凸块32而在较高位置处焊接到电极22A，所以可以防止导线112与半导体芯片11B的边缘接触。
随后，导线114的一端通过球焊连接到半导体芯片11A上的电极23B，另一端通过针脚式焊连接到电极23A上的凸块31。
因此，导线112和114以不同方向延伸，从而形成顶部处于不同高度的导线环路。因此，即使在如图17A所示的交叉点X处也可以防止导线112和114相互接触。
也就是说，即使当连接以不同高度接近地隔开的多个电极而使得导线相互交叉时，也可以选择布线顺序使导线环路顶端的高度不同，从而防止一条导线与另一条导线接触。
通过这样做，还可以防止焊针与导线接触，因此实现有效地制造半导体器件。
如果没有根据本发明的这种布线工艺进行操作，将会导致出现如图17C和图17D(仅作为参考目的示出)所示的导线接触的可能性更大。
图17C和图17B所示的线路配置图中导线112延伸焊接的方向不同。
也就是说，导线112的一端通过球焊连接到位于半导体芯片11B上的电极23B上的凸块31，另一端在没有设置凸块32(和凸块33)的情况下，通过针脚式焊连接到凸块31，该凸块31包括导线111的针脚式焊部分S。
这会不期望地导致导线112与半导体芯片11B的边缘接触。
类似地，当通过导线114将半导体芯片11B上的电极23A和位于半导体芯片11A上的电极22B上的凸块31连接到一起时，导线114接触半导体芯片11B的边缘。
如图17D和图17B所示的线路配置图中导线112和114延伸焊接的方向不同。
也就是说，导线112的一端通过球焊连接到凸块31，该凸块31包括位于半导体芯片11A上的电极22A上的导线111的针脚式焊部分S，其另一端通过针脚式焊连接到位于半导体芯片11B上的电极23B上的凸块31。
类似地，导线114的一端通过球焊连接到凸块31，该凸块31包括位于半导体芯片11A上的电极22B上的导线113的针脚式焊部分S，其另一端通过针脚式焊连接到位于半导体芯片11B上的电极23A上的凸块31。
在这种线路配置图中，导线112和114以相同方向延伸，因此所得到的导线环路的形状也是相同的。
因此，导线112和114在图17A所示的交叉点X处相互接触。
注意，在图17B到图17D的侧视图中，看起来重叠的部件由圆括号中的标号表示。
根据本发明，可以解决传统问题并且提供一种小且高性能的半导体器件以及该半导体器件的有效制造方法，在该半导体器件中防止了相邻导线之间的接触，从而增加了设计线路配置图的灵活性。
本发明的半导体器件是一种小且高性能的半导体器件，其中防止了相邻导线之间的接触，从而增加了设计线路配置图的灵活性。
根据本发明半导体器件的制造方法通过即使在相邻导线彼此交叉时也能够防止它们互相接触，从而可以实现高精度布线，因此可以有效地制造一种小且高性能的半导体器件。

Claims (8)

1.一种半导体器件，包括：
基板，其表面上设置有电极；
第一半导体元件，其表面上设置有电极，并且该第一半导体元件由该基板支撑；
第一导线，其通过第一凸块连接到布置在该第一半导体元件上的电极中的至少一个电极；
第二导线，其通过第二凸块连接到该第一导线的焊接部分；
第三导线，其与该第一导线和该第二导线中的至少一条导线交叉，并且设置为远离该第一导线和该第二导线，所述第三导线的环路的顶部高度的位置不同于所述第一导线和所述第二导线中的至少一个环路的顶部高度的位置；以及
第二半导体元件，其表面上设置有电极，并且该第二半导体元件由该第一半导体元件支撑，所述第二导线和所述第三导线都连接到所述第二半导体元件。
2.如权利要求1所述的半导体器件，其中，该第一导线针脚式焊接到该第一凸块，并且该第二导线针脚式焊接到该第二凸块。
3.如权利要求1所述的半导体器件，其中，在该第一凸块和该第二凸块之间设置至少一个第三凸块。
4.如权利要求1所述的半导体器件，其中，在该第二导线的焊接部分上设置第四凸块，并且第四导线连接到该第四凸块。
5.如权利要求1所述的半导体器件，其中，设置在该第一半导体元件和该第二半导体元件上的电极用作电源端子，所述电极通过第五导线电连接到第三电极，该第三电极设置在该第二半导体元件的中央附近。
6.一种半导体器件的制造方法，该方法包括以下步骤：
在基板的上方设置第一半导体元件，该第一半导体元件的表面上设置有电极，该基板的表面上设置有电极；
形成第一凸块，通过该第一凸块将第一导线连接到设置在该基板和该第一半导体元件上的电极中的至少一个电极；和
在该第一导线的焊接部分形成第二凸块；
通过该第二凸块将第二导线连接到该第一导线的焊接部分；
设置第三导线，其与该第一导线和该第二导线中的至少一条导线交叉，设置为远离该第一导线和该第二导线，并且所述第三导线的环路的顶部高度的位置不同于所述第一导线和所述第二导线中的至少一个环路的顶部高度的位置；以及
在该第一半导体元件的上方设置第二半导体元件，该第二半导体元件的表面上设置有电极，并且所述第二导线和所述第三导线都连接到所述第二半导体元件。
7.如权利要求6所述的半导体器件的制造方法，其中，该第一导线针脚式焊接到该第一凸块，并且该第二导线针脚式焊接到该第二凸块。
8.如权利要求6所述的半导体器件的制造方法，其中，该第一凸块的形成通过球焊进行，在该球焊中施加负荷并沿着与负荷施加方向近似垂直的方向施加超声振动；
并且该第二凸块的形成通过施加负荷的球焊进行。
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