TW202107728A - 基板結構化方法 - Google Patents

基板結構化方法 Download PDF

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TW202107728A
TW202107728A TW109114873A TW109114873A TW202107728A TW 202107728 A TW202107728 A TW 202107728A TW 109114873 A TW109114873 A TW 109114873A TW 109114873 A TW109114873 A TW 109114873A TW 202107728 A TW202107728 A TW 202107728A
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resist layer
powder particles
adhesive layer
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翰文 陳
史帝文 維哈佛貝可
朴起伯
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美商應用材料股份有限公司
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Abstract

本揭示案涉及用於結構化半導體基板的方法和裝置。在一個實施例中，一種基板結構化方法包括將抗蝕層施加到可選地設置在載體上的基板上。使用紫外線輻射或雷射燒蝕對抗蝕層進行圖案化。然後，藉由微噴將抗蝕層的圖案化部分轉印到基板上，以在基板中形成所需的特徵，同時抗蝕層的未曝光或未燒蝕部分遮蓋基板的其餘部分。然後將基板暴露於蝕刻處理和剝離處理中以去除抗蝕層並釋放載體。

Description

基板結構化方法
本揭示案的實施例大體係關於用於結構化半導體基板的方法和裝置。更特定言之，本文描述的實施例係關於用於使用微噴和雷射燒蝕技術來結構化半導體基板的方法和裝置。
由於對微型電子元件和部件的需求不斷增長，積體電路已發展成為複雜的2.5D和3D元件，在單個晶片上可以包含數百萬個電晶體、電容器和電阻器。晶片設計的發展已導致更大的電路密度，從而提高了積體電路的處理能力和速度。對具有更大電路密度的更快處理能力的需求對在製造此種積體電路晶片中使用的材料、結構和處理提出了相應的要求。但是，除了該等趨向於更高的整合度和更高效能的趨勢外，人們一直在追求降低製造成本。
常規地，由於易於形成特徵以及經由該等特徵的若干連接以及與有機複合物相關的相對較低的封裝製造成本，已經在有機封裝基板上製造了積體電路晶片。然而，隨著電路密度的增加和電子元件的進一步小型化，由於用於維持元件規模和相關效能要求的材料結構分辨率的限制，有機封裝基板的利用變得不切實際。最近，已經利用放置在有機封裝基板上的被動矽中介層作為再分佈層來製造2.5D和3D積體電路，以補償與有機封裝基板相關的某些限制。矽中介層的利用受到高帶寬密度、低功耗晶片間通信以及進階封裝應用中異構整合需求的潛力加以驅動。但是，在矽中介層中形成特徵（例如，矽通孔（TSV））仍然很困難且成本很高。特別地，高縱橫比的矽透過蝕刻、化學機械平面化和半導體後端線（BEOL）互連而產生高成本。
因此，本領域需要用於進階封裝應用的改進的基板結構化方法。
在一個實施例中，提供了一種用於基板結構化的方法。該方法包括：以第一粘合層將基板粘合至載板；用第二粘合層將抗蝕層粘合至基板；以及用電磁輻射使抗蝕層圖案化。該方法亦包括將粉末粒子推進到經圖案化的抗蝕層上以在基板中形成經結構化的圖案，並且將基板暴露於蝕刻處理以從經結構化的圖案去除碎屑並平滑化其一個或多個表面。藉由釋放第二粘合層將抗蝕層與基板剝離，並且藉由釋放第一粘合層將基板與載板剝離。
在一個實施例中，提供了一種用於基板結構化的方法。該方法包括在矽太陽能基板上形成抗蝕層，藉由使抗蝕層暴露於電磁輻射來圖案化抗蝕層，在高壓下將粉末粒子的流推進流向基板以從基板上移開和去除材料並形成經結構化的圖案，且將基板暴露於蝕刻處理以從經結構化的圖案去除碎屑並平滑化基板的一個或多個表面。
在一個實施例中，提供了一種用於基板結構化的方法。該方法包括：以第一粘合層將第一抗蝕層粘合在基板的第一表面上；以第二粘合層將第二抗蝕層粘合在基板的第二表面上；以及對第一抗蝕層和第二抗蝕層進行圖案化。該方法亦包括將粉末粒子向基板的第一表面推進以在其中形成一個或多個圖案化結構，將粉末粒子向基板的第二表面推進以使一個或多個圖案化結構延伸橫跨整個基板的厚度而在第一表面和第二表面之間，以及將基板暴露於蝕刻處理以從基板上去除碎屑並使基板的一個或多個表面平滑化。
本揭示案係關於用於結構化半導體基板的方法和裝置。在一個實施例中，一種基板結構化的方法包括將抗蝕層施加到可選地設置在載板上的基板上。使用紫外線輻射或雷射燒蝕對抗蝕層進行圖案化。然後藉由微噴將抗蝕層的圖案化部分轉印到基板上，同時抗蝕層的未曝光或未燒蝕部分遮蓋基板的其餘部分。然後將基板暴露於蝕刻處理和剝離處理中以去除抗蝕層並釋放載體。在另一個實施例中，藉由雷射燒蝕在基板中形成期望的特徵。
圖1圖示了用於結構化基板102的代表性方法100的流程圖。圖2A至圖2F和圖3A至圖3F圖示了圖1的結構化處理的不同階段的基板102的示意性剖面視圖。因此，在必要時對圖2A至圖2F和圖3A至圖3F的參考將被包括在圖1和方法100的討論中。此外，用於結構化基板102的方法100具有多個操作。可以以任何順序或同時執行該等操作（除非上下文排除了可能性），並且該方法可以包括一個或多個其他操作，該等操作在任何定義的操作之前、兩個定義的操作之間或在所有定義的操作之後（除非上下文排除了可能性）。
通常，方法100包括在操作110處將抗蝕膜施加到基板102。在一些實施例中，在施加抗蝕膜之前，基板102可選地耦合至載板。在操作120處，方法100包括將基板102暴露於電磁或雷射輻射以圖案化抗蝕膜。在操作130，對基板102進行微噴砂處理以在基板102中形成諸如盲孔、通孔或空腔的結構。該方法亦包括在操作140處蝕刻基板102以去除碎屑和在微噴砂處理期間形成的表面微裂紋，而經圖案化的抗蝕膜仍保持完整。隨後，在操作150處去除經圖案化的抗蝕層，此後，在操作160處可以將基板進一步暴露於載板剝離處理。
基板102由任何合適的基板材料形成，包括但不限於III-V族化合物半導體材料、矽、晶體矽（例如，Si>100>或Si>111>）、氧化矽、矽鍺、摻雜或未摻雜矽、摻雜或未摻雜的多晶矽、氮化矽、石英、硼矽酸鹽玻璃、玻璃、藍寶石、氧化鋁和陶瓷。在一個實施例中，基板102為封裝基板。在一個實施例中，基板102是單晶p型或n型矽基板。在一個實施例中，基板102是多晶p型或n型矽基板。在另一個實施例中，基板102是p型或n型矽太陽能基板。除非另有說明，否則本文所述的實施例和實例是用厚度在約50μm至約1000μm之間，例如約90μm至約780μm之間的基板來進行的。例如，基板102具有在大約100μm和大約300μm之間的厚度，例如在大約110μm和大約200μm之間的厚度。
在基板102具有小於約200μm的厚度（例如約50μm的厚度）的實施例中，在基板結構化處理100期間，基板102被耦合至載板106。載板106在基板結構化處理100期間為基板102提供機械支撐，並防止基板102破裂。載板106由任何合適的化學和熱穩定的剛性材料形成，包括但不限於玻璃、陶瓷、金屬等。載板106具有在大約1mm與大約10mm之間的厚度，例如在大約2mm與大約5mm之間的厚度。在一實施例中，載板106具有紋理化的表面，基板102耦合到該紋理化的表面。在另一實施例中，載板106具有經拋光表面，基板102耦合到經拋光表面。
在一實施例中，基板102經由粘合層108耦接至載板106。粘合層108由任何合適的臨時粘合材料形成，包括但不限於蠟、膠和類似的粘合劑。可以藉由機械輥壓、壓制、層壓、旋塗、刮刀刮塗等將粘合層108施加到載板106上。在一實施例中，粘合層108是水或溶劑可溶的粘合層。在其他實施例中，粘合層108是紫外線釋放粘合層。在其他實施例中，粘合層108是熱釋放粘合層。在此類實施例中，粘合層108的粘合性質在暴露於升高的溫度時降低，例如暴露於高於110℃的溫度，例如高於150℃的溫度。粘合層108可以進一步包括一層或多層膜（未圖示），例如襯裡、熱釋放粘合劑膜、基膜、壓敏膜和其他合適的層。
在操作110，對應於圖2A和圖3A，將抗蝕膜施加到基板102上以形成抗蝕層104。抗蝕層104用於在隨後的處理操作期間將期望的圖案轉印到基板102。在操作120中被圖案化之後，抗蝕層104在操作130中的微噴砂處理期間保護下面的基板102的經選定的區域。
基板102具有可在其上形成抗蝕層104的一個或多個基本平坦的表面。在一個實施例中，例如圖3A所示的實施例，抗蝕層104經由抗蝕粘合層109結合到基板102。抗蝕粘合層109由任何合適的臨時結合材料形成，包括但不限於聚乙烯醇、具有2-乙基-2-(羥甲基)-1,3-丙二醇的三酯和其他水或溶劑可溶的材料。在一實施例中，抗蝕粘合層109由與粘合層108不同的材料形成。在一個實施例中，抗蝕粘合層109的組成與粘合層108基本相似。可以藉由機械輥壓、壓制、層壓、旋塗、刮塗或類似處理將抗蝕粘合層109施加到基板102上。在另一實施例中，例如圖2A所示，抗蝕層104由諸如聚乙烯醇之類的臨時結合材料形成，因此使得抗蝕層104能夠被直接施加並結合到基板102的表面上。抗蝕層104可以進一步包括一個或多個層，例如，第一抗蝕層和第二抗蝕層（未圖示）。
在一個實施例中，例如圖2A所示的實施例，抗蝕層104是光阻劑。抗蝕層104可以包括溶劑、光阻樹脂和光酸產生劑。光阻樹脂可以是任何正性光阻樹脂或任何負性光阻樹脂。代表性的光阻樹脂包括丙烯酸酯、線型酚醛清漆樹脂、聚(甲基丙烯酸甲酯)和聚(烯烴砜)。亦可以使用其他光阻樹脂。暴露於電磁輻射後，光酸產生劑會產生帶電物質，例如酸性陽離子和陰離子。光酸產生劑亦可產生極化物質。光酸產生劑使樹脂對電磁輻射敏感。代表性的光酸產生劑包括磺酸鹽化合物，例如磺化鹽、磺化酯和磺酰氧基酮。其他合適的光酸產生劑包括鎓鹽，例如芳基重氮鹽、鹵鎓鹽，芳族鋶鹽和亞砜鹽或硒鹽。其他代表性的光酸產生劑包括硝基芐基酯、s-三嗪衍生物、離子碘鎓磺酸鹽、全氟鏈烷磺酸鹽、芳基三氟甲磺酸及其衍生物和類似物、連苯三酚衍生物和烷基二砜。亦可以使用其他光酸產生劑。
在一個實施例中，例如圖3A所示的實施例，抗蝕層104是雷射敏感抗蝕劑。抗蝕層104可以由具有適合於雷射燒蝕的硬度的任何材料形成。例如，抗蝕層104由肖氏A級硬度值在約40至約90之間（例如在約60至約70之間）的材料形成。在一實施例中，抗蝕層104由肖氏A級硬度值約為65的材料形成。在進一步的實施例中，抗蝕層404由抗張強度在大約0.5MPa與大約10MPa之間（例如在大約1MPa與大約8MPa之間）的材料形成。例如，抗蝕層104由具有約7MPa的拉伸強度的材料形成。在一些實施例中，抗蝕層104由聚二甲基矽氧烷材料形成。在其他實施例中，雷射敏感抗蝕層104由聚乙烯醇、具有2-乙基-2-(羥甲基)-1,3-丙二醇的三酯等形成。
在操作120處，對應於圖2B和圖3B，將其上形成有抗蝕層104的基板102暴露於電磁輻射以圖案化抗蝕層104。在圖2B所示的實施例中，其上形成有抗蝕層404的基板102暴露於紫外（UV）範圍內的電磁輻射。抗蝕層104的部分被選擇性地暴露，並且抗蝕層104的部分被選擇性地不暴露於UV輻射。如圖2B所示，當暴露於UV輻射時，抗蝕層104的選擇性暴露的部分在結構上變弱，而選擇性未暴露的部分保持其結構上完整性。在一實施例中，在暴露於紫外線輻射之前，在抗蝕層104上或鄰近抗蝕層104形成具有期望圖案的光罩112。在一些實施例中，光罩112是位於抗蝕層104和UV輻射源之間的光罩板。光罩112被配置為將期望的UV輻射圖案轉印到抗蝕層104，並且由任何合適的聚合物材料形成，包括但不限於PTFE、PVDF、FEP、聚酰亞胺等。
在圖3B所示的實施例中，在其上形成有抗蝕層104的基板102暴露於由雷射源303而不是UV輻射源產生的電磁輻射。如此，藉由有針對性的雷射燒蝕而不使用光罩來完成圖案化。雷射源303可以是用於對雷射敏感抗蝕層104進行圖案化的任何合適類型的雷射源。在一些實例中，雷射源303是飛秒綠色雷射。在其他實例中，雷射源303是飛秒UV雷射。雷射源303產生連續或脈衝雷射束，以對抗蝕層104進行圖案化。例如，雷射源303可以產生脈衝雷射束，該脈衝雷射束的頻率在大約100kHz與大約1200kHz之間，例如在大約200kHz與大約1000kHz之間。進一步預期在一些實施例中，操作120處的電磁輻射可替代地或另外地包括電子束或離子束。
在操作130處，對應於圖2C和圖3C，對其上形成有抗蝕層104的基板102進行微噴砂處理以在基板102中形成期望的圖案。在微噴處理期間，粉末粒子205的流在高壓下被推向基板102，以去除基板102的暴露部分和/或在其上形成的層。使用任何合適的基板研磨系統執行微噴處理。在一實施例中，使用惰性氣體的流體流推進粉末粒子205，該惰性氣體包括但不限於氦氣、氬氣和氮氣。在另一個實施例中，使用空氣的流體流推動粉末粒子205。
微噴處理由粉末粒子205的材料特性、撞擊基板102的暴露表面的粉末粒子205的動量，以及基板102的材料特性以及（若適用）抗蝕層104的選擇性曝光部分來確定。為了獲得期望的基板圖案化特性，對粉末粒子205的類型和尺寸、研磨系統的施加器噴嘴到基板102的尺寸和距離、用於推動粉末粒子205的壓力，以及流體流中的粉末粒子205的密度進行調整。例如，可以基於基板102和粉末粒子205的材料來確定用於將粉末粒子205朝著基板102推進以用於期望的固定微噴元件噴嘴孔尺寸的載氣的所期望的流體壓力。在一實施例中，用於微噴砂基板102的流體壓力通常在約50psi至約150psi之間，例如在約75psi至約125psi之間，以實現載氣和粒子速度在約300米每秒（m/s）和約1000m/s之間，和/或流速在約0.001立方米每秒（m3 /s）和約0.002m3 /s之間。例如，在微噴期間用於推動粉末粒子205的惰性氣體（例如，氮氣（N2 ）、CDA、氬氣）的流體壓力為約95psi，以實現約2350m/s的載氣和粒子速度。在一個實施例中，用於對基片102進行微噴砂處理的施加器噴嘴具有約0.1毫米（mm）至約2.5mm的內徑，該內徑設置在距基片102約1mm至約5mm的距離處，例如在約2mm至約4mm之間。例如，在微噴砂期間，施加器噴嘴設置在距基板102約3mm的距離處。
通常，用具有足夠硬度和高熔點的粉末粒子205進行微噴砂處理，以防止粒子與基板102和/或在其上形成的任何層在接觸時粘合。例如，利用由陶瓷材料形成的粉末粒子205進行微噴砂處理。在一個實施例中，在微噴處理中使用的粉末粒子205由氧化鋁（Al2 O3 )形成。在另一個實施例中，粉末粒子205由碳化矽（SiC）形成。亦可以考慮用於粉末粒子205的其他合適的材料。粉末粒子205的尺寸大小通常在直徑約15μm至約60μm之間，例如直徑在約20μm至約40μm之間。例如，粉末粒子205的平均粒子尺寸為直徑約27.5μm。在另一個例子中，粉末粒子205的平均粒子尺寸為直徑約23μm。
在操作120處的微噴處理的有效性進一步取決於抗蝕層104的材料特性。使用肖氏A級硬度太高的材料可能會導致抗蝕層104的側壁之間的粉末粒子205發生不希望的彈跳，從而降低了粉末粒子205轟擊基板102的速度，最終降低了粉末粒子205在侵蝕或移動基板102的暴露區域的有效性。相反，利用肖氏A級硬度太低的材料可能導致粉末粒子205與抗蝕層104發生不必要的粘合。可以預期，如上所述，抗蝕層104材料使用的肖氏A級硬度值在約40至約90之間。
在抗蝕層104是諸如圖2C所示的光阻的實施例中，在操作130開始時基板102保持未曝光。因此，粉末粒子205首先轟擊抗蝕層104的表面，從而使來自光阻的UV曝光和結構弱化部分的材料被移走和去除。粉末粒子205最終穿透並去除脆性的紫外線曝光部分，從而在抗蝕層104中形成空隙，從而使基板102的期望區域曝光，而其他區域仍被光阻的紫外線未曝光部分遮蔽。然後繼續進行微噴砂，直到粉末粒子205從基板102的暴露區域中移出並去除所需量的或深度的材料，從而在基板102中形成所需圖案。
在其中藉由雷射燒蝕將抗蝕層104圖案化的實施例中，如圖3C所示，在操作130進行微噴砂之前，基板102的期望區域已經經由抗蝕層104中的空隙暴露。因此，在微噴處理期間，在操作130中，預期抗蝕層104的去除最少或沒有去除。在一個實施例中，微噴處理是可選的，並且可以單獨使用雷射燒蝕來對基板102進行圖案化。
在操作140處，對應於圖2D和圖3D，在將所需圖案微噴入基板102之後，將基板102暴露於蝕刻處理。在操作140處的蝕刻處理係用於使基板102的表面平滑化並去除其上的任何不想要的機械缺陷。蝕刻處理進行預定的持續時間以平坦化基板102的表面，尤其是在操作130處暴露於微噴處理的表面。一方面，在操作140處的蝕刻處理被用於去除在操作130處的微噴處理中殘留的不需要的碎屑。在操作140的蝕刻處理中，可以去除粘合到基板102上的殘留粉末粒子205。
在一個實施例中，在操作140處的蝕刻處理是利用緩沖蝕刻處理的濕蝕刻處理，該緩沖蝕刻處理優先在抗蝕層104的材料上方蝕刻基板表面。例如，緩沖蝕刻處理可以對聚乙烯醇具有選擇性。在一個實施例中，蝕刻處理是利用水性蝕刻處理的濕蝕刻處理。任何合適的濕蝕刻劑或濕蝕刻劑的組合可以用於濕蝕刻處理。在一個實施例中，將基板102浸入HF蝕刻水溶液中以進行蝕刻。在其他實施例中，將基板102浸入KOH蝕刻水溶液中以進行蝕刻。在一個實施例中，在蝕刻處理期間將蝕刻溶液加熱至介於約40℃與約80℃之間的溫度，例如介於約50℃與約70℃之間。例如，將蝕刻溶液加熱到約60℃的溫度。蝕刻處理可以進一步是各向同性的或各向異性的。在一實施例中，在操作140處的蝕刻處理是乾蝕刻處理。乾蝕刻處理的示例包括基於電漿的乾蝕刻處理。
在操作150，對應於圖2E和圖3E，基板102暴露於抗蝕劑剝離處理。在操作150處的剝離處理被用於將抗蝕層104從基板102剝離。在一個實施例中，藉由溶解/增溶抗蝕粘合層109和/或抗蝕層104，使用濕式處理將抗蝕層104從基板102剝離。亦可以考慮使用其他類型的蝕刻處理來釋放抗蝕粘合層109和/或抗蝕層104。在一個實施例中，藉由物理剝離抗蝕層104或抗蝕粘合層109，使用機械輥壓處理將抗蝕層104從基板102剝離。在一個實施例中，灰化處理用於藉由使用（例如）氧電漿輔助處理從基板102去除抗蝕層104。
在操作160處，對應於圖2F和圖3F，將基板102暴露於可選的載體剝離處理。載體剝離處理的利用取決於基板102是否耦合至載板106以及取決於用於將基板102耦合至其的結合材料的類型。如上所述，如圖2A至圖2F和圖3A至圖3F所示，在基板102的厚度小於約200μm的實施例中，在基板結構化處理100期間，將基板耦合到載板106以進行機械支撐。在一些實施例中，基板102經由粘合層108耦合到載板106。因此，在操作160，將與載板106耦合的基板102暴露於載體剝離處理，以藉由釋放粘合層108將基板102從載板106剝離。
在一個實施例中，藉由將基板102暴露於烘烤處理來釋放粘合層108。在一個實施例中，基板102暴露於介於約50℃與約300℃之間的溫度，例如介於約100℃與約250℃之間的溫度。例如，將基板102暴露於介於約150℃與約200℃之間的溫度，例如約160℃，持續所需的時間，以釋放粘合層108。在其他實施例中，藉由將基板102暴露於UV輻射來釋放粘合層108。
圖2F和圖3F圖示了方法100完成之後的結構化基板102。圖2F和圖3F中描繪的基板102具有穿過其而形成的三個結構220。方法100用於在基板102中形成具有各種期望深度、尺寸和形狀的圖案化結構220。在一個實施例中，結構220的深度等於基板102的厚度，從而形成穿過基板102的兩個相對表面的孔。在一個實施例中，結構220的深度小於基板102的厚度，因此僅在基板102的一個表面上形成孔。例如，取決於基板102的厚度，形成在基板102中的結構220可具有介於約10μm與約600μm之間的深度，諸如介於約25μm與約200μm之間的深度。在一實施例中，取決於基板102的尺寸，結構220具有介於約20μm與約15mm之間的橫向尺寸，例如約50μm與約5mm。在一個實施例中，形成於基板102中的結構220具有橢球形或圓錐形的形狀。在另一實施例中，形成在基板102中的結構220具有長方體形狀。可以設想，由方法100形成的結構220可以具有基板102所允許的任何期望的形狀、尺寸和深度。
圖4A至圖4E圖示了在與上述實施例類似的替代性結構化順序期間的基板102的示意性剖面視圖。與僅一個表面相比，圖4A至圖4E中描繪的替代順序涉及在兩個主要的相對表面上對基板102進行圖案化，從而在基板102的結構化期間能夠提高效率。圖4A至圖4E中描繪的基板結構化順序基本上包括如參考圖1、圖2A至圖2F以及圖3A至圖3F所描述的所有特徵和操作。例如，圖4A對應於操作110以及圖2A和圖3A；圖4B對應於操作120以及圖2B和圖3B；圖4C對應於操作130以及圖2C和圖3C；圖4D對應於操作140以及圖2D和圖3D；圖4E對應於操作150以及圖2F和圖3F。然而，與先前的實施例不同，圖4A至圖4E所示的實施例包括具有在其相對表面405、407上形成的兩個抗蝕層104的基板102，從而使得能夠在兩個表面405、407上執行結構化操作。
例如，在操作120處，將在基板102的表面405上形成的抗蝕層104暴露於電磁輻射以進行圖案化之後，可選地翻轉基板102（例如，使基板翻身），使得在基板102的相對的表面407上的抗蝕層104可以暴露於電磁輻射以用於圖案化（如圖4B所示）。類似地，在基板102的表面405上執行操作130的微噴砂處理之後，可以可選地再次翻轉基板102，從而可以在基板102的相對表面407上進行微噴砂，如圖4C所示。藉由在基板102的相對表面405、407上使用兩個抗蝕層104以及藉由對兩個表面執行微噴處理，亦可以減少或消除在微噴期間貫穿基板102的整個厚度形成的結構的錐度。
圖5圖示了用於結構化基板102的另一代表性方法500的流程圖。圖6A至圖6D圖示了在圖5的結構化處理的不同階段的基板102的示意性剖面視圖。因此，在必要時對圖5和方法500的討論中將包括對圖6A至圖6D的參考。與上述方法相似，用於結構化基板102的方法500具有多個操作。可以以任何順序或同時執行該等操作（除非上下文排除了可能性），並且該方法可以包括一個或多個其他操作，該等操作在任何定義的操作之前，兩個定義的操作之間或在所有定義的操作之後（除非上下文排除了可能性）。
通常，方法500包括在操作510處將基板102放置在雷射燒蝕系統的支架606上。在一些實施例中，在放置在支架606上之前，基板102可選地耦合至載板。在操作520，基板102暴露於雷射輻射以圖案化基板102並在其中形成期望的特徵。在操作530，使基板102暴露於蝕刻處理以去除由雷射圖案化引起的碎屑和表面微裂紋。在基板102耦合至載板的實施例中，在執行蝕刻處理之後，基板102進一步從載板剝離。
如圖6A中所描繪且對應於操作510，將基板102（例如，太陽能基板）放置在雷射燒蝕系統（未圖示）的支架606上。支架606可以是任何合適的剛性且平坦的表面，以在雷射燒蝕期間為基板102提供機械支撐。在一些實施例中，支架606包括用於將基板102以靜電吸附到支架606的靜電吸盤。在一些實施例中，支架606包括真空吸盤，用於將基板102以真空吸附到支架606。
如圖6B所示並且與操作520相對應，在將基板102放置在支架606上之後，藉由雷射燒蝕在基板102中形成期望的圖案。雷射燒蝕系統可以包括用於圖案化基板102的任何合適類型的雷射源603。在一些實例中，雷射源603是紅外（IR）雷射。在一些實例中，雷射源603是皮秒UV雷射。在其他實例中，雷射源603是飛秒UV雷射。在其他實例中，雷射源603是飛秒綠色雷射。雷射源603產生用於圖案化基板102的連續或脈衝雷射束607。例如，雷射源603可以產生具有在100kHz和1200kHz之間的頻率，例如在200kHz和大約1000kHz之間的頻率的脈衝雷射束607。雷射源603被配置為在基板102中形成任何期望的圖案和特徵，包括空腔和通孔。
類似於微噴砂，對基板102進行直接雷射圖案化的處理可能在基板102的表面上引起不希望的機械缺陷，包括碎裂和破裂。因此，在藉由直接雷射圖案化在基板102中形成期望的特徵之後，在操作530中使基板102暴露於蝕刻處理，該蝕刻處理與參照操作140所述的蝕刻處理基本相似，以去除任何殘留的碎屑並平滑化基板102的表面。圖6C至圖6D圖示了在執行蝕刻處理之前和之後的基板102，該蝕刻處理以具有在結構化基板中形成的三個特徵620（例如，通孔）的結構化基板102完成。
本文描述的實施例有利地提供了用於進階積體電路封裝的改進的基板結構化方法。藉由利用上述方法，可以在玻璃和/或矽基板上形成高深寬比的特徵，同時大大降低製造成本，此可以用作矽中介層的經濟替代。
儘管前述內容針對本揭示案的實施例，但是在不脫離本揭示案的基本範疇的情況下，可以設計本揭示案的其他和進一步的實施例，並且本揭示案的範疇由所附請求項確定。
102:基板 100:方法 110:操作 130:操作 140:操作 150:操作 160:操作 100:基板結構化處理 106:載板 108:粘合層 110:操作 104:抗蝕層 120:操作 109:抗蝕粘合層 112:光罩 303:雷射源 205:粉末粒子 106:載板 220:結構 405:表面 407:表面 500:方法 510:操作 606:支架 520:操作 530:操作 603:雷射源 607:雷射束 620:特徵 404:抗蝕層
因此，可以詳細地理解本揭示案的上述特徵的方式，可以藉由參考實施例來對本揭示案進行更詳細的描述，本揭示案的詳細描述如上簡要概述，該等實施例中的一些在附圖中圖示。然而，應注意，附圖僅圖示示例性實施例，因此不應被認為是對其範疇的限制，並且可以允許其他等效實施例。
圖1圖示了根據本文描述的實施例的基板結構化處理的流程圖。
圖2A至圖2F示意性地圖示了根據本文描述的實施例的在基板結構化處理的不同階段的基板的剖面視圖。
圖3A至圖3F示意性地圖示了根據本文描述的實施例的在基板結構化處理的不同階段的基板的剖面視圖。
圖4A至圖4E示意性地圖示了根據本文描述的實施例的在基板結構化處理的不同階段的基板的剖面視圖。
圖5圖示了根據本文描述的實施例的基板結構化處理的流程圖。
圖6A至圖6D示意性地圖示了根據本文描述的實施例的在基板結構化處理的不同階段的基板的剖面視圖。
為了便於理解，在可能的地方使用了相同的元件符號來表示圖中共有的相同元件。可以預期的是，一個實施例的元件和特徵可以被有益地併入其他實施例中，而無需進一步敘述。
國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無
100:方法
110:操作
120:操作
130:操作
140:操作
150:操作
160:操作

Claims (20)

  1. 一種用於基板結構化的方法，包括以下步驟： 將一基板粘合到一載板上，該基板經由一第一粘合層粘合至該載板； 在該基板上形成一抗蝕層，該抗蝕層經由一第二粘合層粘合至該基板。 藉由電磁輻射圖案化該抗蝕層； 圖案化該基板以在其中形成經結構化的圖案，藉由將一粉末粒子流推向經圖案化的該抗蝕層來圖案化該基板； 將該基板暴露於一蝕刻處理以從該基板中的該經結構化的圖案去除碎屑，該蝕刻處理進一步平滑化該基板的一個或多個表面； 藉由釋放該第二粘合層將該抗蝕層與該基板剝離；和 藉由釋放該第一粘合層將該基板與該載板剝離。
  2. 如請求項1所述之方法，其中該基板是一單晶p型矽基板。
  3. 如請求項1所述之方法，其中該基板是一矽太陽能基板。
  4. 如請求項3所述之方法，其中該基板的厚度小於大約200μm。
  5. 如請求項1所述之方法，其中該抗蝕層是一光阻劑，該光阻劑係藉由一光罩選擇性地暴露於UV輻射而經圖案化。
  6. 如請求項1所述之方法，其中藉由雷射燒蝕對該抗蝕層進行圖案化。
  7. 如請求項6所述之方法，其中該抗蝕層的肖氏A級硬度值在大約40與大約90之間。
  8. 如請求項1所述之方法，其中該等粉末粒子包括一陶瓷材料。
  9. 如請求項8所述之方法，其中該等粉末粒子包括氧化鋁。
  10. 如請求項8所述之方法，其中該等粉末粒子包括碳化矽。
  11. 如請求項8所述的方法，其中該等粉末粒子的一直徑介於約15μm與約40μm之間。
  12. 如請求項8所述之方法，其中，用於推動該粉末粒子流的一流體壓力在約50psi與約150psi之間。
  13. 如請求項12所述之方法，其中該等粉末粒子係用包括氦、氬或氮的惰性氣體的一流體流來推進。
  14. 一種基板結構化方法，包括以下步驟： 在一矽太陽能基板上形成一抗蝕層； 介於使該抗蝕層暴露於電磁輻射來圖案化該抗蝕層； 將高壓下的一粉末粒子流推向該基板，以從該基板上移出和去除材料，材料的移出和去除在該基板中形成經結構化的圖案；和 將該基板暴露於一蝕刻處理以從該基板中的該經結構化的圖案去除碎屑，該蝕刻處理進一步使該基板的一個或多個表面平滑化。
  15. 如請求項14所述的方法，其中該基板是一單晶矽太陽能基板。
  16. 如請求項14所述的方法，其中該等粉末粒子的一直徑在約20μm與約35μm之間。
  17. 如請求項16所述的方法，其中該等粉末粒子包括氧化鋁。
  18. 如請求項16所述的方法，其中該等粉末粒子包括碳化矽。
  19. 一種用於基板結構化的方法，包括以下步驟： 在一基板的一第一表面上形成一第一抗蝕層，該第一抗蝕層經由該第一粘合層粘合至該基板； 在該基板的一第二表面上形成一第二抗蝕層，該第二抗蝕層經由一第二粘合層粘合至該基板，其中該基板包括在該第一表面和該第二表面之間延伸的一厚度； 圖案化該第一抗蝕層； 圖案化該第二抗蝕層； 將粉末粒子推向該基板的該第一表面，以在該基板的該第一表面上形成一個或多個圖案化的結構； 將粉末粒子推向該基板的該第二表面，以使該一個或多個經圖案化的結構在該基板的整個厚度上膨脹；和 將該基板暴露於一蝕刻處理以從該基板去除碎屑，該蝕刻處理進一步使該基板的一個或多個表面平滑化。
  20. 如請求項19所述之方法，其中藉由雷射燒蝕圖案化該第一抗蝕層和該第二抗蝕層。
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Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT201900006736A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di fabbricazione di package
IT201900006740A1 (it) * 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di strutturazione di substrati
US11931855B2 (en) 2019-06-17 2024-03-19 Applied Materials, Inc. Planarization methods for packaging substrates
US11862546B2 (en) 2019-11-27 2024-01-02 Applied Materials, Inc. Package core assembly and fabrication methods
US11257790B2 (en) 2020-03-10 2022-02-22 Applied Materials, Inc. High connectivity device stacking
US11454884B2 (en) 2020-04-15 2022-09-27 Applied Materials, Inc. Fluoropolymer stamp fabrication method
US11400545B2 (en) 2020-05-11 2022-08-02 Applied Materials, Inc. Laser ablation for package fabrication
US11676832B2 (en) 2020-07-24 2023-06-13 Applied Materials, Inc. Laser ablation system for package fabrication
US11315890B2 (en) 2020-08-11 2022-04-26 Applied Materials, Inc. Methods of forming microvias with reduced diameter
US11521937B2 (en) 2020-11-16 2022-12-06 Applied Materials, Inc. Package structures with built-in EMI shielding
US11404318B2 (en) 2020-11-20 2022-08-02 Applied Materials, Inc. Methods of forming through-silicon vias in substrates for advanced packaging
US11705365B2 (en) 2021-05-18 2023-07-18 Applied Materials, Inc. Methods of micro-via formation for advanced packaging

Family Cites Families (353)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4073610A (en) 1976-02-05 1978-02-14 Cox Bernard K Apparatus for producing a foldable plastic strip
US4751349A (en) 1986-10-16 1988-06-14 International Business Machines Corporation Zirconium as an adhesion material in a multi-layer metallic structure
JPH0494592A (ja) 1990-08-10 1992-03-26 Cmk Corp プリント配線板におけるスルーホールに対する充填材の充填方法
US5126016A (en) 1991-02-01 1992-06-30 International Business Machines Corporation Circuitization of polymeric circuit boards with galvanic removal of chromium adhesion layers
US5519332A (en) 1991-06-04 1996-05-21 Micron Technology, Inc. Carrier for testing an unpackaged semiconductor die
US5474834A (en) 1992-03-09 1995-12-12 Kyocera Corporation Superconducting circuit sub-assembly having an oxygen shielding barrier layer
JP2819523B2 (ja) 1992-10-09 1998-10-30 インターナショナル・ビジネス・マシーンズ・コーポレイション 印刷配線板及びその製造方法
US5367143A (en) 1992-12-30 1994-11-22 International Business Machines Corporation Apparatus and method for multi-beam drilling
JPH06244093A (ja) * 1993-02-17 1994-09-02 Hitachi Ltd 基板保持方法ならびにそれを用いた薄膜多層基板の製造方法および装置
JPH06333816A (ja) * 1993-05-24 1994-12-02 Hitachi Ltd パターン形成方法
US5353195A (en) 1993-07-09 1994-10-04 General Electric Company Integral power and ground structure for multi-chip modules
US5688716A (en) 1994-07-07 1997-11-18 Tessera, Inc. Fan-out semiconductor chip assembly
US5783870A (en) 1995-03-16 1998-07-21 National Semiconductor Corporation Method for connecting packages of a stacked ball grid array structure
US5670262A (en) 1995-05-09 1997-09-23 The Dow Chemical Company Printing wiring board(s) having polyimidebenzoxazole dielectric layer(s) and the manufacture thereof
US5767480A (en) 1995-07-28 1998-06-16 National Semiconductor Corporation Hole generation and lead forming for integrated circuit lead frames using laser machining
US6013948A (en) * 1995-11-27 2000-01-11 Micron Technology, Inc. Stackable chip scale semiconductor package with mating contacts on opposed surfaces
JPH09254027A (ja) * 1996-03-25 1997-09-30 Chiyoda Kk 研磨用マウンテン材
US6631558B2 (en) 1996-06-05 2003-10-14 Laservia Corporation Blind via laser drilling system
US7062845B2 (en) 1996-06-05 2006-06-20 Laservia Corporation Conveyorized blind microvia laser drilling system
WO1997046349A1 (en) 1996-06-05 1997-12-11 Burgess Larry W Blind via laser drilling system
US5841102A (en) 1996-11-08 1998-11-24 W. L. Gore & Associates, Inc. Multiple pulse space processing to enhance via entrance formation at 355 nm
US5868950A (en) * 1996-11-08 1999-02-09 W. L. Gore & Associates, Inc. Method to correct astigmatism of fourth yag to enable formation of sub 25 micron micro-vias using masking techniques
WO1998044319A1 (en) 1997-04-03 1998-10-08 Yamatake Corporation Circuit board and detector, and method for manufacturing the same
JP3920399B2 (ja) 1997-04-25 2007-05-30 株式会社東芝 マルチチップ半導体装置用チップの位置合わせ方法、およびマルチチップ半導体装置の製造方法・製造装置
US6388202B1 (en) 1997-10-06 2002-05-14 Motorola, Inc. Multi layer printed circuit board
US6038133A (en) 1997-11-25 2000-03-14 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module and method for producing the same
GB9811328D0 (en) 1998-05-27 1998-07-22 Exitech Ltd The use of mid-infrared lasers for drilling microvia holes in printed circuit (wiring) boards and other electrical circuit interconnection packages
MY128333A (en) 1998-09-14 2007-01-31 Ibiden Co Ltd Printed wiring board and its manufacturing method
SE513341C2 (sv) 1998-10-06 2000-08-28 Ericsson Telefon Ab L M Arrangemang med tryckta kretskort samt metod för tillverkning därav
US6039889A (en) 1999-01-12 2000-03-21 Fujitsu Limited Process flows for formation of fine structure layer pairs on flexible films
US6117704A (en) 1999-03-31 2000-09-12 Irvine Sensors Corporation Stackable layers containing encapsulated chips
US6599836B1 (en) 1999-04-09 2003-07-29 Micron Technology, Inc. Planarizing solutions, planarizing machines and methods for mechanical or chemical-mechanical planarization of microelectronic-device substrate assemblies
US6212769B1 (en) 1999-06-29 2001-04-10 International Business Machines Corporation Process for manufacturing a printed wiring board
EP1201108B1 (en) 1999-08-03 2003-10-22 Xsil Technology Limited A circuit singulation system and method
KR100890475B1 (ko) 1999-09-02 2009-03-26 이비덴 가부시키가이샤 프린트배선판 및 그 제조방법
ATE233985T1 (de) 1999-09-30 2003-03-15 Siemens Ag Verfahren und einrichtung zum laserbohren von laminaten
US6538210B2 (en) 1999-12-20 2003-03-25 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module, radio device having the same, and method for producing the same
US6887804B2 (en) 2000-01-10 2005-05-03 Electro Scientific Industries, Inc. Passivation processing over a memory link
US6392290B1 (en) * 2000-04-07 2002-05-21 Siliconix Incorporated Vertical structure for semiconductor wafer-level chip scale packages
US6384473B1 (en) 2000-05-16 2002-05-07 Sandia Corporation Microelectronic device package with an integral window
US6661084B1 (en) 2000-05-16 2003-12-09 Sandia Corporation Single level microelectronic device package with an integral window
US6927176B2 (en) 2000-06-26 2005-08-09 Applied Materials, Inc. Cleaning method and solution for cleaning a wafer in a single wafer process
US6593240B1 (en) 2000-06-28 2003-07-15 Infineon Technologies, North America Corp Two step chemical mechanical polishing process
US20020048715A1 (en) 2000-08-09 2002-04-25 Bret Walczynski Photoresist adhesive and method
US20020020898A1 (en) 2000-08-16 2002-02-21 Vu Quat T. Microelectronic substrates with integrated devices
US6459046B1 (en) 2000-08-28 2002-10-01 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method for producing the same
EP1321980A4 (en) 2000-09-25 2007-04-04 Ibiden Co Ltd SEMICONDUCTOR ELEMENT, METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT, MULTILAYER PRINTED CIRCUIT BOARD, AND METHOD FOR MANUFACTURING MULTILAYER PRINTED CIRCUIT BOARD
US20020070443A1 (en) 2000-12-08 2002-06-13 Xiao-Chun Mu Microelectronic package having an integrated heat sink and build-up layers
US6555906B2 (en) 2000-12-15 2003-04-29 Intel Corporation Microelectronic package having a bumpless laminated interconnection layer
JP4108285B2 (ja) 2000-12-15 2008-06-25 イビデン株式会社 多層プリント配線板の製造方法
US6388207B1 (en) 2000-12-29 2002-05-14 Intel Corporation Electronic assembly with trench structures and methods of manufacture
JP5004378B2 (ja) 2001-01-10 2012-08-22 イビデン株式会社 多層プリント配線板
TW511415B (en) 2001-01-19 2002-11-21 Matsushita Electric Ind Co Ltd Component built-in module and its manufacturing method
JP2001244591A (ja) 2001-02-06 2001-09-07 Ngk Spark Plug Co Ltd 配線基板及びその製造方法
US20020112963A1 (en) * 2001-02-22 2002-08-22 Nikon Corporation Methods for fabricating high-precision thermally stable electromagnetic coils
US6512182B2 (en) 2001-03-12 2003-01-28 Ngk Spark Plug Co., Ltd. Wiring circuit board and method for producing same
US7160432B2 (en) 2001-03-14 2007-01-09 Applied Materials, Inc. Method and composition for polishing a substrate
US7887712B2 (en) 2001-03-22 2011-02-15 Electro Scientific Industries, Inc. Laser machining system and method
US6465084B1 (en) 2001-04-12 2002-10-15 International Business Machines Corporation Method and structure for producing Z-axis interconnection assembly of printed wiring board elements
US6894399B2 (en) 2001-04-30 2005-05-17 Intel Corporation Microelectronic device having signal distribution functionality on an interfacial layer thereof
US20030059976A1 (en) 2001-09-24 2003-03-27 Nathan Richard J. Integrated package and methods for making same
JP2003145426A (ja) 2001-11-19 2003-05-20 Mtc:Kk マスク用基板リサイクルのためのパターン除去方法およびそのパターン除去装置およびこれらでパターン除去されたマスク用基板
US6677552B1 (en) * 2001-11-30 2004-01-13 Positive Light, Inc. System and method for laser micro-machining
JP2003188340A (ja) 2001-12-19 2003-07-04 Matsushita Electric Ind Co Ltd 部品内蔵モジュールとその製造方法
JP3998984B2 (ja) 2002-01-18 2007-10-31 富士通株式会社 回路基板及びその製造方法
US6506632B1 (en) 2002-02-15 2003-01-14 Unimicron Technology Corp. Method of forming IC package having downward-facing chip cavity
US7358157B2 (en) 2002-03-27 2008-04-15 Gsi Group Corporation Method and system for high-speed precise laser trimming, scan lens system for use therein and electrical device produced thereby
US7028400B1 (en) 2002-05-01 2006-04-18 Amkor Technology, Inc. Integrated circuit substrate having laser-exposed terminals
JP3871609B2 (ja) 2002-05-27 2007-01-24 松下電器産業株式会社 半導体装置及びその製造方法
JP2003347741A (ja) 2002-05-30 2003-12-05 Taiyo Yuden Co Ltd 複合多層基板およびそれを用いたモジュール
US20030235989A1 (en) * 2002-06-25 2003-12-25 Seagate Technology Llc Process for CMP assisted liftoff
JP3908146B2 (ja) 2002-10-28 2007-04-25 シャープ株式会社 半導体装置及び積層型半導体装置
US6905914B1 (en) 2002-11-08 2005-06-14 Amkor Technology, Inc. Wafer level package and fabrication method
GB2401485B (en) 2002-12-11 2006-07-26 Dainippon Printing Co Ltd Multilayer wiring board and manufacture method thereof
US7105931B2 (en) 2003-01-07 2006-09-12 Abbas Ismail Attarwala Electronic package and method
US8704359B2 (en) 2003-04-01 2014-04-22 Ge Embedded Electronics Oy Method for manufacturing an electronic module and an electronic module
JP2004311788A (ja) 2003-04-08 2004-11-04 Matsushita Electric Ind Co Ltd シート状モジュールとその製造方法
JP2004335641A (ja) 2003-05-06 2004-11-25 Canon Inc 半導体素子内蔵基板の製造方法
EP1478021B1 (en) 2003-05-15 2008-07-16 Sanyo Electric Co., Ltd. Semiconductor device and manufacturing method thereof
US20060283716A1 (en) 2003-07-08 2006-12-21 Hooman Hafezi Method of direct plating of copper on a ruthenium alloy
CN1577819A (zh) 2003-07-09 2005-02-09 松下电器产业株式会社 带内置电子部件的电路板及其制造方法
US7271012B2 (en) 2003-07-15 2007-09-18 Control Systemation, Inc. Failure analysis methods and systems
EP1517166B1 (en) 2003-09-15 2015-10-21 Nuvotronics, LLC Device package and methods for the fabrication and testing thereof
JP2005101384A (ja) 2003-09-26 2005-04-14 Sanyo Electric Co Ltd 光起電力装置及びその製造方法
US7364985B2 (en) * 2003-09-29 2008-04-29 Micron Technology, Inc. Method for creating electrical pathways for semiconductor device structures using laser machining processes
US7064069B2 (en) 2003-10-21 2006-06-20 Micron Technology, Inc. Substrate thinning including planarization
JP4081052B2 (ja) 2003-12-05 2008-04-23 三井金属鉱業株式会社 プリント配線基板の製造法
JP4271590B2 (ja) 2004-01-20 2009-06-03 新光電気工業株式会社 半導体装置及びその製造方法
US7309515B2 (en) 2004-02-04 2007-12-18 Industrial Technology Research Institute Method for fabricating an imprint mold structure
TWI256095B (en) 2004-03-11 2006-06-01 Siliconware Precision Industries Co Ltd Wafer level semiconductor package with build-up layer and process for fabricating the same
US20060000814A1 (en) 2004-06-30 2006-01-05 Bo Gu Laser-based method and system for processing targeted surface material and article produced thereby
US8571541B2 (en) 2004-07-15 2013-10-29 Avaya Inc. Proximity-based authorization
DE102004038852B4 (de) 2004-08-10 2006-06-29 Webasto Ag Spritzgießmaschine
US20080090095A1 (en) 2004-09-01 2008-04-17 Sumitomo Metal Mining Co., Ltd. Adhesiveless Copper Clad Laminates And Method For Manufacturing Thereof
TWI241007B (en) 2004-09-09 2005-10-01 Phoenix Prec Technology Corp Semiconductor device embedded structure and method for fabricating the same
TW200618705A (en) 2004-09-16 2006-06-01 Tdk Corp Multilayer substrate and manufacturing method thereof
US20060073234A1 (en) 2004-10-06 2006-04-06 Williams Michael E Concrete stamp and method of manufacture
JP4564342B2 (ja) 2004-11-24 2010-10-20 大日本印刷株式会社 多層配線基板およびその製造方法
TWI301660B (en) 2004-11-26 2008-10-01 Phoenix Prec Technology Corp Structure of embedding chip in substrate and method for fabricating the same
TWI245384B (en) 2004-12-10 2005-12-11 Phoenix Prec Technology Corp Package structure with embedded chip and method for fabricating the same
TWI245388B (en) 2005-01-06 2005-12-11 Phoenix Prec Technology Corp Three dimensional package structure of semiconductor chip embedded in substrate and method for fabricating the same
US7579224B2 (en) 2005-01-21 2009-08-25 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a thin film semiconductor device
TWI260056B (en) 2005-02-01 2006-08-11 Phoenix Prec Technology Corp Module structure having an embedded chip
JP2006216713A (ja) 2005-02-02 2006-08-17 Ibiden Co Ltd 多層プリント配線板
JP2006216714A (ja) 2005-02-02 2006-08-17 Ibiden Co Ltd 多層プリント配線板
TWI283553B (en) 2005-04-21 2007-07-01 Ind Tech Res Inst Thermal enhanced low profile package structure and method for fabricating the same
US7919844B2 (en) 2005-05-26 2011-04-05 Aprolase Development Co., Llc Tier structure with tier frame having a feedthrough structure
DE102005042072A1 (de) * 2005-06-01 2006-12-14 Forschungsverbund Berlin E.V. Verfahren zur Erzeugung von vertikalen elektrischen Kontaktverbindungen in Halbleiterwafern
US7215032B2 (en) 2005-06-14 2007-05-08 Cubic Wafer, Inc. Triaxial through-chip connection
KR100714196B1 (ko) 2005-07-11 2007-05-02 삼성전기주식회사 전기소자를 내장한 인쇄회로기판 및 그 제조방법
TWI263313B (en) 2005-08-15 2006-10-01 Phoenix Prec Technology Corp Stack structure of semiconductor component embedded in supporting board
US20070042563A1 (en) 2005-08-19 2007-02-22 Honeywell International Inc. Single crystal based through the wafer connections technical field
US20070077865A1 (en) 2005-10-04 2007-04-05 Cabot Microelectronics Corporation Method for controlling polysilicon removal
KR100772639B1 (ko) 2005-10-18 2007-11-02 한국기계연구원 다이아몬드상 카본 박막을 이용한 미세 임프린트리소그래피용 스탬프 및 그 제조방법
CN100463128C (zh) 2005-11-25 2009-02-18 全懋精密科技股份有限公司 半导体芯片埋入基板的三维构装结构及其制作方法
CN100524717C (zh) 2005-11-25 2009-08-05 全懋精密科技股份有限公司 芯片内埋的模块化结构
KR100688701B1 (ko) 2005-12-14 2007-03-02 삼성전기주식회사 랜드리스 비아홀을 구비한 인쇄회로기판의 제조방법
US7765691B2 (en) * 2005-12-28 2010-08-03 Intel Corporation Method and apparatus for a printed circuit board using laser assisted metallization and patterning of a substrate
JP4358189B2 (ja) * 2006-01-17 2009-11-04 Ｔｄｋ株式会社 基板の加工方法
KR101329931B1 (ko) 2006-04-25 2013-11-28 니혼도꾸슈도교 가부시키가이샤 배선기판
KR101037229B1 (ko) 2006-04-27 2011-05-25 스미토모 베이클리트 컴퍼니 리미티드 반도체 장치 및 반도체 장치의 제조 방법
WO2007127984A2 (en) 2006-04-28 2007-11-08 Polyset Company, Inc. Siloxane epoxy polymers for redistribution layer applications
US8022552B2 (en) 2006-06-27 2011-09-20 Megica Corporation Integrated circuit and method for fabricating the same
KR100731112B1 (ko) 2006-07-24 2007-06-22 동부일렉트로닉스 주식회사 포토 레지스트를 제거하기 위한 ｃｍｐ 슬러리
JP5252792B2 (ja) 2006-08-25 2013-07-31 日本ミクロコーティング株式会社 酸化物超伝導体用テープ基材の研磨方法並びに酸化物超伝導体及び酸化物超伝導体用基材
JP5329784B2 (ja) * 2006-08-25 2013-10-30 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5016876B2 (ja) * 2006-09-06 2012-09-05 株式会社ディスコ ビアホールの加工方法
JP4927484B2 (ja) * 2006-09-13 2012-05-09 株式会社ディスコ 積層用デバイスの製造方法
JP2008068292A (ja) * 2006-09-14 2008-03-27 Disco Abrasive Syst Ltd ビアホールの加工方法
JP2008073740A (ja) * 2006-09-22 2008-04-03 Disco Abrasive Syst Ltd ビアホールの加工方法
KR20080037296A (ko) 2006-10-25 2008-04-30 삼성전자주식회사 박막 트랜지스터 기판 및 그 제조방법
US7427562B2 (en) 2006-11-08 2008-09-23 Motorla, Inc. Method for fabricating closed vias in a printed circuit board
US20080136002A1 (en) 2006-12-07 2008-06-12 Advanced Chip Engineering Technology Inc. Multi-chips package and method of forming the same
US7915737B2 (en) 2006-12-15 2011-03-29 Sanyo Electric Co., Ltd. Packing board for electronic device, packing board manufacturing method, semiconductor module, semiconductor module manufacturing method, and mobile device
TWI330401B (en) 2006-12-25 2010-09-11 Unimicron Technology Corp Circuit board structure having embedded semiconductor component and fabrication method thereof
KR101030769B1 (ko) 2007-01-23 2011-04-27 삼성전자주식회사 스택 패키지 및 스택 패키징 방법
US20080173792A1 (en) 2007-01-23 2008-07-24 Advanced Chip Engineering Technology Inc. Image sensor module and the method of the same
CN100561696C (zh) 2007-03-01 2009-11-18 全懋精密科技股份有限公司 嵌埋半导体芯片的结构及其制法
US7757196B2 (en) 2007-04-04 2010-07-13 Cisco Technology, Inc. Optimizing application specific integrated circuit pinouts for high density interconnect printed circuit boards
JP2008277339A (ja) 2007-04-25 2008-11-13 Tdk Corp 電子部品およびその製造方法
US8710402B2 (en) 2007-06-01 2014-04-29 Electro Scientific Industries, Inc. Method of and apparatus for laser drilling holes with improved taper
US8143719B2 (en) 2007-06-07 2012-03-27 United Test And Assembly Center Ltd. Vented die and package
US8314343B2 (en) 2007-09-05 2012-11-20 Taiyo Yuden Co., Ltd. Multi-layer board incorporating electronic component and method for producing the same
WO2009050207A1 (en) 2007-10-15 2009-04-23 Interuniversitair Microelectronica Centrum Vzw Method for producing electrical interconnects and devices made thereof
US8476769B2 (en) 2007-10-17 2013-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Through-silicon vias and methods for forming the same
US7884015B2 (en) 2007-12-06 2011-02-08 Micron Technology, Inc. Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods
US7843064B2 (en) 2007-12-21 2010-11-30 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and process for the formation of TSVs
JP5280079B2 (ja) 2008-03-25 2013-09-04 新光電気工業株式会社 配線基板の製造方法
US8017451B2 (en) 2008-04-04 2011-09-13 The Charles Stark Draper Laboratory, Inc. Electronic modules and methods for forming the same
KR20090116168A (ko) 2008-05-06 2009-11-11 삼성전자주식회사 금속 배선 기판, 박막 트랜지스터 기판, 및 금속 배선의형성 방법
US7842542B2 (en) 2008-07-14 2010-11-30 Stats Chippac, Ltd. Embedded semiconductor die package and method of making the same using metal frame carrier
TWI573201B (zh) 2008-07-18 2017-03-01 聯測總部私人有限公司 封裝結構性元件
CN102149784B (zh) 2008-07-22 2014-03-05 圣戈班磨料磨具有限公司 包含聚集体的涂覆的磨料产品
US20100062287A1 (en) 2008-09-10 2010-03-11 Seagate Technology Llc Method of polishing amorphous/crystalline glass to achieve a low rq & wq
US7749900B2 (en) * 2008-09-30 2010-07-06 Intel Corporation Method and core materials for semiconductor packaging
CN102245339B (zh) 2008-10-10 2015-08-26 Ipg微***有限公司 具有多重细激光束传输***的激光加工***和方法
JP5246103B2 (ja) 2008-10-16 2013-07-24 大日本印刷株式会社 貫通電極基板の製造方法
US7982305B1 (en) 2008-10-20 2011-07-19 Maxim Integrated Products, Inc. Integrated circuit package including a three-dimensional fan-out / fan-in signal routing
JP2010109151A (ja) * 2008-10-30 2010-05-13 Takashi Yunogami 使用済み半導体ウエハの再生方法
JP2010152345A (ja) 2008-11-25 2010-07-08 Asahi Kasei E-Materials Corp 感光性樹脂組成物、及びその用途
JP5111342B2 (ja) 2008-12-01 2013-01-09 日本特殊陶業株式会社 配線基板
US8354304B2 (en) 2008-12-05 2013-01-15 Stats Chippac, Ltd. Semiconductor device and method of forming conductive posts embedded in photosensitive encapsulant
US8592992B2 (en) 2011-12-14 2013-11-26 Stats Chippac, Ltd. Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSP
KR20100067966A (ko) 2008-12-12 2010-06-22 주식회사 동부하이텍 반도체 소자 및 그 제조 방법
US9064936B2 (en) 2008-12-12 2015-06-23 Stats Chippac, Ltd. Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
US8729426B2 (en) 2008-12-13 2014-05-20 M-Solv Ltd. Method and apparatus for laser machining relatively narrow and relatively wide structures
US7932608B2 (en) 2009-02-24 2011-04-26 Taiwan Semiconductor Manufacturing Company, Ltd. Through-silicon via formed with a post passivation interconnect structure
KR20100096879A (ko) * 2009-02-25 2010-09-02 삼성전자주식회사 구리 패드를 포함하는 반도체 소자, 그 적층 구조 및 그 제조 방법
KR101065744B1 (ko) * 2009-02-27 2011-09-19 주식회사 티지솔라 요철구조가 형성된 기판을 이용한 태양전지의 제조방법
US8609512B2 (en) 2009-03-27 2013-12-17 Electro Scientific Industries, Inc. Method for laser singulation of chip scale packages on glass substrates
US7955942B2 (en) 2009-05-18 2011-06-07 Stats Chippac, Ltd. Semiconductor device and method of forming a 3D inductor from prefabricated pillar frame
CN101898405A (zh) 2009-05-27 2010-12-01 鸿富锦精密工业（深圳）有限公司 模具流道组合
TWI594828B (zh) 2009-05-28 2017-08-11 伊雷克托科學工業股份有限公司 應用於雷射處理工件中的特徵的聲光偏轉器及相關雷射處理方法
US20100307798A1 (en) 2009-06-03 2010-12-09 Izadian Jamal S Unified scalable high speed interconnects technologies
JP5534246B2 (ja) 2009-07-29 2014-06-25 日産化学工業株式会社 ナノインプリント用レジスト下層膜形成組成物
US8383457B2 (en) 2010-09-03 2013-02-26 Stats Chippac, Ltd. Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
TWI418272B (zh) 2009-08-25 2013-12-01 Samsung Electro Mech 處理核心基板之空腔的方法
TW201110285A (en) 2009-09-08 2011-03-16 Unimicron Technology Corp Package structure having embedded semiconductor element and method of forming the same
US8252665B2 (en) * 2009-09-14 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Protection layer for adhesive material at wafer edge
JP2011086654A (ja) * 2009-10-13 2011-04-28 Seiko Epson Corp 基板の加工方法及び基板
US8728341B2 (en) 2009-10-22 2014-05-20 Hitachi Chemical Company, Ltd. Polishing agent, concentrated one-pack type polishing agent, two-pack type polishing agent and method for polishing substrate
US8772087B2 (en) 2009-10-22 2014-07-08 Infineon Technologies Ag Method and apparatus for semiconductor device fabrication using a reconstituted wafer
CN102230991B (zh) 2009-10-23 2013-01-09 鸿富锦精密工业（深圳）有限公司 光纤耦合连接器
JP5700241B2 (ja) 2009-11-09 2015-04-15 日立化成株式会社 多層配線基板及びその製造方法
KR20120102680A (ko) 2009-11-11 2012-09-18 암프리우스, 인코포레이티드 전극용 중간 층 제조하기
EP2339627A1 (en) 2009-12-24 2011-06-29 Imec Window interposed die packaging
US9196509B2 (en) 2010-02-16 2015-11-24 Deca Technologies Inc Semiconductor device and method of adaptive patterning for panelized packaging
US8822281B2 (en) 2010-02-23 2014-09-02 Stats Chippac, Ltd. Semiconductor device and method of forming TMV and TSV in WLCSP using same carrier
CN102947931A (zh) 2010-03-03 2013-02-27 佐治亚技术研究公司 无机中介片上的贯通封装过孔（tpv）结构及其加工方法
WO2011130300A1 (en) 2010-04-12 2011-10-20 Ikonics Corporation Photoresist film and methods for abrasive etching and cutting
US8970006B2 (en) 2010-06-15 2015-03-03 Stmicroelectronics S.R.L. Vertical conductive connections in semiconductor substrates
US8426961B2 (en) 2010-06-25 2013-04-23 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded 3D interposer structure
US8741777B2 (en) * 2010-07-26 2014-06-03 Hamamatsu Photonics K.K. Substrate processing method
US20130105329A1 (en) 2010-08-02 2013-05-02 Atotech Deutschland Gmbh Method to form solder deposits and non-melting bump structures on substrates
JP2012069926A (ja) 2010-08-21 2012-04-05 Ibiden Co Ltd プリント配線板及びプリント配線板の製造方法
US8518746B2 (en) 2010-09-02 2013-08-27 Stats Chippac, Ltd. Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die
TWI434387B (zh) 2010-10-11 2014-04-11 Advanced Semiconductor Eng 具有穿導孔之半導體裝置及具有穿導孔之半導體裝置之封裝結構及其製造方法
KR101187913B1 (ko) * 2010-11-24 2012-10-05 삼성테크윈 주식회사 반도체 패키지용 리이드 프레임과, 이를 제조하는 방법
TWI418269B (zh) 2010-12-14 2013-12-01 Unimicron Technology Corp 嵌埋穿孔中介層之封裝基板及其製法
US8617990B2 (en) 2010-12-20 2013-12-31 Intel Corporation Reduced PTH pad for enabling core routing and substrate layer count reduction
US8329575B2 (en) * 2010-12-22 2012-12-11 Applied Materials, Inc. Fabrication of through-silicon vias on silicon wafers
US9704793B2 (en) * 2011-01-04 2017-07-11 Napra Co., Ltd. Substrate for electronic device and electronic device
JP5693977B2 (ja) 2011-01-11 2015-04-01 新光電気工業株式会社 配線基板及びその製造方法
US8536695B2 (en) 2011-03-08 2013-09-17 Georgia Tech Research Corporation Chip-last embedded interconnect structures
JP2012195514A (ja) 2011-03-17 2012-10-11 Seiko Epson Corp 素子付き基板、赤外線センサー、および貫通電極形成方法
US20120261805A1 (en) 2011-04-14 2012-10-18 Georgia Tech Research Corporation Through package via structures in panel-based silicon substrates and methods of making the same
US8912077B2 (en) 2011-06-15 2014-12-16 Applied Materials, Inc. Hybrid laser and plasma etch wafer dicing using substrate carrier
WO2013008415A1 (ja) 2011-07-08 2013-01-17 パナソニック株式会社 配線基板および立体配線基板の製造方法
TWI492680B (zh) 2011-08-05 2015-07-11 Unimicron Technology Corp 嵌埋有中介層之封裝基板及其製法
JP2013074178A (ja) 2011-09-28 2013-04-22 Ngk Spark Plug Co Ltd 部品内蔵配線基板の製造方法
US9224674B2 (en) 2011-12-15 2015-12-29 Intel Corporation Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (BBUL) packages
KR20130083721A (ko) * 2012-01-13 2013-07-23 삼성전자주식회사 레이저 어블레이션을 이용한 관통 실리콘 비아 형성방법
US8772058B2 (en) 2012-02-02 2014-07-08 Harris Corporation Method for making a redistributed wafer using transferrable redistribution layers
EP2817819A4 (en) 2012-02-26 2015-09-02 Solexel Inc SYSTEMS AND METHOD FOR LASER DISTRIBUTION AND DEVICE LAYER TRANSMISSION
JP2013207006A (ja) 2012-03-28 2013-10-07 Toppan Printing Co Ltd 貫通電極付き配線基板及びその製造方法
US8698293B2 (en) 2012-05-25 2014-04-15 Infineon Technologies Ag Multi-chip package and method of manufacturing thereof
JP5981232B2 (ja) 2012-06-06 2016-08-31 新光電気工業株式会社 半導体パッケージ、半導体装置及び半導体パッケージの製造方法
JP6029342B2 (ja) 2012-06-15 2016-11-24 新光電気工業株式会社 配線基板及びその製造方法
DE102012210472A1 (de) 2012-06-21 2013-12-24 Robert Bosch Gmbh Verfahren zum Herstellen eines Bauelements mit einer elektrischen Durchkontaktierung
EP2690383A1 (en) 2012-07-27 2014-01-29 Embl Heidelberg Cooling of a dewar vessel with ice free coolant and for short sample access
CN103635017B (zh) 2012-08-24 2016-12-28 碁鼎科技秦皇岛有限公司 电路板及其制作方法
US8890628B2 (en) 2012-08-31 2014-11-18 Intel Corporation Ultra slim RF package for ultrabooks and smart phones
US9385102B2 (en) 2012-09-28 2016-07-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale package
RU2015114097A (ru) 2012-09-28 2016-11-20 Сен-Гобен Серэмикс Энд Пластикс, Инк. Модифицированный процесс микрошлифования
CN102890591B (zh) 2012-09-28 2016-03-09 北京京东方光电科技有限公司 一种触摸屏、触控显示装置及触摸屏的制造方法
US9029238B2 (en) * 2012-10-11 2015-05-12 International Business Machines Corporation Advanced handler wafer bonding and debonding
KR101301507B1 (ko) 2012-11-26 2013-09-04 (주)씨엠코리아 반도체 제조장치용 히터 제조방법 및 그에 따라 제조된 히터
KR102072846B1 (ko) 2012-12-18 2020-02-03 에스케이하이닉스 주식회사 임베디드 패키지 및 제조 방법
KR20140083657A (ko) 2012-12-26 2014-07-04 하나 마이크론(주) 인터포저가 임베디드 되는 전자 모듈 및 그 제조방법
KR101441632B1 (ko) 2012-12-28 2014-09-23 (재)한국나노기술원 글라스 기반 프로브 카드용 스페이스 트랜스포머의 제조방법 및 이에 의해 제조된 글라스 기반 프로브 카드용 스페이스 트랜스포머
WO2014106925A1 (ja) 2013-01-07 2014-07-10 株式会社アライドマテリアル セラミック配線基板、半導体装置、およびセラミック配線基板の製造方法
US9378982B2 (en) 2013-01-31 2016-06-28 Taiwan Semiconductor Manufacturing Company, Ltd. Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package
US9704809B2 (en) 2013-03-05 2017-07-11 Maxim Integrated Products, Inc. Fan-out and heterogeneous packaging of electronic components
US8877554B2 (en) 2013-03-15 2014-11-04 Taiwan Semiconductor Manufacturing Company, Ltd. Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices
JP5874675B2 (ja) 2013-04-08 2016-03-02 信越化学工業株式会社 テクスチャ形成方法及び太陽電池の製造方法
US20160122696A1 (en) 2013-05-17 2016-05-05 Advanced Technology Materials, Inc. Compositions and methods for removing ceria particles from a surface
KR101494413B1 (ko) 2013-05-29 2015-02-17 주식회사 네패스 지지프레임 및 이를 이용한 반도체패키지 제조방법
US20140353019A1 (en) 2013-05-30 2014-12-04 Deepak ARORA Formation of dielectric with smooth surface
JP6214930B2 (ja) 2013-05-31 2017-10-18 スナップトラック・インコーポレーテッド 多層配線基板
US9685414B2 (en) 2013-06-26 2017-06-20 Intel Corporation Package assembly for embedded die and associated techniques and configurations
US8980691B2 (en) 2013-06-28 2015-03-17 Stats Chippac, Ltd. Semiconductor device and method of forming low profile 3D fan-out package
KR102101377B1 (ko) 2013-06-29 2020-04-16 인텔 코포레이션 비아들과 조합되는 미세 피치 후면측 금속 재분포 라인들을 포함하는 상호접속 구조
US8952544B2 (en) 2013-07-03 2015-02-10 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
US10446335B2 (en) 2013-08-08 2019-10-15 Zhuhai Access Semiconductor Co., Ltd. Polymer frame for a chip, such that the frame comprises at least one via in series with a capacitor
JP6286169B2 (ja) 2013-09-26 2018-02-28 新光電気工業株式会社 配線基板及びその製造方法
US9209151B2 (en) 2013-09-26 2015-12-08 General Electric Company Embedded semiconductor device package and method of manufacturing thereof
US9530752B2 (en) 2013-11-11 2016-12-27 Infineon Technologies Ag Method for forming electronic components
WO2015072775A1 (ko) 2013-11-14 2015-05-21 주식회사 아모그린텍 연성인쇄회로기판과 그 제조 방법
US9159678B2 (en) 2013-11-18 2015-10-13 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
US10014292B2 (en) 2015-03-09 2018-07-03 Monolithic 3D Inc. 3D semiconductor device and structure
US10297586B2 (en) 2015-03-09 2019-05-21 Monolithic 3D Inc. Methods for processing a 3D semiconductor device
US9355881B2 (en) 2014-02-18 2016-05-31 Infineon Technologies Ag Semiconductor device including a dielectric material
WO2015126438A1 (en) 2014-02-20 2015-08-27 Applied Materials, Inc. Laser ablation platform for solar cells
US9735134B2 (en) 2014-03-12 2017-08-15 Taiwan Semiconductor Manufacturing Company, Ltd. Packages with through-vias having tapered ends
WO2015137936A1 (en) 2014-03-12 2015-09-17 Intel Corporation Microelectronic package having a passive microelectronic device disposed within a package body
US9499397B2 (en) 2014-03-31 2016-11-22 Freescale Semiconductor, Inc. Microelectronic packages having axially-partitioned hermetic cavities and methods for the fabrication thereof
US9326373B2 (en) 2014-04-09 2016-04-26 Finisar Corporation Aluminum nitride substrate
US10074631B2 (en) 2014-04-14 2018-09-11 Taiwan Semiconductor Manufacturing Company Packages and packaging methods for semiconductor devices, and packaged semiconductor devices
US9589786B2 (en) 2014-04-28 2017-03-07 National Center For Advanced Packaging Co., Ltd Method for polishing a polymer surface
EP3140859B1 (en) 2014-05-06 2022-11-02 Intel Corporation Multi-layer package with integrated antenna
US8980727B1 (en) * 2014-05-07 2015-03-17 Applied Materials, Inc. Substrate patterning using hybrid laser scribing and plasma etching processing schemes
US10256180B2 (en) 2014-06-24 2019-04-09 Ibis Innotech Inc. Package structure and manufacturing method of package structure
US9396999B2 (en) 2014-07-01 2016-07-19 Freescale Semiconductor, Inc. Wafer level packaging method
JP6394136B2 (ja) 2014-07-14 2018-09-26 凸版印刷株式会社 パッケージ基板およびその製造方法
CN105336670B (zh) 2014-07-14 2018-07-10 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
JP6324876B2 (ja) 2014-07-16 2018-05-16 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
KR20160013706A (ko) 2014-07-28 2016-02-05 삼성전기주식회사 인쇄회로기판 및 인쇄회로기판의 제조 방법
DE202014103794U1 (de) * 2014-08-14 2014-10-29 Intel Corporation Herstellung eines Substrates mit einer eingebetteten Chiplage unter Verwendung von Projektionsstrukturierung und damit verbundenen Paket-Konfigurationen
CN105436718A (zh) 2014-08-26 2016-03-30 安捷利电子科技（苏州）有限公司 一种uv激光钻孔制备具有可控锥度盲孔的方法
JP2016533651A (ja) 2014-09-18 2016-10-27 インテル コーポレイション ＷＬＣＳＰコンポーネントをｅ−ＷＬＢ及びｅ−ＰＬＢ内に埋設する方法
KR102268386B1 (ko) 2014-09-30 2021-06-23 삼성전기주식회사 회로기판
KR20160048277A (ko) 2014-10-23 2016-05-04 에스케이하이닉스 주식회사 칩 내장 패키지 및 그 제조방법
JP6428164B2 (ja) 2014-10-31 2018-11-28 日立化成株式会社 半導体装置及びその製造方法
US9554469B2 (en) 2014-12-05 2017-01-24 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. Method of fabricating a polymer frame with a rectangular array of cavities
US9318376B1 (en) 2014-12-15 2016-04-19 Freescale Semiconductor, Inc. Through substrate via with diffused conductive component
US10269722B2 (en) 2014-12-15 2019-04-23 Bridge Semiconductor Corp. Wiring board having component integrated with leadframe and method of making the same
WO2016099523A1 (en) 2014-12-19 2016-06-23 Intel IP Corporation Stacked semiconductor device package with improved interconnect bandwidth
US9754849B2 (en) 2014-12-23 2017-09-05 Intel Corporation Organic-inorganic hybrid structure for integrated circuit packages
US20160329299A1 (en) 2015-05-05 2016-11-10 Mediatek Inc. Fan-out package structure including antenna
US9842789B2 (en) 2015-05-11 2017-12-12 Samsung Electro-Mechanics Co., Ltd. Electronic component package and method of manufacturing the same
US10109588B2 (en) 2015-05-15 2018-10-23 Samsung Electro-Mechanics Co., Ltd. Electronic component package and package-on-package structure including the same
DE102015108071B4 (de) * 2015-05-21 2023-06-15 Pictiva Displays International Limited Optoelektronisches Bauelement und Verfahren zur Herstellung eines optoelektronischen Bauelements
US9837484B2 (en) 2015-05-27 2017-12-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming substrate including embedded component with symmetrical structure
US9978720B2 (en) 2015-07-06 2018-05-22 Infineon Technologies Ag Insulated die
US20190189561A1 (en) 2015-07-15 2019-06-20 Chip Solutions, LLC Semiconductor device and method with multiple redistribution layer and fine line capability
US10636753B2 (en) 2015-07-29 2020-04-28 STATS ChipPAC Pte. Ltd. Antenna in embedded wafer-level ball-grid array package
CN105023900A (zh) 2015-08-11 2015-11-04 华天科技（昆山）电子有限公司 埋入硅基板扇出型封装结构及其制造方法
US9601461B2 (en) 2015-08-12 2017-03-21 Semtech Corporation Semiconductor device and method of forming inverted pyramid cavity semiconductor package
JP6542616B2 (ja) 2015-08-27 2019-07-10 古河電気工業株式会社 部品内蔵配線基板の製造方法、部品内蔵配線基板および電子部品固定用テープ
JP2017050315A (ja) 2015-08-31 2017-03-09 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
US9761571B2 (en) 2015-09-17 2017-09-12 Deca Technologies Inc. Thermally enhanced fully molded fan-out module
WO2017052633A1 (en) 2015-09-25 2017-03-30 Vivek Raghunathan Thin electronic package elements using laser spallation
US9837352B2 (en) 2015-10-07 2017-12-05 Advanced Semiconductor Engineering, Inc. Semiconductor device and method for manufacturing the same
WO2017074390A1 (en) 2015-10-29 2017-05-04 Intel Corporation Alternative surfaces for conductive pad layers of silicon bridges for semiconductor packages
TW201717343A (zh) 2015-11-04 2017-05-16 華亞科技股份有限公司 封裝上封裝構件及其製作方法
US10570257B2 (en) 2015-11-16 2020-02-25 Applied Materials, Inc. Copolymerized high temperature bonding component
JP6626697B2 (ja) 2015-11-24 2019-12-25 京セラ株式会社 配線基板およびその製造方法
US10051742B2 (en) 2015-12-10 2018-08-14 Industrial Technology Research Institute Power module and manufacturing method thereof
US9660037B1 (en) * 2015-12-15 2017-05-23 Infineon Technologies Austria Ag Semiconductor wafer and method
US10950550B2 (en) 2015-12-22 2021-03-16 Intel Corporation Semiconductor package with through bridge die connections
CN105575913B (zh) 2016-02-23 2019-02-01 华天科技（昆山）电子有限公司 埋入硅基板扇出型3d封装结构
JP6618843B2 (ja) * 2016-03-24 2019-12-11 Hoya株式会社 フォトマスク用基板のリサイクル方法、フォトマスク用基板の製造方法、フォトマスクブランクの製造方法、フォトマスクの製造方法、及びパターン転写方法
US9875970B2 (en) 2016-04-25 2018-01-23 Samsung Electro-Mechanics Co., Ltd. Fan-out semiconductor package
US10553515B2 (en) 2016-04-28 2020-02-04 Intel Corporation Integrated circuit structures with extended conductive pathways
US9859258B2 (en) 2016-05-17 2018-01-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacture
US10615191B2 (en) 2016-05-20 2020-04-07 Ares Materials Inc. Polymer substrate for flexible electronics microfabrication and methods of use
US10043740B2 (en) 2016-07-12 2018-08-07 Intel Coporation Package with passivated interconnects
DE112016007062B4 (de) 2016-07-14 2022-01-05 Intel Corporation Halbleitergehäuse mit eingebettetem optischem Die, sowie Verfahren und elekronisches Bauelement
US9748167B1 (en) 2016-07-25 2017-08-29 United Microelectronics Corp. Silicon interposer, semiconductor package using the same, and fabrication method thereof
US10269771B2 (en) 2016-08-31 2019-04-23 Advanced Semiconductor Engineering, Inc. Semiconductor device package and a method of manufacturing the same
KR102566996B1 (ko) 2016-09-09 2023-08-14 삼성전자주식회사 FOWLP 형태의 반도체 패키지 및 이를 가지는 PoP 형태의 반도체 패키지
US9887167B1 (en) 2016-09-19 2018-02-06 Advanced Semiconductor Engineering, Inc. Embedded component package structure and method of manufacturing the same
KR102012443B1 (ko) 2016-09-21 2019-08-20 삼성전자주식회사 팬-아웃 반도체 패키지
JP2018073890A (ja) 2016-10-25 2018-05-10 イビデン株式会社 プリント配線板およびプリント配線板の製造方法
CN106531647B (zh) 2016-12-29 2019-08-09 华进半导体封装先导技术研发中心有限公司 一种扇出型芯片的封装结构及其封装方法
CN110024111B (zh) 2016-12-30 2024-03-19 英特尔公司 带有具有用于扇出缩放的柱和过孔连接的高密度互连层的封装衬底
KR102561987B1 (ko) 2017-01-11 2023-07-31 삼성전기주식회사 반도체 패키지와 그 제조 방법
KR102019353B1 (ko) 2017-04-07 2019-09-09 삼성전자주식회사 팬-아웃 센서 패키지 및 이를 포함하는 광학방식 지문센서 모듈
JP6827663B2 (ja) 2017-04-24 2021-02-10 株式会社荏原製作所 基板の研磨装置
JP6909430B2 (ja) 2017-05-12 2021-07-28 大日本印刷株式会社 貫通電極基板、貫通電極基板を備える実装基板並びに貫通電極基板の製造方法
US11158540B2 (en) 2017-05-26 2021-10-26 Applied Materials, Inc. Light-absorbing mask for hybrid laser scribing and plasma etch wafer singulation process
TWI645519B (zh) 2017-06-02 2018-12-21 旭德科技股份有限公司 元件內埋式封裝載板及其製作方法
US10304765B2 (en) 2017-06-08 2019-05-28 Advanced Semiconductor Engineering, Inc. Semiconductor device package
US10163803B1 (en) 2017-06-20 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated fan-out packages and methods of forming the same
US10211072B2 (en) 2017-06-23 2019-02-19 Applied Materials, Inc. Method of reconstituted substrate formation for advanced packaging applications
JP6885800B2 (ja) 2017-06-26 2021-06-16 京セラ株式会社 配線基板およびその製造方法
US20190006331A1 (en) * 2017-06-30 2019-01-03 Intel Corporation Electronics package devices with through-substrate-vias having pitches independent of substrate thickness
TW201909245A (zh) 2017-07-24 2019-03-01 美商康寧公司 精密結構玻璃物件、積體電路封裝、光學元件、微流體元件及其製造方法
JP2019040937A (ja) * 2017-08-23 2019-03-14 住友電気工業株式会社 受発光デバイスの製造方法
US10410971B2 (en) 2017-08-29 2019-09-10 Qualcomm Incorporated Thermal and electromagnetic interference shielding for die embedded in package substrate
US10515912B2 (en) 2017-09-24 2019-12-24 Intel Corporation Integrated circuit packages
US10269773B1 (en) 2017-09-29 2019-04-23 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor packages and methods of forming the same
WO2019066988A1 (en) 2017-09-30 2019-04-04 Intel Corporation INTEGRATED PCB / HOUSING STACK FOR DOUBLE-SIDED INTERCONNECTION
KR101892869B1 (ko) 2017-10-20 2018-08-28 삼성전기주식회사 팬-아웃 반도체 패키지
KR101922884B1 (ko) 2017-10-26 2018-11-28 삼성전기 주식회사 팬-아웃 반도체 패키지
US10515827B2 (en) 2017-10-31 2019-12-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming chip package with recessed interposer substrate
KR101963292B1 (ko) * 2017-10-31 2019-03-28 삼성전기주식회사 팬-아웃 반도체 패키지
US10163798B1 (en) * 2017-12-22 2018-12-25 Intel Corporation Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same
CN111201711A (zh) * 2017-12-28 2020-05-26 英特尔公司 单个封装中的包括混合滤波器和有源电路的rf前端模块
US10468339B2 (en) 2018-01-19 2019-11-05 Taiwan Semiconductor Manufacturing Company, Ltd. Heterogeneous fan-out structure and method of manufacture
US10388631B1 (en) 2018-01-29 2019-08-20 Globalfoundries Inc. 3D IC package with RDL interposer and related method
TWI791769B (zh) 2018-02-27 2023-02-11 日商迪愛生股份有限公司 電子零件封裝及其製造方法
CN111868920A (zh) 2018-03-15 2020-10-30 应用材料公司 用于半导体器件封装制造工艺的平坦化
US10948818B2 (en) 2018-03-19 2021-03-16 Applied Materials, Inc. Methods and apparatus for creating a large area imprint without a seam
US11178772B2 (en) 2018-03-29 2021-11-16 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier connected with a separate tilted component carrier for short electric connection
JP6997670B2 (ja) * 2018-04-23 2022-01-17 新光電気工業株式会社 配線基板及びその製造方法
US11063007B2 (en) 2018-05-21 2021-07-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacture
US10955606B2 (en) 2018-05-30 2021-03-23 Applied Materials, Inc. Method of imprinting tilt angle light gratings
US10424530B1 (en) 2018-06-21 2019-09-24 Intel Corporation Electrical interconnections with improved compliance due to stress relaxation and method of making
US10705268B2 (en) 2018-06-29 2020-07-07 Applied Materials, Inc. Gap fill of imprinted structure with spin coated high refractive index material for optical components
CN111293210B (zh) * 2018-12-07 2024-01-23 茂丞(郑州)超声科技有限公司 晶圆级超声波芯片模块及其制造方法
IT201900006740A1 (it) * 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di strutturazione di substrati
IT201900006736A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di fabbricazione di package

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