CN107924929B - 固体摄像器件、电子设备以及固体摄像器件的制造方法 - Google Patents

固体摄像器件、电子设备以及固体摄像器件的制造方法 Download PDF

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CN107924929B
CN107924929B CN201680045598.3A CN201680045598A CN107924929B CN 107924929 B CN107924929 B CN 107924929B CN 201680045598 A CN201680045598 A CN 201680045598A CN 107924929 B CN107924929 B CN 107924929B
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film
imaging device
state imaging
solid
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CN107924929A (zh
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井上晋
寄门雄飞
户田淳
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Sony Semiconductor Solutions Corp
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Abstract

本技术涉及：能够防止雪崩光电二极管的光接收灵敏度降低的固体摄像器件；电子设备；以及固体摄像器件的制造方法。这个固体摄像器件设置有：雪崩光电二极管，所述雪崩光电二极管包括第一导电类型的第一区域、第二导电类型的第二区域和雪崩区域，所述第二导电类型与所述第一导电类型不同，所述雪崩区域夹在所述第一区域与所述第二区域之间，且所述第一区域、所述第二区域和所述雪崩区域沿半导体基板的厚度方向延伸；以及膜，所述膜被形成在所述半导体基板的至少一侧上，且所述膜包括金属氧化物膜、金属氮化物膜、或金属氧化物膜和金属氮化物膜的混合晶体系膜。例如，本技术可以被应用到CMOS图像传感器。

Description

固体摄像器件、电子设备以及固体摄像器件的制造方法
技术领域
本技术涉及固体摄像器件、电子设备以及固体摄像器件的制造方法， 并且特别地，涉及使用雪崩倍增的固体摄像器件、电子设备以及固体摄 像器件的制造方法。
背景技术
近年来，为了实现更小更精细的固体摄像器件，已经减小了像素的 尺寸。然而，当图像尺寸减小时，不仅作为光接收器件的光电二极管的 光接收面积会减小，而且用于光电转换的区域的体积也会减小，从而使 光接收效率降低。
另一方面，即使在诸如拍摄黑暗的场所或检测到少量的照射等入射 光较少的状态下，为了拍摄出具有高图像质量的图像，也期望固体摄像 器件具有较高的灵敏度。
与此相反，为了同时实现小型化和高灵敏度，已经提出了一种采用 使用雪崩倍增的雪崩光电二极管的固体摄像器件(例如，参照专利文献 1)。
引用文献列表
专利文献
专利文献1：日本专利申请特开第2010-157665号
发明内容
本发明要解决的技术问题
顺便提及地，在以Geiger(盖革)模式驱动的雪崩光电二极管中， 施加接近二极管的下降电压(fall voltage)的偏置电压，从而对单光子具 有灵敏度。因此，二极管的下降电压是一个重要参数。
另一方面，电场强度的曲率在雪崩光电二极管中的pn结的端部处较 高，且下降电压降低。这是一种称为边界效应或边缘效应的现象。例如， 根据专利文献1中所述的发明，pn结的端部存在于半导体基板的表面上， 所述半导体基板上形成有雪崩光电二极管。因此，半导体基板的所述表 面上容易发生杂质向外扩散或堆积，且下降电压降低。
然后，例如，如果根据下降电压降低的区域施加偏置电压，则在其 他区域中仅施加比下降电压更低的电压。因此，雪崩光电二极管的光接 收灵敏度会降低。
与此相反，传统上已经提出了设置低浓度区域来减轻杂质浓度梯度 等。然而，如果低浓度区域形成在半导体基板的表面附近，则对短波长 入射光的光接收灵敏度会降低。
本技术是在这种情况下而被做出的，并且本技术旨在防止雪崩光电 二极管的光接收灵敏度降低。
解决问题的技术方案
根据本技术第一方面的固体摄像器件包括：雪崩光电二极管，其具 有第一导电类型的第一区域、第二导电类型的第二区域以及雪崩区域， 所述第二导电类型与所述第一导电类型不同，所述雪崩区域夹在所述第 一区域与所述第二区域之间，且所述第一区域、所述第二区域和所述雪 崩区域沿半导体基板的厚度方向延伸；以及膜，所述膜被形成在所述半 导体基板的至少一侧上，且所述膜包括金属氧化物膜、金属氮化物膜、 或金属氧化物膜和金属氮化物膜的混合晶体系膜(mix crystal-based film)。
还可以进一步设置形成在所述膜与所述半导体基板之间的绝缘膜。
所述膜可以包括铝、钽、锆、铪、钇或镧系元素的氧化物膜或氮化 物膜，或者所述膜可以包括铝、钽、锆、铪、钇或镧系元素的氧化物和 氮化物的混合晶体系膜。
所述膜可以具有固定电荷。
所述膜可以在所述第一区域附近与所述第二区域附近之间具有不同 的固定电荷。
在所述第一区域是矩形管形状的情况下，所述膜可以被形成为至少 覆盖所述第一区域的角部周围。
所述第一区域是圆筒形的，所述半导体基板的一侧上还可以设置有 电极，所述电极沿着所述第一区域的上面或底面形成，且所述电极具有 一个或多个不连续部，并且所述膜可以被形成为在所述半导体基板与所 述电极之间至少覆盖所述电极中的所述不连续部的周围。
两个以上的雪崩光电二极管结构可以在一个像素中重复形成。
根据本技术第二方面的固体摄像器件的制造方法包括：在半导体基 板的至少一侧上形成膜的步骤，所述膜包括金属氧化物膜、金属氮化物 膜、或金属氧化物膜和金属氮化物膜的混合晶体系膜，所述半导体基板 上形成有雪崩光电二极管，所述雪崩光电二极管具有第一导电类型的第 一区域、第二导电类型的第二区域以及雪崩区域，所述第二导电类型与 所述第一导电类型不同，所述雪崩区域夹在所述第一区域与所述第二区 域之间，且所述第一区域、所述第二区域和所述雪崩区域沿所述半导体 基板的厚度方向延伸。
根据本技术第三方面的电子设备包括固体摄像器件和信号处理单 元，所述信号处理单元用于对从所述固体摄像器件输出的信号进行处理， 其中，所述固体摄像器件包括雪崩光电二极管和膜，所述雪崩光电二极 管具有第一导电类型的第一区域、第二导电类型的第二区域以及雪崩区 域，所述第二导电类型与所述第一导电类型不同，所述雪崩区域夹在所 述第一区域与所述第二区域之间，且所述第一区域、所述第二区域和所 述雪崩区域沿半导体基板的厚度方向延伸，所述膜被形成在所述半导体 基板的至少一侧上，且所述膜包括金属氧化物膜、金属氮化物膜、或金 属氧化物膜和金属氮化物膜的混合晶体系膜。
根据本技术的第一方面或第三方面，包括金属氧化物膜、金属氮化 物膜、或金属氧化物膜和金属氮化物膜的混合晶体系膜且形成在半导体 基板的至少一侧上的膜使雪崩光电二极管中的下降电压的变化或暗电流 的发生能够被抑制。
根据本技术的第二方面，包括金属氧化物膜、金属氮化物膜、或金 属氧化物膜和金属氮化物膜的混合晶体系膜的膜被形成在半导体基板的 至少一侧上，所述半导体基板上形成有雪崩光电二极管，所述雪崩光电 二极管具有第一导电类型的第一区域、第二导电类型的第二区域以及雪 崩区域，所述第二导电类型与所述第一导电类型不同，所述雪崩区域夹 在所述第一区域与所述第二区域之间，且所述第一区域、所述第二区域 和所述雪崩区域沿所述半导体基板的厚度方向延伸。
本发明的技术效果
根据本技术的第一方面至第三方面，可以防止雪崩光电二极管的光 接收灵敏度降低。
此外，本说明书中所述的效果仅仅是示例性的，并且本技术的效果 不限于本说明书中所述的效果，并且可以获得额外的效果。
附图说明
图1是图示了应用本技术的CMOS(互补金属氧化物半导体)图像 传感器的示例性示意构造的框图。
图2是图示了CMOS图像传感器的第一实施例的截面图。
图3是图示了雪崩光电二极管的示例性平面图案的图。
图4是示意性地图示了在未设置固定电荷膜的情况下的雪崩光电二 极管中的电场分布的图。
图5是示意性地图示了在设置有固定电荷膜的情况下的雪崩光电二 极管中的电场分布的图。
图6是图示了CMOS图像传感器的第二实施例的截面图。
图7是图示了CMOS图像传感器的第三实施例的截面图。
图8是用于解释图7的CMOS图像传感器的固定电荷膜的制造方法 的图。
图9是用于解释图7的CMOS图像传感器的固定电荷膜的制造方法 的图。
图10是图示了雪崩光电二极管的平面图案的第一变形例的图。
图11是图示了针对图10的雪崩光电二极管来布置固定电荷膜的示 例性区域的图。
图12是图示了雪崩光电二极管的平面图案的第二变形例的图。
图13是图示了针对图12的雪崩光电二极管来布置固定电荷膜的示 例性区域的图。
图14是图示了固体摄像器件的示例性用途的图。
图15是图示了应用本技术的电子设备的示例性构造的框图。
具体实施方式
下面将说明用于实施本技术的方式(在下文中，将表示为实施例)。 此外，将按照以下顺序进行说明。
1.应用本技术的固体摄像器件
2.第一实施例
3.第二实施例(设置有绝缘膜的示例)
4.第三实施例(设置有具有不同的固定电荷的固定电荷膜的示例)
5.变形例
6.固体摄像器件的示例性用途
<1.应用本技术的固体摄像器件>
{基本的***构造}
图1是图示了应用本技术的固体摄像器件(例如，作为X-Y地址系 统中的一种固体摄像器件的CMOS图像传感器)的示意性构造的***构 造图。这里，CMOS图像传感器是通过应用CMOS工艺或使用CMOS工 艺的一部分而被创造的。
根据本申请的CMOS图像传感器10由像素阵列部11和***电路单 元构成，像素阵列部11被形成在半导体基板107(图2)上，***电路 单元被集成在与像素阵列部11相同的半导体基板107上。***电路单元 例如由垂直驱动单元12、列处理单元13、水平驱动单元14和***控制 单元15构成。
CMOS图像传感器10还包括信号处理单元18和数据存储单元19。 信号处理单元18和数据存储单元19可以被安装在与CMOS图像传感器 10相同的基板上，或者可以被布置在与CMOS图像传感器10不同的基 板上。而且，信号处理单元18和数据存储单元19的各处理可以由诸如 数字信号处理器(DSP：digital signal processor)电路或软件等设置在与CMOS图像传感器10不同的基板上的外部信号处理单元来执行。
像素阵列部11被配置成多个单位像素(在下文中，将简单地表示为 “像素”)沿行方向和列方向布置着。这里，行方向是像素行中的像素布 置的方向(或水平方向)，并且列方向是像素列中的像素布置的方向(或 垂直方向)。
单位像素具有光电转换单元(诸如光电二极管)和多个像素晶体管 (或MOS(金属氧化物半导体)晶体管)，光电转换单元用于生成并积 累与接收的光量对应的电荷。例如，多个像素晶体管可以由包括传输晶 体管、复位晶体管和放大晶体管在内的三种晶体管构成。可替代地，多 个像素晶体管可以由包括选择晶体管在内的四种晶体管构成。此外，各像素的等效电路与通常的等效电路类似，因此这里将省略详细说明。
而且，单位像素可以处于公共像素结构中。公共像素结构由多个光 电转换单元、多个传输晶体管、一个共用浮动扩散部以及其他共用像素 晶体管中的各者构成。
在像素阵列部11中，作为行信号线的像素驱动线16针对像素行而 分别被布置在行方向上，且作为列信号线的垂直信号线17针对像素列而 分别被布置在列方向上。当从像素读取信号时，像素驱动线16传输驱动 用的驱动信号。像素驱动线16在图1中被图示为一条配线，但不限于一 条。像素驱动线16的一端被连接到垂直驱动单元12的与各行对应的输出端子。
垂直驱动单元12由移位寄存器或地址解码器等构成，并且垂直驱动 单元12以行为单位等同时驱动像素阵列部11中的全部像素。即，垂直 驱动单元12与用于控制垂直驱动单元12的***控制单元15一起构成用 于控制像素阵列部11中的各像素的操作的驱动单元。虽然没有图示垂直 驱动单元12的具体构造，但是垂直驱动单元12通常具有读取扫描*** 和清除扫描***这两个扫描***。
读取扫描***以行为单位顺序地选择并扫描像素阵列部11中的单位 像素，以从单位像素读取信号。从单位像素读取的信号是模拟信号。清 除扫描***在比读取扫描提早曝光时间对读取行进行清除和扫描，读取 扫描***对该读取行执行读取扫描。
在清除扫描***的清除扫描中，从读取行中的单位像素的光电转换 单元中清除不必要的电荷，以使光电转换单元复位。然后，清除扫描系 统对不必要的电荷进行清除(或复位)，使得电子快门操作被执行。这里， 电子快门操作是丢弃光电转换单元中的电荷并重新开始曝光(开始积累 电荷)的操作。
在读取扫描***的读取操作中读取的信号对应于在前一读取操作或 电子快门操作之后所接收的光量。然后，从前一读取操作的读取时序或 电子快门操作的清除时序到当前读取操作的读取时序的周期是单位像素 中的电荷曝光周期。
从被垂直驱动单元12选择并扫描的像素行中的各单位像素输出的信 号经由每像素列的各条垂直信号线17而被输入到列处理单元13中。列 处理单元13对经由垂直信号线17而从选择行中的各像素输出的信号执 行预定的信号处理，且列处理单元13临时保持像素阵列部11中的每像 素列的信号处理后的像素信号。
具体地，列处理单元13至少执行诸如相关双采样(CDS：correlated doublesampling)处理或双重数据采样(DDS：double data sampling)处 理等去噪处理作为信号处理。例如，CDS处理可以消除复位噪声或诸如 像素中的放大晶体管的阈值变化等像素固有的固定模式噪声。例如，除 了去噪处理之外，列处理单元13还可以具有模数(AD：analog-digital) 转换功能，且列处理单元13能够将模拟像素信号转换成数字信号且能够 输出数字信号。
水平驱动单元14由移位寄存器或地址解码器等构成，且水平驱动单 元14依次选择列处理单元13中的与像素列对应的单位电路。利用水平 驱动单元14的选择和扫描，可以依次输出列处理单元13中的每单位电 路的信号处理后的像素信号。
***控制单元15由用于生成各种时序信号的时序发生器等构成，且 ***控制单元15基于由时序发生器生成的时序来控制垂直驱动单元12、 列处理单元13和水平驱动单元14等的驱动。
信号处理单元18至少具有算法处理功能，且对从列处理单元13输 出的像素信号执行诸如算法处理等各种类型的信号处理。数据存储单元 19临时存储信号处理单元18中的信号处理所需的数据。
<2.第一实施例>
在下文中，将参照图2至图4对作为图1的CMOS图像传感器10 的第一实施例的CMOS图像传感器10A进行说明。
{CMOS图像传感器10A的示例性构造}
图2是示意性地图示了CMOS图像传感器10A的示例性构造的截面 图。此外，图中图示了包括两个像素的部分的截面，但是其他像素基本 上具有相同的构造。
在CMOS图像传感器10A中，n型阱层101在p型半导体基板107 中被形成为每像素以岛状分离。n型阱层101中形成有构成像素的光电二 极管。
半导体基板107上层叠有固定电荷膜114、透射率/折射率调整层113、 钝化层112和透射率/折射率调整层111，并且半导体基板107上还形成 有与各像素对应的颜色的彩色滤光片109和110。
片上透镜108经由平坦化层118而被形成在彩色滤光片109和110 上。
另一方面，半导体基板107的下方层叠有固定电荷膜115和绝缘层 117，并且绝缘层117中形成有金属配线层116。各金属配线层116通过 绝缘层117绝缘。
在CMOS图像传感器10A中，设置有金属配线层116的绝缘层117 跨过其中形成有光电二极管的半导体基板107而被形成在与彩色滤光片 109和110以及片上透镜108相反的一侧上。即，CMOS图像传感器10A 是背面照射型固体摄像器件，其用于从与正面相反的背面将光照射在设 置有配线的半导体基板107上。
此外，在下文中，半导体基板107的背面也被称为上面，并且半导 体基板107的正面也被称为下面。
根据本实施例，特别地，均包括n+区域102/雪崩区域104/p+区域103 的多个雪崩光电二极管结构在一个像素中重复形成。具体地，n+区域102、 p+区域103和雪崩区域104被形成为在n型阱层101内沿半导体基板107 的厚度方向(在图2中，垂直地)延伸。然后，雪崩区域104夹在n+区 域102与p+区域103之间，从而构成雪崩光电二极管。
而且，如图2所示，n+区域102或p+区域103在均包括n+区域102/ 雪崩区域104/p+区域103的相邻结构之间是共用的。因此，在存在着三 个n+区域102和两个p+区域103的情况下，可以总共设置四个雪崩区域 104。
n+区域102经由配线等(未图示)而与形成在下绝缘层117中的电 极(阴极电极)105连接。p+区域103经由配线等(未图示)而与形成 在下绝缘层117中的电极(阳极电极)106连接。各电极105在图2的截 面的不同部分处连接，且各电极105被设定为相同的电位。电极106以 类似的方式连接和设定。
而且，构成雪崩光电二极管的n+区域102、p+区域103和雪崩区域 104的上面的高度几乎相同，并且所述上面被n型阱层101和半导体基板 107覆盖。
图3图示了沿着图2中的线A-A所截取的水平截面图。图3中的水 平方向对应于图2中的水平方向，并且垂直方向对应于与图2的纸张垂 直的方向。
构成雪崩光电二极管的n+区域102、p+区域103和雪崩区域104被 形成为在图2的截面和图3的截面中都彼此平行地延伸。
而且，提供给n+区域102和p+区域103的电压(电位差)与所形成 的电场之间的关系是由图2和图3中的雪崩区域104的宽度确定的。雪 崩区域104的宽度越小，所需电压就会越小。例如，雪崩区域104的宽 度被设定在0.05μm与1μm之间。
n型或p型杂质掺杂的硅可以用于半导体基板107。而且，还可以使 用Ge、GaAs、InP、GaP、InAs、GaSb和InSb以及包括三种元素或四种 元素且具有较宽带隙的半导体材料。
雪崩区域104由低浓度杂质(n型或p型)掺杂区域或非掺杂区域构 成。
例如，通过使用与各区域的图案对应的掩模而将n型杂质或p型杂 质离子注入到形成在各像素中的n型阱层101中，可以形成构成雪崩光 电二极管的n+区域102、p+区域103和雪崩区域104。
固定电荷膜114和115包括具有正固定电荷或负固定电荷的膜。例 如，固定电荷膜114和115由包括铝、钽、锆、铪、钇或镧系元素等的 氧化物的金属氧化物膜构成，或者由包括上述物质的氮化物的金属氮化 物膜构成。可替代地，固定电荷膜114和115还可以由上述物质的氧化 物和氮化物的混合晶体系膜构成。
如上所述，雪崩区域104被形成为沿半导体基板107的厚度方向延 伸，因此雪崩区域104的深度可以根据待检测的光的波长来设定。而且， 入射光被充分吸收，从而由于雪崩倍增而从光子产生许多载流子。
此外，多个雪崩光电二极管结构在一个像素中重复形成，因此n+区 域102与p+区域103之间的雪崩区域104的宽度可以减小到只采用一个 结构的情况下的一半以下。因此，引起雪崩倍增所需的施加电压可以减 小。因此，雪崩光电二极管也可以被应用到驱动电压相对低的CMOS图 像传感器。
而且，所需的施加电压减小，从而可以限制与相邻像素的串扰或限 制热量的产生。因此，不需要设置厚的绝缘隔离区域或Peltier(帕尔贴) 器件，从而可以实现CMOS图像传感器10A中的固体摄像器件的更精细 的像素。
另一方面，通过在相同的施加电压下进行比较，可以使雪崩区域104 上的电场比一个结构中的电场强，并且可以增加每个光子所产生的载流 子数量。因此，可以增强对低光量的响应。因此，可以在保持宽的动态 范围的同时实现对低光照水平的灵敏度的改善。
而且，构成雪崩光电二极管的n+区域102、p+区域103和雪崩区域 104的上面的高度几乎相同，因此整个雪崩区域104被施加几乎均匀的电 场。
此外，固定电荷膜114和115被设置用于防止雪崩光电二极管的下 降电压发生变化或产生暗电流。将参照图4和图5对这一点进行说明。
图4示意性地图示了在未设置固定电荷膜114和115的情况下的雪 崩光电二极管中的P+区域103周围的电场分布。图5示意性地图示了在 设置有固定电荷膜114和115的情况下的雪崩光电二极管中的P+区域 103周围的电场分布。此外，图4和图5中的p+区域103周围的虚线表 示等位线。而且，图4和图5中没有图示n型阱层101。
如在图4中的箭头所示的部分中，由于雪崩光电二极管的pn结端部 的形状或深度以及半导体基板107上的杂质的表面堆积或向外扩散/抽 吸，电场集中在半导体基板107的正面或背面附近。因此，雪崩光电二 极管的下降电压发生变化或在半导体基板107的正面或背面附近发生暗 电流噪声。
另一方面，如图5所示，固定电荷膜114和115被设置，使得可以 减轻半导体基板107的正面或背面上的电场集中。因此，由雪崩光电二 极管的边界效应和雪崩光电二极管的边缘效应等造成的影响受到限制。
因此，雪崩光电二极管的下降电压稳定且均匀地分布。即，雪崩光 电二极管的各位置(特别是在深度方向上的各位置)处的下降电压几乎 是恒定的。因此，可以防止雪崩光电二极管的光接收灵敏度降低。
而且，没有做出为了减轻杂质浓度梯度等而设置低浓度区域的对策， 因此，不会发生光接收灵敏度降低。
因此，可以实现对短波长到长波长的入射光具有高灵敏度的雪崩光 电二极管。
而且，由于固定电荷膜114和115的表面钉扎作用，可以防止在半 导体基板107的正面和背面附近产生暗电流。因此，可以获得无噪声图 像。
<3.第二实施例>
在下文中，将参照图6对作为图1的CMOS图像传感器10的第二 实施例的CMOS图像传感器10B进行说明。
{CMOS图像传感器10B的示例性构造}
图6是示意性地图示了CMOS图像传感器10B的示例性构造的截面 图。此外，相同的附图标记表示与图2中的部分对应的部分。
CMOS图像传感器10B与图2的CMOS图像传感器10A的不同之处 在于：增加了绝缘膜119和120。
绝缘膜119被形成在半导体基板107与固定电荷膜114之间。绝缘 膜120被形成在半导体基板107与固定电荷膜115之间。
绝缘膜119以这种方式被布置在半导体基板107与固定电荷膜114 之间，从而在固定电荷膜114导电的情况下可以防止雪崩光电二极管和 固定电荷膜114电气短路。类似地，绝缘膜120被布置在半导体基板107 与固定电荷膜115之间，从而在固定电荷膜115导电的情况下可以防止 雪崩光电二极管和固定电荷膜115电气短路。
<4.第三实施例>
在下文中，将参照图7至图9对作为图1的CMOS图像传感器10 的第三实施例的CMOS图像传感器10C进行说明。
{CMOS图像传感器10C的示例性构造}
图7是示意性地图示了CMOS图像传感器10C的示例性构造的截面 图。此外，相同的附图标记表示与图2中的部分对应的部分。
CMOS图像传感器10C与图2的CMOS图像传感器10A的不同之处 在于：形成固定电荷膜114a和114b来代替固定电荷膜114，且形成固定 电荷膜115a和115b来代替固定电荷膜115。
固定电荷膜114a和114b被形成在与图2的CMOS图像传感器10A 中的固定电荷膜114相同的层中。然而，固定电荷膜114a仅形成在n+ 区域102附近(上方)。固定电荷膜114b仅形成在p+区域103附近(上 方)。固定电荷膜114a和114b没有被形成在如下的像素间部分中：在该 像素间部分中，没有形成n+区域102和p+区域103。
固定电荷膜115a和115b被形成在与图2的CMOS图像传感器10A 中的固定电荷膜115相同的层中。然而，固定电荷膜115a仅形成在n+ 区域102附近(下方)。固定电荷膜115b仅形成在p+区域103附近(下 方)。固定电荷膜115a和115b没有被形成在如下的像素间部分中：在该 像素间部分中，没有形成n+区域102和p+区域103。
而且，固定电荷膜114a和固定电荷膜115a包括相同的材料，且具 有相同的固定电荷。固定电荷膜114b和固定电荷膜115b包括与固定电 荷膜114a和固定电荷膜115a不同的材料，且具有与固定电荷膜114a和 固定电荷膜115a不同的固定电荷。因此，固定电荷膜的固定电荷在n+ 区域102附近与p+区域103附近之间是不同的。
此外，例如，图2的固定电荷膜114和115的任何示例性材料可以 用于固定电荷膜114a、114b、115a和115b。
具有不同的固定电荷的固定电荷膜根据n+区域102和p+区域103的 布局而被适当地布置，因此，可以适当地减轻电场集中。
此外，如图7所示，固定电荷膜不一定需要被设置在不需要减轻电 场集中的像素间部分中。
此外，与图6的CMOS图像传感器10B类似，在CMOS图像传感器 10C中，可以在半导体基板107与固定电荷膜114a和114b之间以及半 导体基板107与固定电荷膜115a和115b之间设置绝缘膜。
{固定电荷膜114a和114b的制造方法}
在下文中，将参照图8和图9对CMOS图像传感器10C中的固定电 荷膜114a和114b的制造方法进行说明。
此外，图8和图9仅图示了用于解释固定电荷膜114a和114b的制 造方法所需的部分。而且，未图示n型阱层101。
首先，如图8中的A所示，在半导体基板107的上面上形成氧化硅 (SiO2)膜201。
其次，如图8中的B所示，对氧化硅膜201进行图案化。因此，在 p+区域103的上方，在氧化硅膜201中形成了开口201A。
其次，如图8中的C所示，在半导体基板107的上面和氧化硅膜201 的上面上形成固定电荷膜114b。此时，固定电荷膜114b被嵌入在氧化硅 膜201的开口201A中。
其次，如图8中的D所示，通过化学机械抛光(CMP：chemical mechanicalpolishing)对固定电荷膜114b进行抛光。因此，去除了除了 氧化硅膜201的开口201A以外的固定电荷膜114b。
其次，如图9中的E所示，对氧化硅膜201进行图案化。因此，在 n+区域102上方，在氧化硅膜201中形成了开口201B。
其次，如图9中的F所示，在半导体基板107的上面和氧化硅膜201 的上面上形成固定电荷膜114a。此时，固定电荷膜114a被嵌入在氧化硅 膜201的开口201B中。
其次，如图9中的G所示，通过CMP对固定电荷膜114a进行抛光。 因此，去除了除了氧化硅膜201中的开口201B以外的固定电荷膜114a。
固定电荷膜114a和114b是以这种方式形成的。
<5.变形例>
在下文中，将对本技术的上述实施例的变形例进行说明。
{雪崩光电二极管的平面图案的变形例}
首先，将参照图10至图13对构成雪崩光电二极管的n+区域102、 p+区域103和雪崩区域104的平面图案的变形例进行说明。
图10图示了沿着图2中的线A-A所截取的水平截面图的第一变形 例。与图3类似，图10中的水平方向对应于图2中的水平方向，并且垂 直方向对应于与图2的纸张垂直的方向。
在示例中，n+区域102包括n+区域102A和102B。雪崩区域104包 括雪崩区域104A和104B。
n+区域102A是具有圆形截面的柱状区域，并被布置在像素的中心 处。n+区域102B、p+区域103以及雪崩区域104A和104B是具有圆形 框架截面的圆筒形区域。然后，雪崩区域104A、p+区域103、雪崩区域 104B和n+区域102B从内部按此顺序布置着，使得各区域同心地围绕n+ 区域102A。
图11图示了沿着图2中的线B-B所截取的水平截面图。与图3和图 10类似，图11中的水平方向对应于图2中的水平方向，并且垂直方向对 应于与图2的纸张垂直的方向。
电极105包括电极105A、连接部105B和电极105C。电极106包括 电极106A和连接部106B。
电极105A的截面具有与图10中的n+区域102A大致类似的形状， 且电极105A经由配线等(未图示)而被连接到n+区域102A。电极105C 的截面为沿着图10中的n+区域102B的底部(圆形框架)的弧形区域， 且电极105C经由配线等(未图示)而被连接到n+区域102B。而且，电 极105C形成有不连续部105D，在连续部105D中，弧的一部分是不连 续的。
电极106A的截面为沿着图10中的p+区域103的底部(圆形框架) 的弧形区域，且电极106A经由配线等(未图示)而被连接到p+区域103。 而且，电极106A形成有不连续部106C，在不连续部106C中，弧的一 部分是不连续的。
电极105A和电极105C经由连接部105B连接，连接部105B具有通 过电极106A中的不连续部106C的直线形截面。电极106A经由连接部 106B而被连接到位于像素的周缘处的配线等(未图示)，连接部106B具 有通过电极105C中的不连续部105D的直线形截面。
在示例中，在与电极105C连接的n+区域102B的下端处，电极105C 中的不连续部105D附近容易出现电场。而且，在与电极106A连接的p+ 区域103的下端处，电极106A中的不连续部106C附近容易出现电场。
因此，例如，在半导体基板107与绝缘层117之间，固定电荷膜115 可以仅被布置在图11中以虚线围绕的区域301和区域302中。此外，区 域301至少覆盖不连续部106C的上方。区域302至少覆盖不连续部105D 的上方。
此外，例如，固定电荷膜115的固定电荷可以根据p+区域103与n+ 区域102B之间的极性差异而在区域301与区域302之间改变。
可替代地，例如，固定电荷膜115的材料可以在区域301、302与其 他区域之间改变。
图12图示了沿着图2中的线A-A所截取的水平截面图的第二变形 例。与图3类似，图12中的水平方向对应于图2中的水平方向，并且垂 直方向对应于与图2的纸张垂直的方向。
在示例中，n+区域102包括n+区域102A和102B。雪崩区域104包 括雪崩区域104A和104B。
n+区域102A是具有矩形截面的四棱柱形区域，并被布置在像素的 中心处。n+区域102B、p+区域103以及雪崩区域104A和104B是具有 矩形框架截面的四棱柱形区域。然后，雪崩区域104A、p+区域103、雪 崩区域104B和n+区域102B从内部按此顺序布置着，使得各区域以框架 形状围绕n+区域102A。
在示例中，电场容易集中在n+区域102A的角部附近和p+区域103 的角部附近。
因此，例如，固定电荷膜114和115可以仅被布置在图13中以虚线 围绕的区域321a至321d和区域322a至322d中。此外，区域321a至321d 至少覆盖n+区域102A的角部附近。区域322a至322d至少覆盖p+区域 103的角部附近。
此外，固定电荷膜114的固定电荷可以根据n+区域102A与p+区域 103之间的极性差异而在区域321a至321d与区域322a至322d之间改变。 类似地，固定电荷膜115的固定电荷可以在区域321a至321d与区域322a 至322d之间改变。
可替代地，固定电荷膜114和115的材料可以在区域321a至321d 与区域322a至322d之间改变。
此外，在图10和图12的示例中，各像素中的雪崩光电二极管结构 中的最外侧区域被限制为n+区域102B。因此，相邻像素中的最外侧区域 具有相同的导电类型，且可以促进像素之间的绝缘隔离。
而且，构成雪崩光电二极管的n+区域102、p+区域103和雪崩区域 104的平面图案不限于上述示例，并且可以是其他平面图案。然而，如在 图3、图10和图12的示例中，优选的是，重复简单形状的图案。简单形 状的图案使与离子注入中的掩模偏移对应的裕度能够被确保，从而容易 减小图案宽度并降低电压。
此外，例如，n+区域102和p+区域103可以以与上述示例相反的方 式被布置。而且，例如，可以增加或减少n+区域102、p+区域103和雪 崩区域104的重复次数。
而且，在参照图10和图11的上述示例中，例如，在电极中存在着 两个以上的不连续部的情况下，固定电荷膜可以被布置成至少覆盖各不 连续部的周围。而且，例如，同样在呈弧形形状以外的框架形状(诸如 矩形)的电极中形成不连续部的情况下，固定电荷膜可以被布置成至少 覆盖各不连续部的周围。
此外，例如，在雪崩光电二极管结构中设置呈四棱柱形状以外的棱 柱形状或呈矩形形状以外的多边形形状的圆筒形n+区域或p+区域的情 况下，如在参照图12和图13所述的示例中，固定电荷膜可以类似地被 布置成至少覆盖各区域的角部周围。
{其他变形例}
已经假设本技术被应用到单位像素被布置成矩阵形状的CMOS图像 传感器而描述了上述实施例，但是本技术不限于CMOS图像传感器。即， 本技术适用于包括沿半导体基板的厚度方向延伸的雪崩光电二极管的一 般固体摄像器件。
而且，本技术适用于背面照射型固体摄像器件。
此外，上述描述说明了固定电荷膜被设置在半导体基板的正面和背 面上的示例，但是固定电荷膜可以被设置在任一面上。
而且，例如，应用本技术的固体摄像器件可以被形成为一个芯片， 或者可以是具有摄像功能的模块形状，在该模块形状中，摄像单元和信 号处理单元或光学***被集体地封装。
<6.固体摄像器件的示例性用途>
图14是图示了上述固体摄像器件的示例性用途的图。
例如，上述固体摄像器件可以用于如下所述的对可见光、红外线、 紫外线和X射线等进行感测的各种情况。
·用于拍摄图像以供鉴赏的装置，诸如数码照相机或安装有照相机的 移动电话等。
·用于交通的装置，例如，为了诸如自动停车等安全驾驶或识别驾驶 员状态等，对汽车的前方、后方、四周或内部等进行拍摄的车载传感器； 监视行驶车辆或道路的监视相机；以及测量车辆之间的距离的测距传感 器等。
·用于诸如TV、冰箱或空调等家用电器的装置，这类装置对用户姿 态进行拍摄并根据该姿态而执行设备操作。
·用于医疗或保健的装置，诸如内窥镜或通过接收红外线而执行血管 造影的装置等。
·用于安保的装置，诸如用于安保的监视相机和用于个人身份认证的 相机等。
·用于美容护理的装置，诸如对皮肤进行拍摄的皮肤测量装置和对头 皮进行拍摄的显微镜等。
·用于运动的装置，诸如用于运动等的动作相机或可穿戴相机等。
·用于农业的装置，诸如用于监视田地或农作物的状态的相机等。
{摄像装置}
图15是图示了作为应用本技术的示例性电子设备的摄像装置(相机 装置)的示例性构造的框图。
如图15所示，摄像装置包括光学***、摄像器件502、DSP电路503、 帧存储器504、显示装置505、记录装置506、操作***507和电源*** 508等，光学***包括透镜组501等，DSP电路503作为相机信号处理 单元。此外，DSP电路503、帧存储器504、显示装置505、记录装置506、 操作***507和电源***508经由总线509而相互连接。
透镜组501从被摄体接收入射光(图像光)，并在摄像器件502的摄 像面上形成图像。摄像器件502以像素为单位将通过透镜组501而形成 在摄像面上的入射光的光量转换成电信号，且摄像器件502将该电信号 作为像素信号输出。
显示装置505由诸如液晶显示装置或电致发光(EL：electro luminescence)显示装置等面板型显示装置构成，并且显示由摄像器件502 拍摄的运动图像或静止图像。记录装置506将由摄像器件502拍摄的运 动图像或静止图像记录在诸如存储卡、录像带或数字化多用盘(DVD： digital versatile disk)等记录介质中。
操作***507响应于用户的操作而发出关于摄像装置中的各种功能 的操作指令。电源***508根据需要将作为DSP电路503、帧存储器504、 显示装置505、记录装置506和操作***507的操作电源的各种电源供应 给这些供应对象。
摄像装置可以被应用到诸如摄像机、数码照相机、智能手机和移动 电话等移动装置的相机模块。然后，根据各实施例的固体摄像器件可以 用作摄像装置中的摄像器件502。因此，可以增强摄像装置的图像质量。
此外，本技术的实施例不限于上述实施例，并且可以在不脱离本发 明主旨的情况下做出各种修改。
而且，例如，本技术可以采用下列构造。
(1)一种固体摄像器件，其包括：
雪崩光电二极管，所述雪崩光电二极管具有第一导电类型的第一区 域、第二导电类型的第二区域和雪崩区域，所述第二导电类型与所述第 一导电类型不同，所述雪崩区域夹在所述第一区域与所述第二区域之间， 且所述第一区域、所述第二区域和所述雪崩区域沿半导体基板的厚度方 向延伸；以及
膜，所述膜被形成在所述半导体基板的至少一侧上，且所述膜包括 金属氧化物膜、金属氮化物膜、或金属氧化物膜和金属氮化物膜的混合 晶体系膜。
(2)根据(1)所述的固体摄像器件，其还包括：
绝缘膜，所述绝缘膜被形成在所述膜与所述半导体基板之间。
(3)根据(1)或(2)所述的固体摄像器件，其中，
所述膜包括铝、钽、锆、铪、钇或镧系元素的氧化物膜或氮化物膜， 或者所述膜包括铝、钽、锆、铪、钇或镧系元素的氧化物和氮化物的混 合晶体系膜。
(4)根据(1)至(3)中的任一项所述的固体摄像器件，其中，
所述膜具有固定电荷。
(5)根据(4)所述的固体摄像器件，其中，
所述膜在所述第一区域附近与所述第二区域附近之间具有不同的固 定电荷。
(6)根据(1)至(5)中的任一项所述的固体摄像器件，其中，
在所述第一区域是矩形管形状的情况下，所述膜被形成为至少覆盖 所述第一区域的角部周围。
(7)根据(1)至(6)中的任一项所述的固体摄像器件，其中，
所述第一区域是圆筒形的，
所述半导体基板的一侧上还设置有电极，所述电极沿着所述第一区 域的上面或底面形成，且所述电极具有一个或多个不连续部，并且
所述膜被形成为在所述半导体基板与所述电极之间至少覆盖所述电 极中的所述不连续部的周围。
(8)根据(1)至(7)中的任一项所述的固体摄像器件，其中，
两个以上的雪崩光电二极管结构在一个像素中重复形成。
(9)固体摄像器件的制造方法，所述方法包括：
在半导体基板的至少一侧上形成膜的步骤，所述膜包括金属氧化物 膜、金属氮化物膜、或金属氧化物膜和金属氮化物膜的混合晶体系膜， 所述半导体基板上形成有雪崩光电二极管，所述雪崩光电二极管具有第 一导电类型的第一区域、第二导电类型的第二区域和雪崩区域，所述第 二导电类型与所述第一导电类型不同，所述雪崩区域夹在所述第一区域 与所述第二区域之间，且所述第一区域、所述第二区域和所述雪崩区域 沿所述半导体基板的厚度方向延伸。
(10)一种电子设备，其包括：
固体摄像器件；以及
信号处理单元，所述信号处理单元对从所述固体摄像器件输出的信 号进行处理，
其中，所述固体摄像器件包括：
雪崩光电二极管，所述雪崩光电二极管具有第一导电类型的第 一区域、第二导电类型的第二区域和雪崩区域，所述第二导电类型 与所述第一导电类型不同，所述雪崩区域夹在所述第一区域与所述 第二区域之间，且所述第一区域、所述第二区域和所述雪崩区域沿 半导体基板的厚度方向延伸；和
膜，所述膜被形成在所述半导体基板的至少一侧上，且所述膜 包括金属氧化物膜、金属氮化物膜、或金属氧化物膜和金属氮化物 膜的混合晶体系膜。
附图标记列表
10、10A至10C：CMOS图像传感器
11：像素阵列部
101：n型阱层
102、102A、102B：n+区域
103：p+区域
104、104A、104B：雪崩区域
105、105A、105C：电极
105B：连接部
105D：不连续部
106、106A：电极
106C：不连续部
107：半导体基板
114、114a、114b、115、115a、115b：固定电荷膜
119、120：绝缘膜
301、302、321、322：区域

Claims (10)

1.一种固体摄像器件，其包括：
雪崩光电二极管，所述雪崩光电二极管具有第一导电类型的第一区域、第二导电类型的第二区域和雪崩区域，所述第二导电类型与所述第一导电类型不同，所述雪崩区域夹在所述第一区域与所述第二区域之间，且所述第一区域、所述第二区域和所述雪崩区域沿半导体基板的厚度方向延伸；以及
膜，所述膜包括形成在所述半导体基板的一侧上的第一膜和形成在所述半导体基板的另一侧上的第二膜，且所述膜包括金属氧化物膜、金属氮化物膜、或金属氧化物膜和金属氮化物膜的混合晶体系膜。
2.根据权利要求1所述的固体摄像器件，其还包括：
绝缘膜，所述绝缘膜被形成在所述膜与所述半导体基板之间。
3.根据权利要求1所述的固体摄像器件，其中，
所述膜包括铝、钽、锆、铪、钇或镧系元素的氧化物膜或氮化物膜，或者所述膜包括铝、钽、锆、铪、钇或镧系元素的氧化物和氮化物的混合晶体系膜。
4.根据权利要求1所述的固体摄像器件，其中，
所述膜具有固定电荷。
5.根据权利要求4所述的固体摄像器件，其中，
所述膜在所述第一区域附近与所述第二区域附近之间具有不同的固定电荷。
6.根据权利要求1至5中任一项所述的固体摄像器件，其中，
在所述第一区域是矩形管形状的情况下，所述膜被形成为至少覆盖所述第一区域的角部周围。
7.根据权利要求1至5中任一项所述的固体摄像器件，其中，
所述第一区域是圆筒形的，
所述半导体基板的一侧上还设置有电极，所述电极沿着所述第一区域的上面或底面形成，且所述电极具有一个或多个不连续部，并且
所述膜被形成为在所述半导体基板与所述电极之间至少覆盖所述电极中的所述不连续部的周围。
8.根据权利要求1至5中任一项所述的固体摄像器件，其中，
两个以上的雪崩光电二极管结构在一个像素中重复形成。
9.固体摄像器件的制造方法，所述方法包括：
形成膜的步骤，所述膜包括形成在半导体基板的一侧上的第一膜和形成在所述半导体基板的另一侧上的第二膜，并且金属氧化物膜、金属氮化物膜、或金属氧化物膜和金属氮化物膜的混合晶体系膜，所述半导体基板上形成有雪崩光电二极管，所述雪崩光电二极管具有第一导电类型的第一区域、第二导电类型的第二区域和雪崩区域，所述第二导电类型与所述第一导电类型不同，所述雪崩区域夹在所述第一区域与所述第二区域之间，且所述第一区域、所述第二区域和所述雪崩区域沿所述半导体基板的厚度方向延伸。
10.一种电子设备，其包括：
固体摄像器件，所述固体摄像器件是根据权利要求1至8中任一项所述的固体摄像器件；以及
信号处理单元，所述信号处理单元对从所述固体摄像器件输出的信号进行处理。
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