TWI560740B - Methods of forming one or more covered voids in a semiconductor substrate and methods of forming semiconductor-on-insulator substrates - Google Patents

Methods of forming one or more covered voids in a semiconductor substrate and methods of forming semiconductor-on-insulator substrates

Info

Publication number
TWI560740B
TWI560740B TW104115103A TW104115103A TWI560740B TW I560740 B TWI560740 B TW I560740B TW 104115103 A TW104115103 A TW 104115103A TW 104115103 A TW104115103 A TW 104115103A TW I560740 B TWI560740 B TW I560740B
Authority
TW
Taiwan
Prior art keywords
methods
forming
semiconductor
semiconductor substrate
insulator substrates
Prior art date
Application number
TW104115103A
Other languages
English (en)
Other versions
TW201533772A (zh
Inventor
David H Wells
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of TW201533772A publication Critical patent/TW201533772A/zh
Application granted granted Critical
Publication of TWI560740B publication Critical patent/TWI560740B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/764—Air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647—Lateral overgrowth
    • H01L21/0265—Pendeoepitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2015—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate the substrate being of crystalline semiconductor material, e.g. lattice adaptation, heteroepitaxy

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Non-Volatile Memory (AREA)
  • Formation Of Insulating Films (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Silicon Compounds (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
TW104115103A 2007-02-07 2008-01-23 Methods of forming one or more covered voids in a semiconductor substrate and methods of forming semiconductor-on-insulator substrates TWI560740B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/704,466 US7989322B2 (en) 2007-02-07 2007-02-07 Methods of forming transistors

Publications (2)

Publication Number Publication Date
TW201533772A TW201533772A (zh) 2015-09-01
TWI560740B true TWI560740B (en) 2016-12-01

Family

ID=39473792

Family Applications (3)

Application Number Title Priority Date Filing Date
TW97102554A TWI380398B (en) 2007-02-07 2008-01-23 Methods of forming covered voids in a semiconductor substrate
TW101136073A TWI490976B (zh) 2007-02-07 2008-01-23 形成半導體基板中一或多個經覆蓋空隙之方法及形成絕緣體上半導體基板之方法
TW104115103A TWI560740B (en) 2007-02-07 2008-01-23 Methods of forming one or more covered voids in a semiconductor substrate and methods of forming semiconductor-on-insulator substrates

Family Applications Before (2)

Application Number Title Priority Date Filing Date
TW97102554A TWI380398B (en) 2007-02-07 2008-01-23 Methods of forming covered voids in a semiconductor substrate
TW101136073A TWI490976B (zh) 2007-02-07 2008-01-23 形成半導體基板中一或多個經覆蓋空隙之方法及形成絕緣體上半導體基板之方法

Country Status (3)

Country Link
US (26) US7989322B2 (zh)
TW (3) TWI380398B (zh)
WO (1) WO2008097448A2 (zh)

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