TWI470784B - 固態記憶體 - Google Patents

固態記憶體 Download PDF

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TWI470784B
TWI470784B TW97133302A TW97133302A TWI470784B TW I470784 B TWI470784 B TW I470784B TW 97133302 A TW97133302 A TW 97133302A TW 97133302 A TW97133302 A TW 97133302A TW I470784 B TWI470784 B TW I470784B
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Junji Tominaga
Paul Fons
Alexander Kolobov
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Nat Inst Of Advanced Ind Scien
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Description

固態記憶體
本發明係關於一種相分離型固態記憶體，其利用作為相變化之一形態之硫族化合物的相分離(旋節分離)，將由該分離產生之電阻或光學特性之差異作為資料進行記錄及抹除。但由於相分離亦為相變化之一形態，故由此意亦可稱為相變化固態記憶體(相變化RAM、PRAM)。
本申請案主張基於2007年8月31日於日本申請之特願2007-225978號之優先權，其內容引用於本文中。
相變化RAM之資料的記錄及抹除，先前係藉由作為其記錄材料之含Te之硫族化合物之結晶狀態與非晶質狀態之稱為一次相變態的變化所產生之物理特性變化而進行，根據該基本原理設計相變化RAM(例如參照下述專利文獻1)。
掌管相變化RAM之記錄抹除之記錄材料，一般係利用濺鍍等真空成膜法形成於電極間，通常使用由化合物組成構成之靶材構成一層的合金薄膜。
因此，以20~50nm之厚度構成之記錄薄膜非由單結晶，而係由多結晶構成。
該各微結晶間之界面電阻之差異會影響作為整體之相變化RAM之電阻值的均一性，成為使結晶狀態之電阻值產生不均一的原因(參照下述「非專利文獻1」)。
又，認為結晶/非晶質間之相轉移時產生之10%左右的體積變化會對各個微結晶產生不同之應力，物質流動與膜整體之變形會限制記錄讀取次數(參照下述「非專利文獻2」)。
[專利文獻1]日本特開2002-203392號公報
[非專利文獻1]奧田昌宏監修，「次世代光記錄技術與材料」，SIEMUSI出版，2004年1月31日發行，p114
[非專利文獻2]角田義人監修，「光碟存儲之基礎與應用」，電子資訊通信學會編，平成13年6月1日初版第3刷發行，p209
[非專利文獻3]Y. Yamanda & T. Matsunaga,Journal of Applied Physics,88,(2000)p7020-7028
[非專利文獻4]A. Kolobov et al. Nature Materials 3(2004)p703
關於含Te之硫族化合物之結晶結構及非晶質結構，從1980年後半左右開始用X射線等研究其結構分析。然而，由於Te與構成其化合物之Sb原子之原子序相鄰接，電子數僅相差一個，故X射線繞射或電子線繞射幾乎不能分辨其區別，至2004年尚未明確詳細之結晶結構為何種結構。
尤其，改寫型光碟中已被商品化之稱為GeSbTe(225組成)的化合物、及位於擬二元組成化合物線上之組成(位於GeTe-Sb2 Te3 之線上之化合物，225、147、125組成)，由實驗證明其具備非常良好之特性。然而，關於其結晶結構採用岩鹽結構，係由Te佔據其Na所占位置(稱其為a位置)，由Ge或Sb佔據剩餘之Cl所占之位置(b位置)，其置放方法無規則(參照上述「非專利文獻3」)。
若使用放射光軌道裝置等詳細檢討GeSbTe化合物之結構分析，將發現含Te之硫族化合物由以下幾點獲得不同於先前結構的情況(參照上述「非專利文獻4」)。
1.結晶相中，Ge原子與Sb原子於NaCl型之單純立方晶格內占據Cl之位置((b)位置)的排列，非以往認為之「無規則」狀態，而係原子之排列位置準確「決定」。且晶格歪斜(參照圖1)。
2.非晶質狀態並非完全無規則，採取晶格內部之Ge原子由中心位置(稍有偏離且為強介電性)以2A之程度向Te原子側移動之配置，且具備於維持其單元之狀態下扭曲之構造(參照圖2)。
3.藉由該扭曲之單元復原，而使高速轉換穩定反覆進行(參照圖3)。
然而不含Ge之改寫型光碟亦被商品化。DVD-RW或DVD+RW係使用以Sb為主成分且於其添加有Te之材料，尤其以Sb2 Te構成之組成為中心使用。
先前，PRAM之資料之記錄/抹除，係根據作為其記錄材料之含Te之硫族化合物之結晶狀態與非晶質狀態之一次相變態所產生之物理特性變化而進行。然而，由於記錄薄膜非由單結晶，而係由多結晶構成，故電阻值存在不均一，因相轉移時產生之體積變化而使記錄讀取次數存有限制。本發明係以提高該記錄讀取次數為目的。
將上述含Ge之GeSbTe合金之模型適用於Sb與Te構成之合金，藉由實驗及電腦之模擬進行了詳細分析。其結果發現，含Ge之硫族化合物，相對於藉由Ge原子如圖1或圖2所示變換位置而形成記錄或抹除狀態，藉由Sb2 Te3 層與Sb層之微小層間分離會產生較大光學特性變化或電阻變化。
由此新發現之層間分離轉換原理可得，若藉由以下之手法構成不含Ge之硫族化合物，可提供一種盡可能降低微結晶間之界面電阻，且可大幅提高反覆改寫次數之新穎的相分離化RAM。
為達成上述目的，本發明採用以下之構成。
(1)一種固態記憶體，其特徵在於：其係因物質之相分離而使電氣特性變化者，且資料之記錄及再生材料係藉由因該相分離而使該電氣特性產生變化之人工超晶格的積層構造而構成。
(2)如(1)之固態記憶體，其中上述積層構造係由含銻(Sb)原子之合金薄膜與含碲(Te)原子之合金薄膜構成。
(3)如(1)或(2)之固態記憶體，其中上述薄膜之膜厚為0.3nm以上、2nm以下。
(4)如(2)之固態記憶體，其中藉由於上述含銻(Sb)原子之合金薄膜與上述含碲(Te)原子之合金薄膜的界面形成一維之非等向性分離狀態來記錄資料。
(5)如(2)之固態記憶體，其中藉由於上述含銻(Sb)原子之合金薄膜與上述含碲(Te)原子之合金薄膜的界面使一維之非等向性分離之狀態再結合來抹除資料。
即，可知藉由將Sb與Te構成之硫族化合物作為Sb之薄膜與Sb2 Te3 薄膜構成之超晶格而人工形成，使Sb層與Sb2 Te3 層以弱原子結合而結合，利用電能僅於其層間方向分開結合，形成並固定高電阻狀態(記錄(抹除)狀態)，藉此可提供一種能大幅改善先前之相變化RAM之特性的新相分離化RAM。又亦可知，反之藉由利用電能返回結合而復原成低電阻狀態(抹除(記錄)狀態)，可提供一種能大幅改善先前之相變化RAM之特性的新相分離化RAM。
該構成之基本構造顯示於圖4，例如為Sb2 Te之情形，Sb層之厚度約為0.9奈米，Sb2 Te3 層之厚度約為0.8奈米。一般較好的是，各層之厚度為0.3nm至2nm。
如此人工之超晶格用濺鍍法構成之情形，若用Sb或Sb2 Te3 構成之化合物靶材(或用單體之靶材)，預先對濺鍍用之投入電功率測定每小時之膜形成速度，可僅憑管理成膜時間而簡單構成該等膜構成之超晶格結構。
使用某組成之Sb與Te構成之化合物靶材作為一層記錄膜構成之情形，由於所構成之微結晶內之層間分離之方向於各微結晶皆無規則，且為分離層間結合所投入之電能不具有相干性，故熱力學上必須將多數熱能對系統放出。與此相對，本發明之超晶格結構中，層間結合之轉換動作在記錄膜中如圖4所示為一方向(即具有相干性)，故可於作為作業之能量上利用較多輸入能量，可抑制作為熱之能量放出量。
即，用以進行層間結合之轉換動作的能量效率提高。又，藉由對於改寫產生之體積變化(結晶-非晶質間之體積變化)僅產生於層間之一軸方向，可提供不產生組成偏析之穩定的反覆改寫動作。
使用本發明，藉由形成不含Ge之硫族化合物之複數的組成構成之超晶格結構，可大幅提高含Ge之硫族化合物構成之相變化RAM的特性。
以下說明用以實施本發明之較佳形態。
[實施例1]
藉由一般之自電阻加熱型之基本構成作成相分離化RAM。即，電極使用TiN。且於記錄膜使[Sb/Sb2 Te3 ]之超晶格積層20層。單元之大小為100×100nm2 。
比較圖4與圖5可知，圖5中Sb原子與位於其下之Te原子之界面稍大於圖4。該微小之差產生較大之導電度之差。
對該裝置程式性地給與電壓，測定記錄及抹除時之電流值。其結果，記錄時之電流值為0.35mA、脈衝時間5ns，抹除時之電流值為0.08mA、脈衝時間60ns。測定以該電流值之反覆記錄抹除次數，結果其值為1014 次。
<比較例>
與實施例1相同，以一般之自電阻加熱型之基本構成作成相變化RAM。於記錄膜形成20奈米之Sb2 Te之一層膜。稱作單元之大小為100×100nm2 。對該裝置程式性地給與電壓，測定記錄及抹除時之電流值。
其結果，記錄時之電流值為1.3mA，抹除時之電流值為0.65mA。另，脈衝之照射時間與實施例1相同。測定以該電流值之反覆記錄抹除次數，結果其值為1011 次。
[產業上之可利用性]
利用本發明可將先前之相變化RAM之資料記錄時之電流值降低至十分之一以下，且使資料之反覆改寫次數比先前提高2~3位數以上，成為產業上之重大貢獻。
圖1係顯示Ge-Sb-Te合金結晶構造之說明圖。另，○表示Te，▲表示Ge，●表示Sb。
圖2係顯示Ge-Sb-Te合金非晶質構造(短距離構造)之說明圖。
圖3係顯示相變化RAM轉換用之基本單元之說明圖。
圖4係顯示由Sb/Sb2 Te3 構成之超晶格結構(結合狀態)之說明圖。
圖5係顯示由Sb/Sb2 Te3 構成之超晶格結構(分離狀態)之說明圖。
(無元件符號說明)

Claims (4)

  1. 一種固態記憶體，其特徵在於：其係因物質之相分離而使電氣特性變化者，且資料之記錄及再生材料係藉由因該相分離而使該電氣特性產生變化之人工超晶格的積層構造而構成，藉由電能紀錄或抹除，其中上述積層構造包含Sb薄膜與Sb2 Te3 薄膜。
  2. 如請求項1之固態記憶體，其中上述薄膜之膜厚為0.3nm以上、2nm以下。
  3. 如請求項1之固態記憶體，其中藉由於上述Sb薄膜與上述Sb2 Te3 薄膜的界面形成一維之非等向性分離狀態來記錄資料。
  4. 如請求項1之固態記憶體，其中藉由於上述Sb薄膜與上述Sb2 Te3 薄膜的界面使一維之非等向性分離之狀態再結合來抹除資料。
TW97133302A 2007-08-31 2008-08-29 固態記憶體 TWI470784B (zh)

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