MX2018015715A - Interruptor integrado en linea y metodo para producir un interruptor integrado en linea. - Google Patents

Interruptor integrado en linea y metodo para producir un interruptor integrado en linea.

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Publication number
MX2018015715A
MX2018015715A MX2018015715A MX2018015715A MX2018015715A MX 2018015715 A MX2018015715 A MX 2018015715A MX 2018015715 A MX2018015715 A MX 2018015715A MX 2018015715 A MX2018015715 A MX 2018015715A MX 2018015715 A MX2018015715 A MX 2018015715A
Authority
MX
Mexico
Prior art keywords
semiconductor switch
line
flat parts
flat
integrated semiconductor
Prior art date
Application number
MX2018015715A
Other languages
English (en)
Inventor
Tazarine Wacim
Betscher Simon
Original Assignee
Auto Kabel Man Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Auto Kabel Man Gmbh filed Critical Auto Kabel Man Gmbh
Publication of MX2018015715A publication Critical patent/MX2018015715A/es

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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
  • Insulated Conductors (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

Interruptor integrado en línea que tiene al menos una primera parte plana metálica 2, al menos una segunda parte plana metálica 8, en donde las partes planas están dispuestas en una región superpuesta con sus lados anchos uno encima del otro y en la región superpuesta un interruptor conductor 18 está dispuesto entre las partes planas 2, 8 para conectar las partes planas 2, 8 entre sí de manera conmutada. Una construcción simple es posible porque al menos en la región de superposición una primera de las partes planas 2, en un lado que mira hacia la segunda parte de las partes planas 8, es recubierta al menos parcialmente con un aislamiento, en donde se proporciona un hueco en el aislamiento en una región de contacto 10 y el interruptor semiconductor 18 en la región de contacto 10 se pone en contacto eléctricamente con la parte plana 8.
MX2018015715A 2016-06-14 2017-03-22 Interruptor integrado en linea y metodo para producir un interruptor integrado en linea. MX2018015715A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102016110847.2A DE102016110847B4 (de) 2016-06-14 2016-06-14 Leitungsintegrierter Schalter und Verfahren zum Herstellen eines leitungsintegrierten Schalters
PCT/EP2017/056761 WO2017215798A1 (de) 2016-06-14 2017-03-22 Leitungsintegrierter halbleiterschalter und verfahren zu dessen herstellung

Publications (1)

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MX2018015715A true MX2018015715A (es) 2019-04-29

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MX2018015715A MX2018015715A (es) 2016-06-14 2017-03-22 Interruptor integrado en linea y metodo para producir un interruptor integrado en linea.

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US (1) US10840207B2 (es)
EP (1) EP3469664A1 (es)
CN (1) CN109478749B (es)
DE (1) DE102016110847B4 (es)
MX (1) MX2018015715A (es)
WO (1) WO2017215798A1 (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102016110847B4 (de) * 2016-06-14 2022-02-17 Auto-Kabel Management Gmbh Leitungsintegrierter Schalter und Verfahren zum Herstellen eines leitungsintegrierten Schalters
DE102020216305B4 (de) 2020-12-18 2022-10-13 Leoni Bordnetz-Systeme Gmbh Elektrische Schaltvorrichtung
CN113131291B (zh) * 2021-03-11 2023-05-12 东莞市晟合科技有限公司 一种搭载电子元器件的连接线及其制作方法

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2235455A1 (de) * 1971-07-28 1973-05-03 Halbleiterwerk Frankfurt Oder Traegerstreifen fuer halbleiterbauelemente
JPS62142125U (es) * 1986-03-03 1987-09-08
KR940010910B1 (ko) * 1990-04-06 1994-11-19 스미토모 고쿠슈 긴조쿠 가부시기가이샤 반도체 패키지
JP2531928B2 (ja) * 1993-11-05 1996-09-04 株式会社東芝 半導体スタック
AU705177B1 (en) * 1997-11-26 1999-05-20 Kabushiki Kaisha Toshiba Semiconductor device
DE59900800D1 (de) * 1998-03-12 2002-03-14 Auto Kabel Man Gmbh Elektrisches kabel
US6014066A (en) * 1998-08-17 2000-01-11 Trw Inc. Tented diode shunt RF switch
FR2822591A1 (fr) * 2001-03-22 2002-09-27 Commissariat Energie Atomique Assemblage de composants d'epaisseurs diverses
WO2002083549A1 (en) * 2001-04-17 2002-10-24 Telefonaktiebolaget Lm Ericsson (Publ) Printed circuit board integrated switch
JP4039202B2 (ja) * 2002-10-16 2008-01-30 日産自動車株式会社 積層型半導体装置およびその組み立て方法
JP4564937B2 (ja) * 2006-04-27 2010-10-20 日立オートモティブシステムズ株式会社 電気回路装置及び電気回路モジュール並びに電力変換装置
WO2008142865A1 (ja) * 2007-05-21 2008-11-27 Kabushiki Kaisha Toshiba インダクタンス素子とその製造方法、およびそれを用いたスイッチング電源
US7952166B2 (en) * 2008-05-22 2011-05-31 Infineon Technologies Austria Ag Semiconductor device with switch electrode and gate electrode and method for switching a semiconductor device
JP5067267B2 (ja) 2008-06-05 2012-11-07 三菱電機株式会社 樹脂封止型半導体装置とその製造方法
JP2010225720A (ja) 2009-03-23 2010-10-07 Mitsubishi Electric Corp パワーモジュール
US8724325B2 (en) * 2009-05-19 2014-05-13 Hamilton Sundstrand Corporation Solid state switch arrangement
KR101343289B1 (ko) * 2010-05-18 2013-12-18 도요타지도샤가부시키가이샤 반도체 장치 및 그 제조 방법
JP5460653B2 (ja) * 2011-07-14 2014-04-02 本田技研工業株式会社 半導体装置
JP2013065620A (ja) 2011-09-15 2013-04-11 Sumitomo Electric Ind Ltd 配線シート付き電極端子、配線構造体、半導体装置、およびその半導体装置の製造方法
JP2013073945A (ja) * 2011-09-26 2013-04-22 Sumitomo Electric Ind Ltd 配線シート付き電極端子、配線構造体、半導体装置、およびその半導体装置の製造方法
DE102012202281A1 (de) 2012-02-15 2013-08-22 Infineon Technologies Ag Halbleiteranordnung für Druckkontaktierung
CN103795384B (zh) * 2012-10-31 2017-04-19 台达电子企业管理（上海）有限公司 开关电路封装模块
US8987875B2 (en) * 2013-03-08 2015-03-24 Delphi Technologies, Inc. Balanced stress assembly for semiconductor devices
DE102014101882A1 (de) 2014-02-14 2015-08-20 Heraeus Deutschland GmbH & Co. KG Verfahren zur Herstellung einer bondbaren Beschichtung auf einem Trägerband
DE102014104013A1 (de) * 2014-03-24 2015-09-24 Infineon Technologies Austria Ag Leistungshalbleiterbauteil
DE102014006346A1 (de) * 2014-04-30 2015-11-05 Ellenberger & Poensgen Gmbh Hochstromschalter
US9666703B2 (en) * 2014-12-17 2017-05-30 Great Wall Semiconductor Corporation Semiconductor devices with cavities
DE102016110847B4 (de) * 2016-06-14 2022-02-17 Auto-Kabel Management Gmbh Leitungsintegrierter Schalter und Verfahren zum Herstellen eines leitungsintegrierten Schalters

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Publication number Publication date
CN109478749A (zh) 2019-03-15
WO2017215798A1 (de) 2017-12-21
DE102016110847A1 (de) 2017-12-14
US10840207B2 (en) 2020-11-17
US20190172811A1 (en) 2019-06-06
EP3469664A1 (de) 2019-04-17
DE102016110847B4 (de) 2022-02-17
CN109478749B (zh) 2021-05-07

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