KR910001967A - 웨이퍼 스케일 집적장치 - Google Patents
웨이퍼 스케일 집적장치 Download PDFInfo
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- KR910001967A KR910001967A KR1019890007512A KR890007512A KR910001967A KR 910001967 A KR910001967 A KR 910001967A KR 1019890007512 A KR1019890007512 A KR 1019890007512A KR 890007512 A KR890007512 A KR 890007512A KR 910001967 A KR910001967 A KR 910001967A
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- 230000010354 integration Effects 0.000 claims description 4
- 239000010408 film Substances 0.000 claims 4
- 239000002184 metal Substances 0.000 claims 4
- 239000013039 cover film Substances 0.000 claims 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5286—Arrangements of power or ground buses
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/006—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Wire Bonding (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 웨이퍼 스케일 집적(wafar scale integration)장치에 사용되는 웨이퍼의 형태를 설명하기 위한 평면도.
제2도는 제1도에 도시된 웨이퍼의 컷팅을 도시하는 평면도.
Claims (17)
- 웨이퍼; 그들의 각각이 액튜얼 회로와 다수의 리얼패드들을 가지며, 상기 웨이퍼의 중심부에 선택적으로 형성된 다수의 리얼 칩들; 상기 리얼 패드들 각각을 접속하는 다수의 본딩 와이어들; 그들 각각의 다수의 릴레이 패드들을 가지며, 상기 웨이퍼의 주변부분에 선택적으로 형성된 다수의 더미칩들로 이루어지고, 상기 본딩 와이어들의 몇몇이 상기 릴레이 패드들의 대응하는 것에 선택적으로 접속되는 웨이퍼 스케일 집적장치.
- 제1항에 있어서, 상기 릴레이 패드들에 접속된 상기 본딩 와이어들이 전원 전압을 상기 리얼 칩들에 공급하기 위해 사용되는 웨이퍼 스케일 집적장치.
- 제1항에 있어서, 상기 리얼 칩들의 각각이 공통 신호들을 전달하기 위한 그로우벌 라인들과 상기 리얼 칩들이 각각을 그이 인접 리얼 칩들에 전기적으로 접속하기 위한 로컬 라인들을 포함하고, 몇몇의 상기 리얼 칩들 사이의 계면부분 근방의 상기 그로우벌 라인들이 상기 로컬 라인들을 통과시키기 위해 분단 되어 있는 웨이퍼 스케일 집적장치.
- 제3항에 있어서, 몇몇의 상기 리얼 칩들 사이의 상기 계면 부분이 상기 웨이퍼 중심에서의 열과 같이 배열되는 웨이퍼 스케일 집적장치.
- 제3항에 있어서, 상기 그로우벌 라인들이 웨이퍼 클럭신호를 전달하기 위한 웨이퍼 클럭라인과 컴맨드 스트로브 신호를 전달하기 위한 컴멘드 라인으로 이루어지는 웨이퍼 스케일 집적장치.
- 제1항에 있어서, 금속막이 각각의 상기 더미 칩들의 주변부분에 형성되지 않아, 상기 그로우빌 라인들과 로컬 라인들이 단락되지 않는 웨이퍼 스케일 집적장치.
- 웨이퍼; 그들의 각각이 액튜얼 회로를 가지며, 상기 웨이퍼의 중심부에 선택적으로 형성된 다수의 리얼 칩들; 그들의 각각이 액튜얼 회로를 갖고 있지 않지만 상기 웨이퍼를 절단하기 위한 스크라이브 라인을 포함하며 상기 웨이퍼의 주변부분에 선택적으로 형성된 다수의 더미 칩들로 이루어지는 웨이퍼 스케일 집적장치.
- 제7항에 있어서, 금속막과 커버막이 상기 스크라이브 라인위에 형성되지 않는 웨이퍼 스케일 집적장치.
- 제7항에 있어서, 상기 리얼 칩들의 각각이 공통 신호들을 전달하기 위한 그로우빌 라인들과 상기 리얼 칩들의 각각을 그의 인접 리얼 칩들에 전기적으로 접속하기 위한 로컬 라인들을 포함하고, 몇몇의 상기 리얼 칩들사이의 계면 부분 근방의 상기 그로우빌 라인들이 상기 로컬 라인들을 통과 시키기 위해 분단된 웨이퍼 스케일 집적장치.
- 제9항에 있어서, 몇몇의 상기 리얼칩들 사이의 상기 계면 부분이 상기 웨이퍼의 중심에서 열과 같이 배열되는 웨이퍼 스케일 집적장치.
- 제9항에 있어서, 상기 그로우벌 라인들이 웨이퍼 클럭신호를 전달하기 위한 웨이퍼 클럭 라인과 컴멘트 스트로브 신호를 전달하기 위한 컴멘트 라인으로 이루어지는 웨이퍼 스케일 집적장치.
- 제7항에 있어서, 금속막의 각각의 상기 더미 칩들의 주변부분에 형성되지 않아, 상기 그로우벌 라인들과 로컬 라인들이 단락 되지 않는 웨이퍼 스케일 집적장치.
- 웨이퍼; 그들의 각각이 액튜얼 회로를 가지며, 상기 웨이퍼에 선택적으로 형성된 다수의 리얼 칩들; 그들의 각각이 액튜얼 회로를 갖지 않으며, 상기 웨이퍼의 상기 주변부분에 있는 리얼 칩들 대신에 상기 웨이퍼의 주변부분에 선택적으로 형성되는 다수의 더미 칩들로 이루어지는 웨이퍼 스케일 집적장치.
- 제13항에 있어서, 상기 리얼 칩들의 각각이 공통신호들을 전달하기 위한 그로우벌 라인들과 상기 리얼 칩들의 각각을 그의 인접 리얼 칩들에 전기적으로 접속하기 위한 로컬 라인들을 포함하고, 몇몇의 상기 리얼 칩들사이에 계면부분 근방의 상기 그로우벌 라인들이 상기 로컬 라인들을 통과시키기 위해 분단되어 있는 웨이퍼 스케일 집적장치.
- 제14항에 있어서, 몇몇의 상기 리얼 칩들 사이의 계면부분이 상기 웨이퍼의 중심에서의 열과 같이 배열되는 웨이퍼 스케일 집적장치.
- 제14항에 있어서, 상기 그로우벌 라인들이 웨이퍼 클럭신호를 전달하기 위한 웨이퍼 클럭라인과 컴멘트 스트로브 신호를 전달하기 위한 컴맨트 라인으로 이루어지는 웨이퍼 스케일 집적장치.
- 제13항에 있어서, 금속막이 각각의 상기 더미 칩들의주변부분에 형성되지 않아, 상기 그로우빌 라인들과 로컬 라인들이 단락 되지 않는 웨이퍼 스케일 집적장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63132589A JP2516403B2 (ja) | 1988-06-01 | 1988-06-01 | ウエハ・スケ―ル・メモリ |
JP63-132589 | 1988-06-01 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910001967A true KR910001967A (ko) | 1991-01-31 |
KR920008423B1 KR920008423B1 (ko) | 1992-09-28 |
Family
ID=15084877
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890007512A KR920008423B1 (ko) | 1988-06-01 | 1989-06-01 | 웨이퍼 스케일 집적장치 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5138419A (ko) |
EP (1) | EP0345162B1 (ko) |
JP (1) | JP2516403B2 (ko) |
KR (1) | KR920008423B1 (ko) |
DE (1) | DE68917793T2 (ko) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5767565A (en) * | 1996-07-22 | 1998-06-16 | Alliance Semiconductor Corporation | Semiconductor devices having cooperative mode option at assembly stage and method thereof |
US6664628B2 (en) * | 1998-07-13 | 2003-12-16 | Formfactor, Inc. | Electronic component overlapping dice of unsingulated semiconductor wafer |
US6700142B1 (en) * | 2001-12-31 | 2004-03-02 | Hyperchip Inc. | Semiconductor wafer on which is fabricated an integrated circuit including an array of discrete functional modules |
JP5309728B2 (ja) * | 2008-06-27 | 2013-10-09 | 富士通セミコンダクター株式会社 | レチクルデータ作成方法及びレチクルデータ作成装置 |
US9899324B1 (en) * | 2016-11-28 | 2018-02-20 | Globalfoundries Inc. | Structure and method of conductive bus bar for resistive seed substrate plating |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5568668A (en) * | 1978-11-20 | 1980-05-23 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device |
JPS5779655A (en) * | 1980-11-05 | 1982-05-18 | Ricoh Co Ltd | Manufacture of integrated circuit chip |
JPS58143550A (ja) * | 1982-02-22 | 1983-08-26 | Nec Corp | 半導体装置 |
JPS59107532A (ja) * | 1982-12-13 | 1984-06-21 | Nec Corp | 半導体装置 |
JPS59197151A (ja) * | 1983-04-22 | 1984-11-08 | Toshiba Corp | 半導体集積回路装置 |
FR2547112B1 (fr) * | 1983-06-03 | 1986-11-21 | Thomson Csf | Procede de realisation d'un circuit hybride et circuit hybride logique ou analogique |
JPS6020526A (ja) * | 1983-07-15 | 1985-02-01 | Hitachi Ltd | 半導体装置 |
JPS6049648A (ja) * | 1983-08-30 | 1985-03-18 | Sumitomo Electric Ind Ltd | マスタスライスic |
US4703436A (en) * | 1984-02-01 | 1987-10-27 | Inova Microelectronics Corporation | Wafer level integration technique |
JPH0714002B2 (ja) * | 1984-05-15 | 1995-02-15 | セイコーエプソン株式会社 | チップへの信号供給方法 |
JPS6130044A (ja) * | 1984-07-20 | 1986-02-12 | Nippon Denso Co Ltd | 半導体チツプの検査方法 |
JPS6187349A (ja) * | 1984-10-04 | 1986-05-02 | Nippon Denso Co Ltd | 半導体ウエハ |
JPS61214559A (ja) * | 1985-03-20 | 1986-09-24 | Hitachi Ltd | 半導体集積回路装置 |
GB2177825B (en) * | 1985-07-12 | 1989-07-26 | Anamartic Ltd | Control system for chained circuit modules |
JPS62179755A (ja) * | 1986-02-03 | 1987-08-06 | Mitsubishi Electric Corp | テスト回路内蔵半導体集積回路 |
JPS62219957A (ja) * | 1986-03-20 | 1987-09-28 | Fujitsu Ltd | Lsi素子内の入出力回路 |
JPS62224056A (ja) * | 1986-03-26 | 1987-10-02 | Hitachi Ltd | 半導体装置 |
JPS62238637A (ja) * | 1986-04-09 | 1987-10-19 | Nec Kansai Ltd | パタ−ン位置合わせ方法 |
JPS63114246A (ja) * | 1986-10-31 | 1988-05-19 | Mitsubishi Electric Corp | 半導体装置 |
JPH03106029A (ja) * | 1989-09-20 | 1991-05-02 | Fujitsu Ltd | ウエハ・スケール・ic |
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1988
- 1988-06-01 JP JP63132589A patent/JP2516403B2/ja not_active Expired - Fee Related
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1989
- 1989-06-01 KR KR1019890007512A patent/KR920008423B1/ko not_active IP Right Cessation
- 1989-06-01 DE DE68917793T patent/DE68917793T2/de not_active Expired - Fee Related
- 1989-06-01 EP EP89401508A patent/EP0345162B1/en not_active Expired - Lifetime
-
1991
- 1991-05-28 US US07/707,936 patent/US5138419A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5138419A (en) | 1992-08-11 |
DE68917793T2 (de) | 1995-01-05 |
KR920008423B1 (ko) | 1992-09-28 |
DE68917793D1 (de) | 1994-10-06 |
JP2516403B2 (ja) | 1996-07-24 |
EP0345162A1 (en) | 1989-12-06 |
JPH01303750A (ja) | 1989-12-07 |
EP0345162B1 (en) | 1994-08-31 |
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