KR890702254A - 집적회로 트랜치 셀 - Google Patents

집적회로 트랜치 셀

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Publication number
KR890702254A
KR890702254A KR1019890700829A KR890700829A KR890702254A KR 890702254 A KR890702254 A KR 890702254A KR 1019890700829 A KR1019890700829 A KR 1019890700829A KR 890700829 A KR890700829 A KR 890700829A KR 890702254 A KR890702254 A KR 890702254A
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South Korea
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trench
source
integrated circuit
wall
region
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KR1019890700829A
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English (en)
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KR0132577B1 (ko
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키웬텡
칼엘.왕
구옌 비치-옌
우 웨이
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빈센트 죠셉 로너
모토로라 인코포레이티드
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Publication of KR890702254A publication Critical patent/KR890702254A/ko
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Publication of KR0132577B1 publication Critical patent/KR0132577B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7827—Vertical transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/15—Static random access memory [SRAM] devices comprising a resistor load element
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음

Description

집적회로 트랜치 셀
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 트랜치에 새 트랜지스터를 이용한 본 발명의 SRAM 메모리 셀에 대한 일실시예를 예중한 단면도. 제 2 도는 제 1 도의 SRAM 메모리 셀의 대략적 구조 설계도. 제 3 도는 제 1 도에서 SRAM 셀 실시예에 대한 트랜지스터가 전체 셀을 형성하도록 접속 및 분포 관계를 설명하기 위한 종래 여섯 개의 트랜지스터 SRAM 메모리에 대한 구조 회로도.

Claims (10)

  1. 기판에 형성된 집적회로 트랜치 셀에 있어서, 상부 부분을 가진 최소한의 수직벽 및 바닥층을 포함하는 트랜치와, 수직벽에서 상기 벽의 상부 부분 근처에 하나와 트랜치의 바닥층에서 하나로 두 쏘스/드레인 영역 및 상기 벽에 따라 게이트 영역을 가진 최소한의 한 전계 효과 트랜지스터(FET)와, 상기 트랜치 내에 상기 수직벽의 FET에 전기적으로 접속되는 부하 소자의 바닥 접촉과 상부 접촉을 가진 중심 부하 소자를 구비하는 것을 특징으로 하는 집적 회로 트랜치 셀.
  2. 제 1 항에 있어서, 상기 게이트 영역 및 상기 중심 부하 소자가 도핑된 다결정 실리콘을 포함하는 것을 특징으로 하는 집적 회로 트랜치 셀.
  3. 제 1 항에 있어서, 상기 중심 부하 소자는 수동 부하 소자인 것을 특징으로 하는 집적 회로 트랜치 셀.
  4. 제 1 항에 있어서, 상기 중심 부하 소자는 능동 부하 소자인 것을 특징으로 하는 집적 회로 트랜치 셀.
  5. 제 4 항에 있어서, 상기 부하 FET는 상부 쏘스/드레인 영역, 바닥 쏘스/드레인 영역, 상부와 바닥 소스/드레인 영역 사이의 채널 영역, 상기 채널 영역을 덮는 게이트 유전체, 상기 채널 영역에서부터 게이트 유전체를 향하게 되며 상기 게이트 유전체를 최소한의 부분적으로 덮는 게이트 전극을 가진 중심 수직 영역을 구비하며, 상기 바닥 쏘스/드레인 영역이 트랜치의 바닥층에서 쏘스/드레인 영역과 접촉하여 존재하는 것을 특징으로 하는 집적 회로 트랜치 셀.
  6. 제 1 항에 있어서, 상기 트랜치의 바닥층에서 상기 쏘스/드레인 영역이 도핑된 반도체 매입층 또는 도핑된 반도체 웨이퍼로 구성하는 그룹에서 선택된 반도체 소자를 구비하는 것을 특징으로 하는 집적 회로 트랜치 셀.
  7. 제 1 항에 있어서, 한 채널이 상기 벽의 상부 부분 근처의 쏘스/드레인 영역과 상기 트랜치의 바닥층에서 하나 사이에서 존재하며, 한 박막 게이트 유전층이 상기 트랜치 벽에 존재하며 상기 게이트 영역이 박막 게이트 유전층 상이 존재하는 것을 특징으로 하는 집적 회로 트랜치 셀.
  8. 제 1 항에 있어서, 제 2 측단 FET는 상기 트랜치벽의 상부 부분 근처에 상기 쏘스/드레인 영역과 공통으로 소스/드레인 영역을 가지는 것을 특징으로 하는 집적 회로 트랜치 셀.
  9. 제 1 항에 있어서, 상기 토랜치는 최소한 두 수직벽을 가지며, FET가 최소한 두 수직벽에서 존재하는 것을 특징으로 하는 집적 회로 트랜치 셀.
  10. 기판에 형성된 집적 회로 트랜치 셀에 있어서, 최소한 두 수직벽과 바닥층을 가진 트랜치와, 수직벽 중 두 곳에 각각 하나로, 최소한의 두 전계 효과 트랜지스터(FET)와, 상기 FET 사이의 트랜치 내에 상부 및 바닥 접촉을 가진 중심 부하 소자를 구비하는데, 상기 각 수직벽은 상부 부분을 가지며 상기 각각의 FET는 상기 벽의 상부 부분 근처에 하나와 트랜치의 바닥층에서 하나인 두 쏘스/드레인 영역과, 상기 벽에 따라 게이트영역을 가지며, 상기 바닥층에 쏘스/드레인 영역이 양 FET에 공통하며, 상기 바닥 접촉은 토랜치의 바닥층에서 공통 쏘스/드레인 영역과 전기적 접촉을 하는 것을 특징으로 하는 집적 회로 트랜치 셀.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890700829A 1987-05-11 1989-05-11 집적회로트랜치셀 KR0132577B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US07/095,809 US4890144A (en) 1987-09-14 1987-09-14 Integrated circuit trench cell
US95,809 1987-09-14
US095,809 1987-09-14
PCT/US1988/002723 WO1989002655A1 (en) 1987-09-14 1988-08-12 Integrated circuit trench cell

Publications (2)

Publication Number Publication Date
KR890702254A true KR890702254A (ko) 1989-12-23
KR0132577B1 KR0132577B1 (ko) 1998-04-16

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Application Number Title Priority Date Filing Date
KR1019890700829A KR0132577B1 (ko) 1987-05-11 1989-05-11 집적회로트랜치셀

Country Status (6)

Country Link
US (1) US4890144A (ko)
EP (1) EP0334927B1 (ko)
JP (1) JPH0817208B2 (ko)
KR (1) KR0132577B1 (ko)
DE (1) DE3886378T2 (ko)
WO (1) WO1989002655A1 (ko)

Families Citing this family (70)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07112067B2 (ja) * 1990-01-24 1995-11-29 株式会社東芝 半導体装置
US5021920A (en) * 1990-03-30 1991-06-04 Texas Instruments Incorporated Multilevel integrated circuit capacitor and method of fabrication
DE69125323T2 (de) * 1990-07-24 1997-09-25 Semiconductor Energy Lab Verfahren zum Herstellen isolierender Filme, Kapazitäten und Halbleiteranordnungen
US7335570B1 (en) 1990-07-24 2008-02-26 Semiconductor Energy Laboratory Co., Ltd. Method of forming insulating films, capacitances, and semiconductor devices
US5464780A (en) * 1990-07-25 1995-11-07 Semiconductor Energy Laboratory Co., Ltd. Method of forming insulated gate effect transistor in a substrate depression
US5222039A (en) * 1990-11-28 1993-06-22 Thunderbird Technologies, Inc. Static random access memory (SRAM) including Fermi-threshold field effect transistors
JPH04297067A (ja) * 1991-03-13 1992-10-21 Mitsubishi Electric Corp 半導体装置
US5122848A (en) * 1991-04-08 1992-06-16 Micron Technology, Inc. Insulated-gate vertical field-effect transistor with high current drive and minimum overlap capacitance
KR920022532A (ko) * 1991-05-13 1992-12-19 문정환 이중 수직 채널을 갖는 스태틱램 및 그 제조방법
KR970007589B1 (ko) * 1991-09-13 1997-05-10 니뽄 덴끼 가부시끼가이샤 정적 메모리 장치
JPH05206394A (ja) * 1992-01-24 1993-08-13 Mitsubishi Electric Corp 電界効果トランジスタおよびその製造方法
KR960010068B1 (ko) * 1992-09-03 1996-07-25 김주용 박막 트랜지스터 스태틱램(sram) 셀의 기생 다이오드 특성 개선 방법
US5285093A (en) * 1992-10-05 1994-02-08 Motorola, Inc. Semiconductor memory cell having a trench structure
US5324973A (en) * 1993-05-03 1994-06-28 Motorola Inc. Semiconductor SRAM with trench transistors
JP3635681B2 (ja) * 1994-07-15 2005-04-06 ソニー株式会社 バイアス回路の調整方法、電荷転送装置、及び電荷検出装置とその調整方法
US5426324A (en) * 1994-08-11 1995-06-20 International Business Machines Corporation High capacitance multi-level storage node for high density TFT load SRAMs with low soft error rates
US5698893A (en) * 1995-01-03 1997-12-16 Motorola, Inc. Static-random-access memory cell with trench transistor and enhanced stability
US5670803A (en) 1995-02-08 1997-09-23 International Business Machines Corporation Three-dimensional SRAM trench structure and fabrication method therefor
US5672524A (en) * 1995-08-01 1997-09-30 Advanced Micro Devices, Inc. Three-dimensional complementary field effect transistor process
US5705409A (en) * 1995-09-28 1998-01-06 Motorola Inc. Method for forming trench transistor structure
US5879971A (en) * 1995-09-28 1999-03-09 Motorola Inc. Trench random access memory cell and method of formation
JP3403877B2 (ja) * 1995-10-25 2003-05-06 三菱電機株式会社 半導体記憶装置とその製造方法
US5804470A (en) * 1996-10-23 1998-09-08 Advanced Micro Devices, Inc. Method of making a selective epitaxial growth circuit load element
JPH10290007A (ja) * 1997-04-14 1998-10-27 Sharp Corp 半導体装置およびその製造方法
TW429620B (en) 1997-06-27 2001-04-11 Siemens Ag SRAM cell arrangement and method for its fabrication
US5886382A (en) * 1997-07-18 1999-03-23 Motorola, Inc. Trench transistor structure comprising at least two vertical transistors
US6713345B1 (en) 1997-09-23 2004-03-30 Hyundai Electronics Industries Co., Ltd. Semiconductor memory device having a trench and a gate electrode vertically formed on a wall of the trench
KR100253321B1 (ko) * 1997-09-23 2000-04-15 김영환 반도체 메모리 소자의 구조 및 제조방법
US6316807B1 (en) 1997-12-05 2001-11-13 Naoto Fujishima Low on-resistance trench lateral MISFET with better switching characteristics and method for manufacturing same
EP0967654A1 (en) * 1998-06-26 1999-12-29 EM Microelectronic-Marin SA Non-volatile semiconductor memory device
US6368919B2 (en) * 1999-01-19 2002-04-09 Micron Technology, Inc. Method and composite for decreasing charge leakage
US6472767B1 (en) 1999-04-30 2002-10-29 Infineon Technologies Ag Static random access memory (SRAM)
US6265292B1 (en) * 1999-07-12 2001-07-24 Intel Corporation Method of fabrication of a novel flash integrated circuit
US6153902A (en) * 1999-08-16 2000-11-28 International Business Machines Corporation Vertical DRAM cell with wordline self-aligned to storage trench
DE10016444C2 (de) * 2000-03-29 2002-01-24 Infineon Technologies Ag Integrierte dreidimensionale Graben-SRAM-Speicherzelle
US6525372B2 (en) * 2000-11-16 2003-02-25 Silicon Wireless Corporation Vertical power devices having insulated source electrodes in discontinuous deep trenches
JP4236848B2 (ja) * 2001-03-28 2009-03-11 セイコーインスツル株式会社 半導体集積回路装置の製造方法
US7221011B2 (en) * 2001-09-07 2007-05-22 Power Integrations, Inc. High-voltage vertical transistor with a multi-gradient drain doping profile
US6573558B2 (en) * 2001-09-07 2003-06-03 Power Integrations, Inc. High-voltage vertical transistor with a multi-layered extended drain structure
US7786533B2 (en) 2001-09-07 2010-08-31 Power Integrations, Inc. High-voltage vertical transistor with edge termination structure
US6555873B2 (en) * 2001-09-07 2003-04-29 Power Integrations, Inc. High-voltage lateral transistor with a multi-layered extended drain structure
US6635544B2 (en) * 2001-09-07 2003-10-21 Power Intergrations, Inc. Method of fabricating a high-voltage transistor with a multi-layered extended drain structure
US7005338B2 (en) * 2002-09-19 2006-02-28 Promos Technologies Inc. Nonvolatile memory cell with a floating gate at least partially located in a trench in a semiconductor substrate
US6759699B1 (en) * 2003-04-22 2004-07-06 Taiwan Semiconductor Manufacturing Company Storage element and SRAM cell structures using vertical FETS controlled by adjacent junction bias through shallow trench isolation
US6977412B2 (en) 2003-09-05 2005-12-20 Micron Technology, Inc. Trench corner effect bidirectional flash memory cell
KR100537096B1 (ko) * 2003-12-27 2005-12-16 동부아남반도체 주식회사 수직형 트랜지스터의 제조방법
KR100526891B1 (ko) * 2004-02-25 2005-11-09 삼성전자주식회사 반도체 소자에서의 버티컬 트랜지스터 구조 및 그에 따른형성방법
DE102004028679A1 (de) * 2004-06-14 2006-01-05 Infineon Technologies Ag Isolationsgrabenanordnung
DE102004063991B4 (de) * 2004-10-29 2009-06-18 Infineon Technologies Ag Verfahren zur Herstellung von dotierten Halbleitergebieten in einem Halbleiterkörper eines lateralen Trenchtransistors
WO2006085267A2 (en) * 2005-02-08 2006-08-17 Nxp B.V. Semiconductor device with trench field plate
TWI269363B (en) * 2005-06-30 2006-12-21 Powerchip Semiconductor Corp Anti-punch-through semiconductor device and manufacturing method thereof
US7488664B2 (en) * 2005-08-10 2009-02-10 Micron Technology, Inc. Capacitor structure for two-transistor DRAM memory cell and method of forming same
US7557406B2 (en) 2007-02-16 2009-07-07 Power Integrations, Inc. Segmented pillar layout for a high-voltage vertical transistor
US8653583B2 (en) 2007-02-16 2014-02-18 Power Integrations, Inc. Sensing FET integrated with a high-voltage transistor
US7468536B2 (en) 2007-02-16 2008-12-23 Power Integrations, Inc. Gate metal routing for transistor with checkerboarded layout
US7595523B2 (en) 2007-02-16 2009-09-29 Power Integrations, Inc. Gate pullback at ends of high-voltage vertical transistor structure
US7859037B2 (en) 2007-02-16 2010-12-28 Power Integrations, Inc. Checkerboarded high-voltage vertical transistor layout
US7919800B2 (en) 2007-02-26 2011-04-05 Micron Technology, Inc. Capacitor-less memory cells and cell arrays
SG165252A1 (en) 2009-03-25 2010-10-28 Unisantis Electronics Jp Ltd Semiconductor device and production method therefor
JP5032532B2 (ja) * 2009-06-05 2012-09-26 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置及びその製造方法
JP5006378B2 (ja) 2009-08-11 2012-08-22 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置及びその製造方法
JP5006379B2 (ja) 2009-09-16 2012-08-22 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置
JP2011066109A (ja) * 2009-09-16 2011-03-31 Unisantis Electronics Japan Ltd 半導体記憶装置
US8592921B2 (en) 2011-12-07 2013-11-26 International Business Machines Corporation Deep trench embedded gate transistor
EP3050078A4 (en) * 2013-09-25 2017-05-17 Intel Corporation Methods of forming buried vertical capacitors and structures formed thereby
US10325988B2 (en) 2013-12-13 2019-06-18 Power Integrations, Inc. Vertical transistor device structure with cylindrically-shaped field plates
US9543396B2 (en) 2013-12-13 2017-01-10 Power Integrations, Inc. Vertical transistor device structure with cylindrically-shaped regions
US9425788B1 (en) 2015-03-18 2016-08-23 Infineon Technologies Austria Ag Current sensors and methods of improving accuracy thereof
US10446545B2 (en) * 2016-06-30 2019-10-15 Alpha And Omega Semiconductor Incorporated Bidirectional switch having back to back field effect transistors
CN109326595B (zh) 2017-07-31 2021-03-09 联华电子股份有限公司 半导体元件及其制作方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5768062A (en) * 1980-10-15 1982-04-26 Toshiba Corp Semiconductor integrated circuit device
JPS57178359A (en) * 1981-04-27 1982-11-02 Hitachi Ltd Semiconductor integrated circuit device
JPS583269A (ja) * 1981-06-30 1983-01-10 Fujitsu Ltd 縦型ｍｏｓダイナミツクメモリ−セル
JPS587860A (ja) * 1981-07-06 1983-01-17 Hitachi Ltd 半導体記憶装置
JPS59107563A (ja) * 1982-12-13 1984-06-21 Hitachi Ltd スタテイツク型半導体メモリ装置
JPS60161659A (ja) * 1984-02-01 1985-08-23 Hitachi Ltd 半導体集積回路装置
JPS60239052A (ja) * 1984-05-14 1985-11-27 Hitachi Ltd 半導体集積回路装置
JPS6126261A (ja) * 1984-07-16 1986-02-05 Nippon Telegr & Teleph Corp <Ntt> 縦形ｍｏｓ電界効果トランジスタの製造方法
JPS6135554A (ja) * 1984-07-28 1986-02-20 Nippon Telegr & Teleph Corp <Ntt> 読出し専用メモリ−およびその製造方法
US4651184A (en) * 1984-08-31 1987-03-17 Texas Instruments Incorporated Dram cell and array
US4713678A (en) * 1984-12-07 1987-12-15 Texas Instruments Incorporated dRAM cell and method
US4673962A (en) * 1985-03-21 1987-06-16 Texas Instruments Incorporated Vertical DRAM cell and method
US4704705A (en) * 1985-07-19 1987-11-03 Texas Instruments Incorporated Two transistor DRAM cell and array
US4689871A (en) * 1985-09-24 1987-09-01 Texas Instruments Incorporated Method of forming vertically integrated current source
US4686552A (en) * 1986-05-20 1987-08-11 Motorola, Inc. Integrated circuit trench cell
US4794561A (en) * 1987-07-02 1988-12-27 Integrated Device Technology, Inc. Static ram cell with trench pull-down transistors and buried-layer ground plate

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US4890144A (en) 1989-12-26
KR0132577B1 (ko) 1998-04-16
JPH02501251A (ja) 1990-04-26
DE3886378D1 (de) 1994-01-27
EP0334927A1 (en) 1989-10-04
EP0334927B1 (en) 1993-12-15
WO1989002655A1 (en) 1989-03-23
EP0334927A4 (en) 1990-03-12
DE3886378T2 (de) 1994-04-07
JPH0817208B2 (ja) 1996-02-21

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