JP5378070B2 - 半導体装置、表示装置及び電子機器 - Google Patents
半導体装置、表示装置及び電子機器 Download PDFInfo
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- JP5378070B2 JP5378070B2 JP2009134597A JP2009134597A JP5378070B2 JP 5378070 B2 JP5378070 B2 JP 5378070B2 JP 2009134597 A JP2009134597 A JP 2009134597A JP 2009134597 A JP2009134597 A JP 2009134597A JP 5378070 B2 JP5378070 B2 JP 5378070B2
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- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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Description
本実施の形態では、本発明の一態様である駆動回路について説明する。
本実施の形態では、上記実施の形態1と異なる構成の駆動回路について説明する。
本実施の形態では、本発明の一態様である駆動回路を用いた表示装置の構成について説明する。
本実施の形態では本発明の一態様である駆動回路を構成するトランジスタに適用可能なトランジスタの構成について説明する。
本実施の形態では、本発明の一態様である表示装置を表示部に用いた電子機器について説明する。
12 トランジスタ
13 トランジスタ
14 トランジスタ
15 トランジスタ
100 端子
101 端子
102 端子
102A 端子
102B 端子
103 端子
103A 端子
103B 端子
103C 端子
103D 端子
104 端子
104A 端子
104B 端子
104C 端子
104D 端子
104E 端子
104F 端子
104G 端子
104H 端子
104I 端子
104J 端子
104K 端子
104L 端子
104M 端子
105 端子
106 トランジスタ
107 トランジスタ
108 容量素子
109 トランジスタ
110 トランジスタ
111 トランジスタ
112 容量素子
113 トランジスタ
114 トランジスタ
115 トランジスタ
116 トランジスタ
117 ノード
118 ノード
119 ノード
120 トランジスタ
121 端子
122 トランジスタ
123 トランジスタ
124 トランジスタ
125 端子
126 トランジスタ
127 トランジスタ
128 トランジスタ
129 トランジスタ
201 制御信号
202 クロック信号
203 クロック信号
204 電位
205 電位
206 電位
207 出力信号
208 制御信号
209 出力信号
500 端子
501 端子
502 端子
502A 端子
502B 端子
503 端子
503A 端子
503B 端子
503C 端子
503D 端子
504 端子
504A 端子
504B 端子
504C 端子
504D 端子
504E 端子
504F 端子
504G 端子
504H 端子
504I 端子
504J 端子
504K 端子
505 端子
506 トランジスタ
507 トランジスタ
508 トランジスタ
509 トランジスタ
510 容量素子
511 トランジスタ
512 トランジスタ
513 トランジスタ
514 トランジスタ
515 ノード
516 ノード
517 トランジスタ
518 端子
519 トランジスタ
520 トランジスタ
521 トランジスタ
522 端子
523 トランジスタ
524 トランジスタ
525 トランジスタ
526 トランジスタ
601 制御信号
602 クロック信号
603 クロック信号
604 電位
605 電位
606 出力信号
607 制御信号
608 出力信号
700 画素部
701 信号線駆動回路
702 走査線駆動回路
703 制御回路
704 クロック信号生成回路
705 信号線
705A 信号線
705B 信号線
706 走査線
706A 走査線
706B 走査線
706C 走査線
706D 走査線
707 クロック信号線
708 クロック信号線
709 画素
710 フリップフロップ回路
710A フリップフロップ回路
710B フリップフロップ回路
710C フリップフロップ回路
710D フリップフロップ回路
750 画素
751 トランジスタ
752 液晶素子
753 容量素子
754 配線
755 配線
756 配線
757 配線
758 電極
801 開始信号
802 クロック信号
803 クロック信号
804 出力信号
805 出力信号
806 出力信号
807 出力信号
900 基板
901 不純物領域
902 半導体層
903 ゲート絶縁膜
904 ゲート電極
905a 電極
905b 電極
906 層間絶縁膜
907 基板
908 ゲート電極
910 ゲート絶縁膜
911 半導体層
912 半導体層
912a 半導体層
912b 半導体層
913a 電極
913b 電極
1000 基板
1001 ゲート電極
1002 ゲート絶縁膜
1003 微結晶半導体層
1004 バッファ層
1005a 半導体層
1005b 半導体層
1006a 電極
1006b 電極
1007 導電膜
1008 微結晶半導体膜
1009 非晶質半導体膜
1010 半導体膜
1011 導電膜
1101 筐体
1102 支持台
1103 表示部
1104 スピーカー部
1105 ビデオ入力端子
1111 本体
1112 表示部
1113 受像部
1114 操作キー
1115 外部接続ポート
1116 シャッターボタン
1121 本体
1122 筐体
1123 表示部
1124 キーボード
1125 外部接続ポート
1126 ポインティングデバイス
1131 本体
1132 表示部
1133 スイッチ
1134 操作キー
1135 赤外線ポート
1141 本体
1142 筐体
1143 表示部A
1144 表示部B
1145 読込部
1146 操作キー
1147 スピーカー部
1151 本体
1152 表示部
1153 アーム部
1161 本体
1162 表示部
1163 筐体
1164 外部接続ポート
1165 リモコン受信部
1166 受像部
1167 バッテリー
1168 音声入力部
1169 操作キー
1170 接眼部
1171 本体
1172 筐体
1173 表示部
1174 音声入力部
1175 音声出力部
1176 操作キー
1177 外部接続ポート
1178 アンテナ
1180 筐体
1181 筐体
1182 表示部
1183 スピーカー
1184 マイクロフォン
1185 操作キー
1186 ポインティングデバイス
1187 カメラ用レンズ
1188 外部接続端子
1189 イヤホン端子
1190 キーボード
1191 外部メモリスロット
1192 カメラ用レンズ
1193 ライト
Claims (7)
- 第1乃至第8のトランジスタを有し、
前記第1のトランジスタのソース又はドレインの一方は、第1の配線と電気的に接続され、
前記第1のトランジスタのゲートは、前記第1の配線と電気的に接続され、
前記第2のトランジスタのソース又はドレインの一方は、第2の配線と電気的に接続され、
前記第2のトランジスタのソース又はドレインの他方は、前記第1のトランジスタのソース又はドレインの他方と電気的に接続され、
前記第2のトランジスタのゲートは、第3の配線と電気的に接続され、
前記第3のトランジスタのソース又はドレインの一方は、前記第2の配線と電気的に接続され、
前記第3のトランジスタのソース又はドレインの他方は、前記第1のトランジスタのソース又はドレインの他方と電気的に接続され、
前記第4のトランジスタのソース又はドレインの一方は、前記第2の配線と電気的に接続され、
前記第4のトランジスタのソース又はドレインの他方は、前記第1のトランジスタのソース又はドレインの他方と電気的に接続され、
前記第5のトランジスタのソース又はドレインの一方は、第4の配線と電気的に接続され、
前記第5のトランジスタのソース又はドレインの他方は、第5の配線と電気的に接続され、
前記第5のトランジスタのゲートは、前記第1のトランジスタのソース又はドレインの他方と電気的に接続され、
前記第6のトランジスタのソース又はドレインの一方は、前記第2の配線と電気的に接続され、
前記第6のトランジスタのソース又はドレインの他方は、前記第5の配線と電気的に接続され、
前記第6のトランジスタのゲートは、前記第4のトランジスタのゲートと電気的に接続され、
前記第7のトランジスタのソース又はドレインの一方は、前記第2の配線と電気的に接続され、
前記第7のトランジスタのソース又はドレインの他方は、前記第5の配線と電気的に接続され、
前記第7のトランジスタのゲートは、第6の配線と電気的に接続され、
前記第8のトランジスタのソース又はドレインの一方は、前記第2の配線と電気的に接続され、
前記第8のトランジスタのソース又はドレインの他方は、前記第3のトランジスタのゲートと電気的に接続され、
前記第8のトランジスタのゲートは、前記第1の配線と電気的に接続されることを特徴とする半導体装置。 - 請求項1において、
前記第3のトランジスタがオンであり且つ前記第4のトランジスタがオフである第1の期間と、
前記第3のトランジスタがオフであり且つ前記第4のトランジスタがオンである第2の期間と、を有することを特徴とする半導体装置。 - 請求項1又は請求項2において、
前記第5のトランジスタがオフであり、且つ前記第2のトランジスタ、前記第3のトランジスタ又は前記第4のトランジスタの少なくとも一つがオンである第3の期間を有することを特徴とする半導体装置。 - 請求項1乃至請求項3のいずれか一項において、
前記第1乃至第8のトランジスタの少なくとも一の半導体層は、酸化物半導体を有することを特徴とする半導体装置。 - 請求項1乃至請求項4のいずれか一項において、
前記第1乃至第8のトランジスタの少なくとも一の半導体層は、結晶を有することを特徴とする半導体装置。 - 駆動回路と、画素と、を有し、
前記駆動回路は、前記画素と電気的に接続され、
前記駆動回路は、請求項1乃至請求項5のいずれか一項に記載の半導体装置を有する表示装置。 - 表示部と、
操作キー、スピーカ、アンテナ、又はバッテリと、
を有し、
前記表示部は、請求項6に記載の表示装置を有することを特徴とする電子機器。
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