DE69432604D1 - Verfahren für die herstellung eines halbleitersubstrates - Google Patents

Verfahren für die herstellung eines halbleitersubstrates

Info

Publication number
DE69432604D1
DE69432604D1 DE69432604T DE69432604T DE69432604D1 DE 69432604 D1 DE69432604 D1 DE 69432604D1 DE 69432604 T DE69432604 T DE 69432604T DE 69432604 T DE69432604 T DE 69432604T DE 69432604 D1 DE69432604 D1 DE 69432604D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor substrate
semiconductor
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69432604T
Other languages
English (en)
Other versions
DE69432604T2 (de
Inventor
Masaharu Tachimori
Takayuki Yano
Isao Hamaguchi
Tatsuo Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Nippon Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp
Application granted granted Critical
Publication of DE69432604D1 publication Critical patent/DE69432604D1/de
Publication of DE69432604T2 publication Critical patent/DE69432604T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26533—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers

Landscapes

  • Physics & Mathematics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
DE69432604T 1993-12-28 1994-12-28 Verfahren für die herstellung eines halbleitersubstrates Expired - Lifetime DE69432604T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP33789493 1993-12-28
JP05337894A JP3139904B2 (ja) 1993-12-28 1993-12-28 半導体基板の製造方法および製造装置
PCT/JP1994/002297 WO1995018462A1 (fr) 1993-12-28 1994-12-28 Procede et dispositif de fabrication d'un substrat a semi-conducteurs

Publications (2)

Publication Number Publication Date
DE69432604D1 true DE69432604D1 (de) 2003-06-05
DE69432604T2 DE69432604T2 (de) 2004-04-01

Family

ID=18313004

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69432604T Expired - Lifetime DE69432604T2 (de) 1993-12-28 1994-12-28 Verfahren für die herstellung eines halbleitersubstrates

Country Status (6)

Country Link
US (1) US5918151A (de)
EP (1) EP0738004B1 (de)
JP (1) JP3139904B2 (de)
KR (1) KR100199125B1 (de)
DE (1) DE69432604T2 (de)
WO (1) WO1995018462A1 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6090689A (en) * 1998-03-04 2000-07-18 International Business Machines Corporation Method of forming buried oxide layers in silicon
US6121624A (en) * 1998-08-24 2000-09-19 Lucent Technologies, Inc. Method for controlled implantation of elements into the surface or near surface of a substrate
JP2001297989A (ja) * 2000-04-14 2001-10-26 Mitsubishi Electric Corp 半導体基板及びその製造方法並びに半導体装置及びその製造方法
EP1852908A1 (de) * 2000-05-03 2007-11-07 Ibis Technology, Inc. Implantationsverfahren mit substöchiometrischen Luftmengen bei verschiedenen Energien
US6417078B1 (en) * 2000-05-03 2002-07-09 Ibis Technology Corporation Implantation process using sub-stoichiometric, oxygen doses at different energies
KR100366923B1 (ko) * 2001-02-19 2003-01-06 삼성전자 주식회사 에스오아이 기판 및 이의 제조방법
JP2002289552A (ja) * 2001-03-28 2002-10-04 Nippon Steel Corp Ｓｉｍｏｘ基板の製造方法およびｓｉｍｏｘ基板
JP2002299591A (ja) * 2001-03-30 2002-10-11 Toshiba Corp 半導体装置
US20030211711A1 (en) * 2002-03-28 2003-11-13 Hirofumi Seki Wafer processing method and ion implantation apparatus
AU2003303886A1 (en) * 2003-02-03 2004-08-30 Sumitomo Mitsubishi Silicon Corporation Method for inspection, process for making analytic piece, method for analysis, analyzer, process for producing soi wafer, and soi wafer
US7062813B2 (en) * 2003-03-12 2006-06-20 Spx Dock Products, Inc. Support leg system and method for supporting a dock leveler
JP2007005563A (ja) * 2005-06-23 2007-01-11 Sumco Corp Ｓｉｍｏｘウェーハの製造方法
US7391038B2 (en) * 2006-03-21 2008-06-24 Varian Semiconductor Equipment Associates, Inc. Technique for isocentric ion beam scanning
JP5487565B2 (ja) * 2008-06-19 2014-05-07 株式会社Ｓｕｍｃｏ エピタキシャルウェーハおよびその製造方法
FR2934925B1 (fr) * 2008-08-06 2011-02-25 Soitec Silicon On Insulator Procede de fabrication d'une structure comprernant une etape d'implantations d'ions pour stabiliser l'interface de collage.
JP2010062503A (ja) * 2008-09-08 2010-03-18 Sumco Corp Ｓｉｍｏｘウェーハの結晶欠陥の低減方法及びｓｉｍｏｘウェーハ
JP2010118382A (ja) * 2008-11-11 2010-05-27 Sumco Corp Ｓｉｍｏｘウェーハの結晶欠陥の低減方法
GB2518619B (en) * 2013-09-25 2016-08-10 G E & R Hellen Ltd Removing a retaining pin
US10720357B2 (en) * 2018-03-01 2020-07-21 Varian Semiconductor Equipment Associates, Inc. Method of forming transistor device having fin cut regions

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4939233A (de) * 1972-08-21 1974-04-12
JPS5674929A (en) * 1979-11-22 1981-06-20 Nippon Telegr & Teleph Corp <Ntt> Insulating layer forming method
JPS5860556A (ja) * 1981-10-06 1983-04-11 Fujitsu Ltd 半導体装置の製法
KR860700314A (ko) * 1984-09-28 1986-08-01 빈센트 죠셉로너 반도체 소자 및 그 제조방법
US4676841A (en) * 1985-09-27 1987-06-30 American Telephone And Telegraph Company, At&T Bell Laboratories Fabrication of dielectrically isolated devices utilizing buried oxygen implant and subsequent heat treatment at temperatures above 1300° C.
JPH077748B2 (ja) * 1986-07-01 1995-01-30 富士通株式会社 半導体装置の製造方法
FR2616590B1 (fr) * 1987-06-15 1990-03-02 Commissariat Energie Atomique Procede de fabrication d'une couche d'isolant enterree dans un substrat semi-conducteur par implantation ionique et structure semi-conductrice comportant cette couche
JPS6437835A (en) * 1987-08-04 1989-02-08 Nec Corp Formation of layer of semiconductor device through ion implantation
JPH0254562A (ja) * 1988-08-18 1990-02-23 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPH0756881B2 (ja) * 1988-10-11 1995-06-14 三菱電機株式会社 埋込み酸化膜の形成方法
US5080730A (en) * 1989-04-24 1992-01-14 Ibis Technology Corporation Implantation profile control with surface sputtering
JPH02284341A (ja) * 1989-04-24 1990-11-21 Fuji Electric Co Ltd イオン打込み装置
JPH03240230A (ja) * 1990-02-19 1991-10-25 Fujitsu Ltd 半導体装置の製造方法
JPH04737A (ja) * 1990-04-17 1992-01-06 Fujitsu Ltd 半導体装置の製造方法
JP3012673B2 (ja) * 1990-08-21 2000-02-28 三菱電機株式会社 半導体装置の製造方法
JP2838444B2 (ja) * 1991-02-05 1998-12-16 三菱電機株式会社 シリコン基板中に埋込絶縁膜を形成する方法
JP2607399B2 (ja) * 1991-02-19 1997-05-07 日本電信電話株式会社 半導体基板の製造方法
JPH0547342A (ja) * 1991-08-20 1993-02-26 Nissin Electric Co Ltd イオン注入制御装置
US5441899A (en) * 1992-02-18 1995-08-15 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing substrate having semiconductor on insulator
JPH05291543A (ja) * 1992-04-15 1993-11-05 Fujitsu Ltd 半導体装置の製造方法
US5661043A (en) * 1994-07-25 1997-08-26 Rissman; Paul Forming a buried insulator layer using plasma source ion implantation
JP3204855B2 (ja) * 1994-09-30 2001-09-04 新日本製鐵株式会社 半導体基板の製造方法

Also Published As

Publication number Publication date
EP0738004A4 (de) 1997-04-16
DE69432604T2 (de) 2004-04-01
EP0738004A1 (de) 1996-10-16
US5918151A (en) 1999-06-29
WO1995018462A1 (fr) 1995-07-06
JP3139904B2 (ja) 2001-03-05
KR100199125B1 (ko) 1999-06-15
EP0738004B1 (de) 2003-05-02
JPH07201975A (ja) 1995-08-04

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