DE69511343T2 - Verfahren zur Herstellung eines für IGBT geeigneten Halbleiterplättchens - Google Patents

Verfahren zur Herstellung eines für IGBT geeigneten Halbleiterplättchens

Info

Publication number
DE69511343T2
DE69511343T2 DE69511343T DE69511343T DE69511343T2 DE 69511343 T2 DE69511343 T2 DE 69511343T2 DE 69511343 T DE69511343 T DE 69511343T DE 69511343 T DE69511343 T DE 69511343T DE 69511343 T2 DE69511343 T2 DE 69511343T2
Authority
DE
Germany
Prior art keywords
igbt
producing
semiconductor die
die suitable
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69511343T
Other languages
English (en)
Other versions
DE69511343D1 (de
Inventor
Masatake Katayama
Isao Moroga
Isao Shirai
Youichi Kumaki
Akio Kasahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Application granted granted Critical
Publication of DE69511343D1 publication Critical patent/DE69511343D1/de
Publication of DE69511343T2 publication Critical patent/DE69511343T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333Vertical insulated gate bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185Joining of semiconductor bodies for junction formation
    • H01L21/187Joining of semiconductor bodies for junction formation by direct bonding
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/135Removal of substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE69511343T 1994-08-31 1995-08-30 Verfahren zur Herstellung eines für IGBT geeigneten Halbleiterplättchens Expired - Fee Related DE69511343T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06230476A JP3113156B2 (ja) 1994-08-31 1994-08-31 半導体基板の製造方法

Publications (2)

Publication Number Publication Date
DE69511343D1 DE69511343D1 (de) 1999-09-16
DE69511343T2 true DE69511343T2 (de) 2000-03-30

Family

ID=16908414

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69511343T Expired - Fee Related DE69511343T2 (de) 1994-08-31 1995-08-30 Verfahren zur Herstellung eines für IGBT geeigneten Halbleiterplättchens

Country Status (4)

Country Link
US (1) US5696034A (de)
EP (1) EP0702401B1 (de)
JP (1) JP3113156B2 (de)
DE (1) DE69511343T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19860581A1 (de) * 1998-12-29 2000-07-06 Asea Brown Boveri Halbleiterelement und Verfahren zur Herstellung
US6482681B1 (en) * 2000-05-05 2002-11-19 International Rectifier Corporation Hydrogen implant for buffer zone of punch-through non epi IGBT
DE10031781A1 (de) * 2000-07-04 2002-01-17 Abb Semiconductors Ag Baden Halbleiterbauelement und Verfahren zu dessen Herstellung
US8685427B2 (en) * 2002-07-31 2014-04-01 Boston Scientific Scimed, Inc. Controlled drug delivery
US8920826B2 (en) 2002-07-31 2014-12-30 Boston Scientific Scimed, Inc. Medical imaging reference devices
CN102054690B (zh) * 2010-11-22 2012-10-17 复旦大学 一种用于制造大功率器件的半导体衬底的制造方法
JPWO2014041736A1 (ja) * 2012-09-13 2016-08-12 パナソニックIpマネジメント株式会社 窒化物半導体構造物
CN104112663A (zh) * 2013-04-18 2014-10-22 比亚迪股份有限公司 一种半导体结构及其形成方法
CN107845570B (zh) * 2017-11-09 2019-02-12 四川广瑞半导体有限公司 绝缘栅双极型晶体管的硅外延片生产工艺
CN107845695B (zh) * 2017-12-08 2024-01-16 苏州矩阵光电有限公司 一种晶体外延结构及生长方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1286511B (de) * 1964-12-19 1969-01-09 Telefunken Patent Verfahren zum Herstellen eines Halbleiterkoerpers mit einem niederohmigen Substrat
JPS5392673A (en) * 1977-01-24 1978-08-14 Mitsubishi Electric Corp Manufacture of semiconductor
JPS5394778A (en) * 1977-01-31 1978-08-19 Toshiba Corp Manufacture of semiconductor device
JPS60157254A (ja) * 1984-01-26 1985-08-17 Meidensha Electric Mfg Co Ltd ゲ−トタ−ンオフサイリスタ構造及びその製造方法
JPS60171722A (ja) * 1984-02-17 1985-09-05 Toshiba Corp 半導体素子の製造方法
JPH0724312B2 (ja) * 1988-06-10 1995-03-15 三菱電機株式会社 半導体装置の製造方法
JP2645478B2 (ja) * 1988-10-07 1997-08-25 富士通株式会社 半導体装置の製造方法
JPH04286163A (ja) * 1991-03-14 1992-10-12 Shin Etsu Handotai Co Ltd 半導体基板の製造方法
JP2911694B2 (ja) * 1992-10-29 1999-06-23 信越半導体株式会社 半導体基板及びその製造方法

Also Published As

Publication number Publication date
JPH0878679A (ja) 1996-03-22
US5696034A (en) 1997-12-09
JP3113156B2 (ja) 2000-11-27
EP0702401A2 (de) 1996-03-20
EP0702401B1 (de) 1999-08-11
DE69511343D1 (de) 1999-09-16
EP0702401A3 (de) 1996-07-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee