DE69204386D1 - Verfahren zur Herstellung eines polykristallinen Siliziumfilmes. - Google Patents

Verfahren zur Herstellung eines polykristallinen Siliziumfilmes.

Info

Publication number
DE69204386D1
DE69204386D1 DE69204386T DE69204386T DE69204386D1 DE 69204386 D1 DE69204386 D1 DE 69204386D1 DE 69204386 T DE69204386 T DE 69204386T DE 69204386 T DE69204386 T DE 69204386T DE 69204386 D1 DE69204386 D1 DE 69204386D1
Authority
DE
Germany
Prior art keywords
production
polycrystalline silicon
silicon film
polycrystalline
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69204386T
Other languages
English (en)
Other versions
DE69204386T2 (de
Inventor
Toru Tatsumi
Akira Sakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69204386D1 publication Critical patent/DE69204386D1/de
Application granted granted Critical
Publication of DE69204386T2 publication Critical patent/DE69204386T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/84—Electrodes with an enlarged surface, e.g. formed by texturisation being a rough surface, e.g. using hemispherical grains
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69204386T 1991-06-21 1992-06-22 Verfahren zur Herstellung eines polykristallinen Siliziumfilmes. Expired - Lifetime DE69204386T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP14912891 1991-06-21
JP16854191 1991-07-10
JP17823291 1991-07-18

Publications (2)

Publication Number Publication Date
DE69204386D1 true DE69204386D1 (de) 1995-10-05
DE69204386T2 DE69204386T2 (de) 1996-05-15

Family

ID=27319686

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69204386T Expired - Lifetime DE69204386T2 (de) 1991-06-21 1992-06-22 Verfahren zur Herstellung eines polykristallinen Siliziumfilmes.

Country Status (5)

Country Link
US (1) US5385863A (de)
EP (1) EP0521644B1 (de)
JP (1) JP2508948B2 (de)
KR (1) KR960012256B1 (de)
DE (1) DE69204386T2 (de)

Families Citing this family (87)

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US5623243A (en) * 1990-03-20 1997-04-22 Nec Corporation Semiconductor device having polycrystalline silicon layer with uneven surface defined by hemispherical or mushroom like shape silicon grain
EP0486047B1 (de) * 1990-11-16 1999-09-01 Seiko Epson Corporation Verfahren zur Herstellung einer Dünnfilm-Halbleiteranordnung
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DE4419074C2 (de) * 1993-06-03 1998-07-02 Micron Semiconductor Inc Verfahren zum gleichmäßigen Dotieren von polykristallinem Silizium mit halbkugelförmiger Körnung
JP3313840B2 (ja) * 1993-09-14 2002-08-12 富士通株式会社 半導体装置の製造方法
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US6121081A (en) * 1994-11-15 2000-09-19 Micron Technology, Inc. Method to form hemi-spherical grain (HSG) silicon
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JP2833545B2 (ja) * 1995-03-06 1998-12-09 日本電気株式会社 半導体装置の製造方法
US5856007A (en) * 1995-07-18 1999-01-05 Sharan; Sujit Method and apparatus for forming features in holes, trenches and other voids in the manufacturing of microelectronic devices
KR100224710B1 (ko) 1995-10-10 1999-10-15 윤종용 반도체 장치의 커패시터 제조 방법
US5801104A (en) * 1995-10-24 1998-09-01 Micron Technology, Inc. Uniform dielectric film deposition on textured surfaces
US5612558A (en) * 1995-11-15 1997-03-18 Micron Technology, Inc. Hemispherical grained silicon on refractory metal nitride
US6015986A (en) 1995-12-22 2000-01-18 Micron Technology, Inc. Rugged metal electrodes for metal-insulator-metal capacitors
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US5691228A (en) * 1996-01-18 1997-11-25 Micron Technology, Inc. Semiconductor processing method of making a hemispherical grain (HSG) polysilicon layer
US5721171A (en) * 1996-02-29 1998-02-24 Micron Technology, Inc. Method for forming controllable surface enhanced three dimensional objects
JP2795313B2 (ja) * 1996-05-08 1998-09-10 日本電気株式会社 容量素子及びその製造方法
JPH09298284A (ja) * 1996-05-09 1997-11-18 Nec Corp 半導体容量素子の形成方法
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KR100200705B1 (ko) * 1996-06-08 1999-06-15 윤종용 반도체 디바이스 제조장치, 제조장치의 공정 조건 조절방법 및 이를 이용한 커패시터 제조방법
KR100230363B1 (ko) * 1996-06-28 1999-11-15 윤종용 반도체장치의 커패시터 제조방법
JP3105788B2 (ja) * 1996-07-15 2000-11-06 日本電気株式会社 半導体装置の製造方法
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US6218260B1 (en) * 1997-04-22 2001-04-17 Samsung Electronics Co., Ltd. Methods of forming integrated circuit capacitors having improved electrode and dielectric layer characteristics and capacitors formed thereby
JP2982739B2 (ja) * 1997-04-22 1999-11-29 日本電気株式会社 半導体装置の製造方法
JP3024589B2 (ja) * 1997-04-23 2000-03-21 日本電気株式会社 半導体装置の製造方法
KR100255662B1 (ko) * 1997-05-03 2000-05-01 윤종용 반구형그레인의다결정실리콘막을갖는반도체장치의제조방법
KR100247931B1 (ko) * 1997-05-21 2000-03-15 윤종용 반구형 그레인의 다결정실리콘막을 갖는 반도체장치의 제조방법
US6245632B1 (en) * 1997-05-22 2001-06-12 Samsung Electronics Co., Ltd. Variable temperature methods of forming hemispherical grained silicon (HSG-Si) layers
KR100234380B1 (ko) * 1997-06-11 1999-12-15 윤종용 반구형 그레인의 실리콘막을 갖는 반도체장치의 제조방법
JP3796030B2 (ja) 1997-11-16 2006-07-12 キヤノンアネルバ株式会社 薄膜作成装置
KR100258096B1 (ko) * 1997-12-01 2000-06-01 정선종 에스오아이(soi) 기판 제조방법
US5885867A (en) * 1997-12-03 1999-03-23 Samsung Electronics Co., Ltd. Methods of forming hemispherical grained silicon layers including anti-nucleation gases
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US6133109A (en) * 1997-12-29 2000-10-17 Samsung Electronics Co., Ltd. Method for manufacturing a DRAM cell capacitor
KR100440886B1 (ko) * 1997-12-30 2004-09-18 주식회사 하이닉스반도체 반도체 소자의 전하저장전극 형성 방법
JP3191757B2 (ja) 1998-02-03 2001-07-23 日本電気株式会社 半導体装置の製造方法
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KR100327123B1 (ko) 1998-03-30 2002-08-24 삼성전자 주식회사 디램셀캐패시터의제조방법
KR100296652B1 (ko) * 1998-04-09 2001-10-27 윤종용 반도체장치의제조방법
US5930625A (en) * 1998-04-24 1999-07-27 Vanguard International Semiconductor Corporation Method for fabricating a stacked, or crown shaped, capacitor structure
JP3244049B2 (ja) 1998-05-20 2002-01-07 日本電気株式会社 半導体装置の製造方法
US5837582A (en) * 1998-05-22 1998-11-17 Taiwan Semiconductor Manufacturing Company, Ltd. Method to increase capacitance of a DRAM cell
KR100283192B1 (ko) * 1998-06-09 2001-04-02 윤종용 반구형결정가입자들을갖는캐패시터의제조방법
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JP3468347B2 (ja) 1998-06-22 2003-11-17 日本エー・エス・エム株式会社 半導体素子の製造方法
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KR101027485B1 (ko) 2001-02-12 2011-04-06 에이에스엠 아메리카, 인코포레이티드 반도체 박막 증착을 위한 개선된 공정
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JP4617795B2 (ja) * 2004-09-22 2011-01-26 Ｊｓｒ株式会社 シリコン膜の形成方法
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TWI711728B (zh) * 2016-08-29 2020-12-01 聯華電子股份有限公司 形成晶格結構的方法
CN113228282B (zh) * 2021-03-29 2023-12-05 长江存储科技有限责任公司 用于增大半导体器件中的多晶硅晶粒尺寸的阶梯式退火工艺

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Also Published As

Publication number Publication date
US5385863A (en) 1995-01-31
DE69204386T2 (de) 1996-05-15
JPH05304273A (ja) 1993-11-16
KR960012256B1 (ko) 1996-09-18
EP0521644A1 (de) 1993-01-07
EP0521644B1 (de) 1995-08-30
JP2508948B2 (ja) 1996-06-19

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