US20020045328A1 - Method of manufacturing a semiconductor integrated circuit device - Google Patents

Method of manufacturing a semiconductor integrated circuit device Download PDF

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Publication number
US20020045328A1
US20020045328A1 US09/941,835 US94183501A US2002045328A1 US 20020045328 A1 US20020045328 A1 US 20020045328A1 US 94183501 A US94183501 A US 94183501A US 2002045328 A1 US2002045328 A1 US 2002045328A1
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US
United States
Prior art keywords
semiconductor
accommodating container
container
semiconductor substrate
opener
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US09/941,835
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English (en)
Inventor
Yoshiaki Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Assigned to HITACHI, LTD. reassignment HITACHI, LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KOBAYASHI, YOSHIAKI
Publication of US20020045328A1 publication Critical patent/US20020045328A1/en
Assigned to RENESAS TECHNOLOGY CORPORATION reassignment RENESAS TECHNOLOGY CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HITACHI, LTD.
Priority to US10/932,237 priority Critical patent/US7172981B2/en
Priority to US11/698,107 priority patent/US7390758B2/en
Priority to US12/123,584 priority patent/US8119547B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67763—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
    • H01L21/67772—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading involving removal of lid, door, cover
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67763—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
    • H01L21/67775—Docking arrangements
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/909—Controlled atmosphere

Definitions

  • the present invention relates to a technique for manufacturing a semiconductor integrated circuit device. More specifically, the present invention relates to a technique effectively applied to a static elimination technique of a semiconductor substrate and an accommodating technique of a closed type.
  • a transport apparatus which is capable of transporting a semiconductor substrate into a reactor that grows a predetermined semiconductor layer, without bringing out the semiconductor substrate outside the system thereof. Ion of predetermined gas is generated in predetermined atmosphere and thereby a semiconductor substrate in the transport apparatus is static-eliminated.
  • FOUP Front Opening Unified Pod
  • OC Open Cassette
  • the FOUP comprises a container body having an opening for carrying in or out the semiconductor substrates, and a cover for closing this opening.
  • the container body is sealed by closing the cover.
  • an ionizer used as a static eliminator is installed above a load port in a semiconductor manufacturing apparatus. Accordingly, it is impossible to static-eliminate the semiconductor substrates after disposition thereof, by a semiconductor manufacturing apparatus, or an inspecting apparatus, or a transport robot handling section (hereafter referred to as a robot hand) provided in a semiconductor manufacturing apparatus, or the like.
  • the FOUP which is a sealed semiconductor-accommodating container for the semiconductor substrates having a diameter of 300 mm
  • SEMI semiconductor Equipment and Materials International
  • a cover 220 of the semiconductor-accommodating container 200 may be retracted up to 1 mm from the front external periphery of a container body 210 .
  • the container length L of the entire semiconductor-accommodating container 200 may be a minimum value of 165 mm.
  • the container length L is often adjusted to be 165.5 mm for the container.
  • the opener 120 can not close adhere to the cover 220 of the semiconductor-accommodating container 200 .
  • a rotary key 121 cannot be satisfactorily inserted into the cover 220 .
  • Rotation of the rotary key 121 causes damage to a plate located in the side of an exposure surface 220 a of the cover 220 , and can unsatisfactorily rotate a key groove 221 of side of the cover 220 .
  • An object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit device for decreasing foreign materials that adhere to a semiconductor substrate and for improving a yield.
  • an object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit device for decreasing handling errors and for increasing an operating ratio of manufacturing a semiconductor manufacturing apparatus.
  • an object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit device for eliminating a damage to a semiconductor substrate, which is caused by discharge, and for improving a yield.
  • an object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit device for eliminating a damage to a semiconductor-accommodating container and for extending an useful period.
  • an object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit device for decreasing errors in opening or closing a semiconductor-accommodating container and for reducing inactive time on a semiconductor manufacturing apparatus and a productive line.
  • the present invention is one that a sealed type semiconductor-accommodating container accommodating a semiconductor substrate is set on a load port of a semiconductor manufacturing apparatus, and that the semiconductor substrate taken out of this semiconductor-accommodating container is processed by a treatment section in a transport area between said load port and treatment area, and the semiconductor substrate processed by said treatment section is static-eliminated and is accommodated in said semiconductor-accommodating container positioned on the load port.
  • the present invention comprises the steps of: linking an internal space of a first sealed type semiconductor-accommodating container which accommodates and is filled with a plurality of wafers grounded, to a local cleaning chamber of a first wafer treatment apparatus with cleanliness kept; transporting at least of one of said plurality of wafers accommodated in said first semiconductor-accommodating container under said linking state by means of a transport mechanism provided in said local cleaning chamber, and thereby accommodating the at least one in a wafer treatment section of said first wafer treatment apparatus; executing a first treatment relative to said wafer accommodated in said first wafer treatment section; transporting said processed wafer by said transport mechanism after said step (c), and thereby accommodating said processed wafer grounded in said first semiconductor-accommodating container; static-eliminating said processed wafer after said step (c) and before the step (d), or during the step (d); and releasing the linking state between said first semiconductor-accommodating container and said local cleaning chamber after said step (d), and thereby returning said first semiconductor-
  • the present invention is one that a semiconductor-accommodating container is located on a stage of a semiconductor-accommodating container opening/closing apparatus provided with an opener having a connection surface projecting from the surface of a surface plate, and the connection surface of said opener is closely brought into contact with an exposed surface of a semiconductor-accommodating container of said cover, and said cover is held by said opener, and said cover is opened or closed, and thereby said semiconductor substrate is carried in or out.
  • the present invention comprises the steps of: locating a semiconductor-accommodating container on a stage of a semiconductor-accommodating container opening/closing apparatus, wherein said semiconductor-accommodating container opening/closing apparatus comprises said stage capable of locating said semiconductor-accommodating container accommodating a semiconductor substrate, an opener for opening or closing a cover of said semiconductor-accommodating container, and a surface plate in which an opening portion for locating said opener is formed, such that a connection surface of said opener projects over 0.25 mm from a surface of said surface plate; closely bringing the connection surface of said opener into contact with an exposed surface of said cover, and holding said cover by said opener, vertically moving said cover relative to an opening surface of said semiconductor-accommodating container by said opener, and opening said cover, and connecting an opening portion of said semiconductor-accommodating container and an opening portion of said surface plate of said semiconductor-accommodating container opening/closing apparatus to each other; and carrying said semiconductor substrate into or from semiconductor-accommodating container
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device further comprises a step of preventing said semiconductor substrate from being contaminated in chemical, by said chemical filter in said transport area, before and after process of said semiconductor substrate in said treatment section.
  • a method of manufacturing a semiconductor integrated circuit device further comprises a step of single-wafer-processing said semiconductor substrate in said treatment section of said semiconductor manufacturing apparatus.
  • a method of manufacturing a semiconductor integrated circuit device wherein, during a single wafer process of said semiconductor substrate in said treatment section of said semiconductor manufacturing apparatus, a semiconductor substrate to be next-processed waits in a load lock chamber of said semiconductor manufacturing apparatus.
  • a method of manufacturing a semiconductor integrated circuit device further comprises a step of moving vertically said cover relative to an opening surface of said semiconductor-accommodating container by said opener of said semiconductor-accommodating container opening/closing apparatus, and opening said cover, and carrying in or out said semiconductor substrate while said semiconductor substrate is carried in or out into said semiconductor-accommodating container.
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • said overlap amount of each of all semiconductor-accommodating containers moving on a semiconductor manufacturing line is more than zero.
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • said overlap amount of each of all semiconductor-accommodating containers moving on a semiconductor manufacturing line is more than zero and 1.25 mm or less.
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a rate of no close contact portion between the connection surface of said opener and the exposed surface of said cover is 1% or less out of all semiconductor-accommodating containers moving on a semiconductor manufacturing line when said opener holds said cover in said step (b).
  • a method of manufacturing a semiconductor integrated circuit device comprises the steps of:
  • a method of manufacturing a semiconductor integrated circuit device further comprises a step of closely bringing the connection surface of said opener into contact with the exposed surface of said cover, and retreating said cover by said opener when said opener holds said cover of said semiconductor-accommodating container.
  • a method of manufacturing a semiconductor integrated circuit device according to item 18, further comprises a step of single-wafer-processing said semiconductor substrate in a treatment section of said semiconductor manufacturing apparatus.
  • [0185] 28 A method of manufacturing a semiconductor integrated circuit device according to item 27, wherein, during a single wafer process of said semiconductor substrate in said treatment section of said semiconductor manufacturing apparatus, a semiconductor substrate to be next-processed waits in a load lock chamber of said semiconductor manufacturing apparatus.
  • FIGS. 1A and B are external perspective views showing a structural example of a semiconductor-accommodating container opening/closing apparatus used for the method of manufacturing a semiconductor integrated circuit device according to embodiment 1 of the present invention, wherein FIG. 1A shows a front structure and FIG. 1B illustrates a rear structure.
  • FIG. 2 is a perspective view showing a structural example of a semiconductor-accommodating container (FOUP) used for the method of manufacturing a semiconductor integrated circuit device according to embodiment 1 of the present invention.
  • FOUP semiconductor-accommodating container
  • FIG. 3 is a partial perspective view showing a structural example of a semiconductor manufacturing apparatus equipped with the semiconductor-accommodating container opening/closing apparatus as shown in FIG. 1.
  • FIG. 4 is a side view showing an internal structure of the semiconductor manufacturing apparatus as shown in FIG. 3.
  • FIG. 5 is a plan view showing an internal structure of the semiconductor manufacturing apparatus as shown in FIG. 3.
  • FIG. 6 is a flowchart exemplifying a transport sequence for semiconductor substrates in the method of manufacturing a semiconductor integrated circuit device according to embodiment 1 of the present invention.
  • FIG. 7 is a side view showing an internal structure of a semiconductor manufacturing apparatus as a modification to the semiconductor manufacturing apparatus as shown in FIG. 4.
  • FIG. 8 is a partial side view showing an elevator operation of the semiconductor-accommodating container opening/closing apparatus using the semiconductor-accommodating container as a modification to the semiconductor-accommodating container shown in FIG. 2.
  • FIG. 9 is a partial plan view showing an example of a step between an opener's connection surface and a surface plate's surface used for the method of manufacturing a semiconductor integrated circuit device according to embodiment 2 of the present invention.
  • FIG. 10 is a partial plan view showing an example of an overlap amount between an opener's connection surface and a semiconductor-accommodating container's exposed surface in the semiconductor-accommodating container opening/closing apparatus according to embodiment 2 of the present invention.
  • FIG. 11 is a partial side view showing an example of holding the opener of the semiconductor manufacturing apparatus in FIG. 10.
  • FIG. 12 is a partial plan view showing relationship between the semiconductor-accommodating container opening/closing apparatus and the semiconductor-accommodating container in the comparative example for embodiment 2.
  • a semiconductor substrate or a semiconductor wafer means a silicon single-crystal substrate, an SOI (Silicon On Insulator) substrate (generally disk-shaped), a sapphire substrate, a glass substrate, other insulating or semi-insulating or semiconductor substrates or the like, or a composite substrate thereof.
  • a semiconductor integrated circuit device described in the present application also means a semiconductor such as a silicon wafer, a sapphire substrate or the like; something formed on an insulating substrate; or something formed on other insulating substrates made from glasses or the like such as TFT (Thin Film Transistor) and STN (Super Twisted Nematic) liquid crystals and the like, particularly except for the cases specified.
  • Semiconductor-accommodating container This means a container for accommodating a plurality of semiconductor substrates.
  • a FOUP means a sealed type container comprising a cover and a container body.
  • Facial reference surface This means to divide the semiconductor substrate into two parts and means a vertical surface parallel to a front side (which the semiconductor substrate is removed from or inserted into) of the semiconductor-accommodating container.
  • Semiconductor-accommodating container opening/closing apparatus This means an apparatus for opening and closing a cover of a wafer-accommodating container such as FOUP, and, for example, comprises a metal plate or the like called an opener.
  • a wafer treatment section means an apparatus portion for accommodating wafers therein and performing predetermined treatment similarly to a plasma reaction chamber in a dry etching apparatus, and generally does not include a transport section or a wait section for only carrying the wafers thereto.
  • Transport area This means a section of mainly carrying in or out wafers between a semiconductor-accommodating container such as FOUP and the wafer treatment section, and, for example, means a region or the like between a load port and the wafer treatment section. Accordingly, in the case where there is provided an auxiliary treatment section for prealignment, etc., such the section is generally included in the transport area, too.
  • Ionizer This means an apparatus for generating positive and negative ions by ionizing ambient atmosphere gas. In semiconductor industries, the ionizer is often used for static-eliminating wafers generally by neutralizing predetermined portions. Concretely, the ionizer means an apparatus for generating a corona discharge by applying high voltage to a needle-shaped or narrow line-shaped electrode, and for ionizing positively or negatively ambient air, and for neutralizing electric charges on the surface of an electrically charged object by using a reversed-polarity ion.
  • Fan filter unit This means an air cleaner integrating a small air blower into a ULPA (Ultra Low Penetration Air) filter.
  • the ULPA filter is air filter having a particle collecting ratio of 99.9995% or more relative to a particle having a diameter of 0.15 ⁇ m at a rated air flow.
  • Chemical filter This means a filter having a purpose of removing gaseous pollutant in air.
  • reference to shapes, positional relationship or the like of the components or the like includes ones substantially similar or closely akin to the shapes or the like, except for the cases specified particularly, for the case thought of as in principle and obviously essential, andthe like. This also applies to the above-mentioned numeric values and ranges.
  • FIGS. 1A and 1B are external perspective views showing a structural example of a semiconductor-accommodating container opening/closing apparatus used for a method of manufacturing a semiconductor integrated circuit device that is embodiment 1 of the present invention.
  • FIG. 1A shows a front side of the structure.
  • FIG. 1B shows a rear side of the structure.
  • FIG. 2 is a perspective view showing a structural example of a semiconductor-accommodating container (FOUP) used for the method of manufacturing a semiconductor integrated circuit device that is embodiment 1 of the present invention.
  • FIG. 3 is a partial perspective view showing a structural example of a semiconductor manufacturing apparatus in which the semiconductor-accommodating container opening/closing apparatus shown in FIG. 1 is installed.
  • FIG. 1A shows a front side of the structure.
  • FIG. 1B shows a rear side of the structure.
  • FIG. 2 is a perspective view showing a structural example of a semiconductor-accommodating container (FOUP) used for the method of manufacturing a semiconductor integrated circuit device that is
  • FIG. 4 is a side view showing an internal structure of the semiconductor manufacturing apparatus shown in FIG. 3.
  • FIG. 5 is a plan view showing an internal structure of the semiconductor manufacturing apparatus shown in FIG. 3.
  • FIG. 6 is a sequential flowchart showing an example of a transport sequence for semiconductor substrates in the method of manufacturing a semiconductor integrated circuit device that is embodiment 1 of the present invention.
  • FIG. 7 is a side view showing an internal structure of a modification of the semiconductor manufacturing apparatus shown in FIG. 4.
  • FIG. 8 is a partial side view showing an operation of an elevator in the semiconductor-accommodating container opening/closing apparatus using a modification of the semiconductor-accommodating container shown in FIG. 2.
  • a semiconductor-accommodating container 200 (hereafter referred to as a container 200 ) of a sealed type is used, and a semiconductor substrate (a semiconductor wafer) 300 accommodated therein is taken out and transported into a semiconductor manufacturing apparatus 400 , and desired process treatment (for example, treatment performed in pre-treatment such as exposure, etching, sputtering, film-formation, or the like) is performed by this semiconductor manufacturing apparatus 400 , and thereafter the semiconductor substrate 300 finishing the treatment thereof is accommodated in the container 200 again.
  • desired process treatment for example, treatment performed in pre-treatment such as exposure, etching, sputtering, film-formation, or the like
  • the semiconductor substrate 300 composed of a large-sized member having a diameter of 300 mm.
  • a front-opening/closing type FOUP will be described.
  • a structure of the semiconductor manufacturing apparatus 400 is described, which corresponds to a mini-Environment (meaning small environment made of a sealed container for isolating products from contamination and human being) used by the method of the manufacturing the semiconductor integrated circuit device that is the present embodiment 1.
  • a mini-Environment meaning small environment made of a sealed container for isolating products from contamination and human being
  • the semiconductor manufacturing apparatus 400 mainly comprises a semiconductor-accommodating container opening/closing apparatus 100 (hereafter referred to as an opening/closing apparatus 100 ), a treatment section 420 for performing desired processes on the semiconductor substrate 300 , and a transport area 410 for carrying out the semiconductor substrate 300 between a load port 100 a of the semiconductor manufacturing apparatus 400 and the treatment section 420 .
  • an opening/closing apparatus 100 a semiconductor-accommodating container opening/closing apparatus 100
  • a treatment section 420 for performing desired processes on the semiconductor substrate 300
  • a transport area 410 for carrying out the semiconductor substrate 300 between a load port 100 a of the semiconductor manufacturing apparatus 400 and the treatment section 420 .
  • the opening/closing apparatus 100 comprises, if roughly divided, a stage 110 for mounting the container 200 and an opener 120 for holding and opening/closing a cover 220 of the container 200 .
  • the stage 110 is provided with positioning pins 112 for accurately mounting the container 200 and a slider 111 for making the container 200 close to the opener 120 .
  • the slider 111 is movable in a front-and-rear direction by means of a motor and a ball screw (not shown) provided in the stage 110 .
  • the opener 120 is provided with rotary keys 121 which can be rotated through 90° by a motor (not shown) provided inside the opener 120 .
  • the rear side of the opener 120 is provided with an opener opening/closing mechanism 130 and an opener rising/falling mechanism 131 .
  • the opener opening/closing mechanism 130 opens and closes the cover 220 of the container by going forward and backward the opener 120 in a horizontal direction.
  • the opener rising/falling mechanism 131 makes the opener 120 rise and fall.
  • the opener opening/closing mechanism 130 and the opener rising/falling mechanism 131 are both operated by a motor and a ball screw (not shown).
  • the entire driving sections of the opener opening/closing mechanism 130 and the opener rising/falling mechanism 131 are provided with a safety cover 140 such that operators do not easily come in contact therewith.
  • FIG. 4 shows an example of the case where a structure that four opening/closing apparatuses 100 are installed to the semiconductor manufacturing apparatus 400 .
  • the transport area 410 is provided with a fan filter unit 412 on an inner ceiling thereof, and clean air flows from the top thereof to the bottom in a down-flow manner.
  • the transport area 410 is kept at cleanliness ISO1 to ISO2, and thereby can maintain a highly clean state in comparison to cleanliness ISO6 outside the semiconductor manufacturing apparatus 400 .
  • FIGS. 4 and 5 schematically show an internal structure of the semiconductor manufacturing apparatus 400 that is the present embodiment 1.
  • the transport area 410 is provided with the fan filter unit 412 on the internal ceiling, a transport robot 411 , and an alignment section 415 shown in FIG. 5.
  • the transport robot 411 transfers the semiconductor substrates 300 between the container 200 on the load port 100 a and a load lock chamber 421 in the treatment section 420 .
  • the alignment section 415 adjusts the position (direction) of the semiconductor substrate 300 when the semiconductor substrate 300 is transferred to the load lock chamber 421 .
  • an ionizer 413 as a static eliminator is provided at the bottom of the fan filter unit 412 in the transport area 410 .
  • the ionizer 413 static-eliminates the semiconductor substrate 300 which is in transportation or wait in the transport area 410 , and static-eliminates the semiconductor substrate 300 in the container 200 put in the load port 100 a.
  • the semiconductor substrate 300 is static-eliminated when being carried in the load lock chamber 421 of the treatment section 420 , or when being returned to the container 200 after processes are performed in the treatment section 420 , or during waiting in the load lock chamber 421 , an unload lock chamber 422 or the alignment section 415 , or when is accommodated in the container 200 on the load port 100 a .
  • the ionizer applies ionized gas to the semiconductor substrate 300 and properly maintains electric potential of the semiconductor substrate 300 .
  • This can static-eliminate the semiconductor substrate 300 which is before-process and after-process in transportation within the transport area 410 , or which is in waiting at the load lock chamber 421 , the unload lock chamber 422 and the alignment section 415 , or which is accommodated in the container 200 , and can properly keep potential of the semiconductor substrate 300 .
  • the treatment section 420 is provided with a treatment chamber 423 for performing process at the semiconductor substrate 300 . Between the treatment chamber 423 and the transport area 410 , there are provided the load lock chamber 421 and the unload lock chamber 422 which can be sealed by gate valves 421 a and 422 a.
  • the load lock chamber 421 is provided with substrate supporting stands 421 b in FIG. 4, by which the semiconductor substrate 300 is made to wait and can be supported.
  • the unload lock chamber 422 is also provided with not shown members similar to the substrate supporting stands 421 b.
  • Nonconductive resin coating is applied to such contact portions that a robot hand 411 a of the transport robot 411 installed in the transport area 410 is in contact with the semiconductor substrate 300 .
  • Nonconductive resin coating is also applied to such contact portions that the substrate supporting stands 421 b are in contact with the semiconductor substrate 300 .
  • the container 200 shown in FIG. 2 is a sealed type and comprises a container body 210 (container section) and the cover 220 (container cover section).
  • the container body 210 has four latch grooves 211 and a flange 212 provided around an opening 210 a of the container body 210 .
  • the container body 210 has an opening portion 210 a formed by opening a first face at a front surface side thereof.
  • the container body 210 includes a substrate holding section 210 b which functions as a shelf for horizontally accommodating the semiconductor substrate 300 .
  • the container body 210 can accommodate twenty-five semiconductor substrates 300 .
  • the cover 220 maintains a sealed state by coming in close contact with the container body 210 at a peripheral portion of the above-mentioned first surface.
  • the cover 220 has key grooves 221 (keyhole portion) at positions corresponding to the rotary keys 121 of the opening/closing apparatus 100 .
  • four latches 222 provided with the cover 220 project or withdraw from the cover 220 by means of a cam mechanism (not shown) in the cover 220 .
  • the latches 222 are positioned to correspond to the latch grooves 211 of the container body 210 .
  • the container 200 has a double structure comprising an external shell portion and an inside portion. That is, the inside portion is provided with substrate holding sections 210 b being in contact with the semiconductor substrate 300 , and is made by conductive materials so that the semiconductor substrate 300 is set to have a potential of 0 V.
  • the above-mentioned external shell is made by nonconductive materials.
  • the container 200 is not necessarily limited to the double structure, and maybe a single structure that is integrally made by conductive materials as a whole. Although contact portions coming in contact with at least the semiconductor substrate 300 are preferably formed by conductive materials, the entire thereof may be formed by nonconductive materials.
  • the conductive materials are, for example, resin materials containing carbon particles or the like, and polycarbonate or the like is used as the above-mentioned resin materials.
  • surface resistivity R ( ⁇ ) of the container 200 has an optimum range of 1 ⁇ 10 6 ⁇ R ⁇ 1 ⁇ 10 9 , an appropriate range of 1 ⁇ 10 5 ⁇ R ⁇ 1 ⁇ 10 13 , and an allowable range of 1 ⁇ 10 4 ⁇ R ⁇ 1 ⁇ 10 14 .
  • these conductive materials are portions being in contact with the semiconductor substrate 300 which is a wafer. However, the entire container 200 may be formed by these conductive materials.
  • the container 200 (first semiconductor-accommodating container) is placed on the stage 110 .
  • the slider 111 on the stage 110 is then moved in parallel at a side of the semiconductor manufacturing apparatus 400 .
  • Each rotary key 121 (key section) on a connection surface 120 a of the opener 120 for the opening/closing apparatus 100 is inserted into each key groove 221 (keyhole section) in an exposed surface 220 a of the cover 220 for the container 200 .
  • each key groove 221 in the cover 220 rotates and the cover 220 is fitted to the opener 120 .
  • cam mechanism (not shown) inside the cover 220 , each latch 222 is accommodated inside the cover 220 .
  • an operation for closing the container 200 is executed, contrary to the above-mentioned opening operation, by making the opener rising/falling mechanism 131 rise and by horizontally moving opener opening/closing mechanism 130 in a side of the stage 110 , the cover 220 fitted to the opener 120 is connected to the container body 210 .
  • each latch 222 of the cover 220 is accommodated in each latch groove 211 and the cover 220 is fitted into the container body 210
  • the slider 111 is moved in parallel at an opposite side of the semiconductor manufacturing apparatus 400 and a state is formed in which the container 200 is detached from the stage 110 .
  • FIGS. 1 to 6 a sequence for carrying in or out the semiconductor substrate 300 to/from the semiconductor manufacturing apparatus 400 in the method of manufacturing the semiconductor integrated circuit device that is the present embodiment 1 will be described in accordance with a sequence flowchart shown in FIG. 6.
  • the first sealed type container 200 accommodating a plurality of semiconductor substrates 300 (semiconductor substrates 300 of (A) shown by FIG. 5) is set on the load port 100 a of the semiconductor manufacturing apparatus 400 .
  • the semiconductor substrate 300 accommodated in the container 200 is grounded to the opening/closing apparatus 100 via the container 200 . Therefore, the semiconductor substrate 300 in the container 200 on the load port 100 a has a potential of almost 0 V.
  • a plurality of semiconductor substrates 300 is accommodated in the sealed type container 200 with the semiconductor substrates 300 grounded.
  • the cover 220 of the container 200 is opened by the opener 120 of the opener rising/falling mechanism 131 for the opening/closing apparatus 100 installed on the semiconductor manufacturing apparatus 400 .
  • a local cleaning chamber 430 having the transport area 410 has a surface 150 a (front surface portion) of a surface plate 150 for the opening/closing apparatus 100 .
  • the surface 150 a comes in contact with or closely faces the first face of the first sealed type container 200 .
  • the opener 120 is provided so as to cover the opening 150 a and has the rotary keys 121 (key section) which connect to the key grooves 221 under a projected state.
  • the transport robot 411 carries the semiconductor substrate 300 accommodated in the container 200 .
  • the transport robot 411 is a transport mechanism provided in the transport area 410 of the local cleaning chamber 430 .
  • the robot hand 411 a (contact section) of the transport robot 411 installed in the transport area 410 holds (seizes) the semiconductor substrate 300 and take it out from the container 200 .
  • the transport robot 411 moves the semiconductor substrate 300 (semiconductor substrate 300 of (B) shown in FIG. 5) to the alignment section 415 (Step S 2 ).
  • the container 200 in this embodiment is a front opening/closing type FOUP
  • the cover 220 is vertically moved relative to an opening surface of the container 200 by the opener 120 and thereby is opened.
  • the semiconductor substrate 300 is ungrounded while being held by the robot hand 411 a . Namely, the semiconductor substrate 300 does not have a potential of 0 V while being transported by the transport robot 411 .
  • the ionizer 413 is provided in the transport area 410 , static elimination of the ionizer 413 can prevent the semiconductor substrate 300 in the transport area 410 from being charged and the robot hand 411 a of the transport robot 411 too can be static-eliminated.
  • alignment (adjustment of direction and position) of the semiconductor substrate 300 is executed by the alignment section 415 .
  • Static elimination can be executed by the ionizer 413 since the alignment section 415 is also linked to the transport area 410 .
  • the transport robot 411 takes the semiconductor substrate 300 from the alignment section 415 .
  • the transport robot 411 transports the semiconductor substrate 300 to the load lock chamber 421 (Step S 3 ).
  • the substrate supporting stands 421 b of the load lock chamber 421 as shown in FIG. 4 support the semiconductor substrate 300 (semiconductor substrate 300 of (C) shown in FIG. 5).
  • the semiconductor substrate 300 Since nonconductive resin coating is applied to contact portions between the semiconductor substrate 300 and the substrate supporting stands 421 b , the semiconductor substrate 300 does not have a potential of 0 V in the load lock chamber 421 , similarly to the case where it is transported by the above-mentioned transport robot 411 .
  • static elimination is executed by the ionizer 413 because the load lock chamber 421 is also linked to the transport area 410 . At this time, it is also possible to static-eliminate the substrate supporting stands 421 b.
  • the gate valve 421 a of the load lock chamber 421 is closed to decompress the load lock chamber 421 .
  • Pressure of the load lock chamber 421 is equalized to that of the treatment chamber 423 inside the treatment section 420 (first wafer treatment section).
  • the gate valve 421 a in a side of the treatment chamber 423 is opened.
  • a robot (not shown) provided in the treatment chamber 423 transports the semiconductor substrate 300 to the treatment chamber 423 (Step S 4 ).
  • a desired process treatment (first treatment) is executed at the semiconductor substrate 300 (semiconductor substrate 300 of (D) shown in FIG. 5).
  • the above-mentioned robot in the treatment chamber 423 transports the semiconductor substrate 300 into the decompressed unload lock chamber 422 (Step S 5 ).
  • the semiconductor substrate 300 (semiconductor substrate 300 of (E) shown in FIG. 5) does not have a potential of 0 V in the unload lock chamber 42 . Therefore, static elimination can executed by the ionizer 413 since the unload lock chamber 422 and the transport area 410 are linked to each other.
  • the gate valve 422 a of the unload lock chamber 422 is closed to pressurize the unload lock chamber 422 up to normal pressure.
  • the gate valve 422 a in a side of the transport area 410 is opened.
  • the transport robot 411 in the transport area 410 transports the process-treated semiconductor substrate 300 from the unload lock chamber 422 to the transport area 410 (Step S 6 ).
  • this semiconductor substrate 300 is transported into the container 200 (container 200 located at a lower side in FIG. 5) on the load port 100 a . In this manner, the process-treated semiconductor substrates 300 are sequentially returned to the original container 200 (Step S 7 ).
  • the ionizer 413 in the transport area 410 can static-eliminate the semiconductor substrate 300 in which process treatment has been performed by the robot hand 411 a during transportation, or the semiconductor substrate 300 (the semiconductor substrate 300 of (A) shown in FIG. 5) which is accommodated in the container 200 .
  • the semiconductor substrate 300 is accommodated in the container 200 .
  • the opener opening/closing mechanism 130 shown in FIG. 1B closes the cover 220 of the container 200 , and releases a linking state between the container 200 (first semiconductor-accommodating container) and the local cleaning chamber 430 .
  • This container 200 is transported to a predetermined location of the semiconductor manufacturing apparatus 400 for the next step (Step S 8 ).
  • the process treatment of the semiconductor substrates 300 in the treatment section 420 of the semiconductor manufacturing apparatus 400 is performed by a single wafer treatment.
  • a transporting sequence of the semiconductor substrate 300 from step S 1 to step S 8 is a sequence for one semiconductor substrate 300 predetermined.
  • the above-mentioned one semiconductor substrate 300 predetermined is process-treated in the treatment section 420 (semiconductor substrate 300 of (D) shown in FIG. 5)
  • the other semiconductor substrates 300 before the process treatment are subsequently waiting in the load lock chamber 421 (semiconductor substrate 300 of (C) shown in FIG. 5), the alignment section 415 (semiconductor substrate 300 of (B) shown in FIG. 5), and the container 200 (semiconductor substrate 300 of (A) shown in FIG. 5).
  • FIG. 7 shows a modification of the semiconductor manufacturing apparatus 400 , and the modification has such a structure that the transport area 410 and the treatment section 420 are directly linked without linking the load lock chamber 421 or the unload lock chamber 422 therebetween. Even in this case, it is possible to static-eliminate the semiconductor substrate 300 (see FIG. 2) before and after the process treatment by installing the ionizer 413 in the transport area 410 .
  • the semiconductor manufacturing apparatus 400 shown in FIG. 7 is provided with a chemical filter 414 on the fan filter unit 412 of the transport area 410 . By this, chemical contamination of the semiconductor substrate 300 can be avoided.
  • FIG. 8 illustrates an operation of the opening/closing apparatus 100 when a modified semiconductor-accommodating container 500 (hereafter referred to as a container 500 ) is used.
  • a container 500 a modified semiconductor-accommodating container 500
  • the container 500 is not a bottom opening/closing type but a front opening/closing type.
  • This container comprises a container body 510 , a cover 520 , and a substrate holding section 510 b . When this is set on the cover 520 of the opening/closing apparatus 100 , the cover 520 is set downward.
  • the opener opening/closing mechanism 130 of the opening/closing apparatus 100 shown in FIG. 1 opens or closes the container 500
  • the opener rising/falling mechanism 131 makes an elevator 131 a shown in FIG. 8 lower or raise, and makes the substrate holding section 510 b exposed from the container 500 .
  • the semiconductor substrates 300 is carried in or out through the opening portion 510 a of the substrate holding section 510 b.
  • the semiconductor-accommodating container may be a front opening/closing type or a bottom opening/closing type in the case of a sealed type.
  • the ionizer 413 static-eliminates the semiconductor substrate 300 process-treated by the treatment section 420 in the transport area 410 between the load port 100 a of the semiconductor manufacturing apparatus 400 and the treatment section 420 . Being accommodated in the container 200 on the load port 100 a can eliminates electric charges from the semiconductor substrate 300 charged.
  • the semiconductor substrate 300 semiconductor wafer
  • the semiconductor manufacturing apparatus 400 and the container 200 are connected via the opening/closing apparatus 100 . Therefore, by opening and closing the cover 220 of the container 200 , a clean area inside the semiconductor manufacturing apparatus 400 and a clean area inside the container 200 are directly connected to each other.
  • the opener opening/closing mechanism 130 of the opening/closing apparatus 100 has high speed of the operation thereof, the inside of the container 200 becomes negative pressure at moments when the cover 220 is pulled out of the container body 210 . Consequently, foreign materials enter the inside of the container 200 through a gap between the flange 211 of the container 200 and the surface plate 150 of the opening/closing apparatus 100 and adhering to the semiconductor substrate 300 .
  • FIG. 9 is a partial plan view showing an example of a step between a connection surface of an opener and a surface of a surface plate in a substrate accommodating container opening/closing apparatus used by a method of manufacturing a semiconductor integrated circuit device that is embodiment 2 of the present invention.
  • FIG. 10 is a partially plan view showing an example of amounts of overlap between a connection surface of an opener and an exposed surface of a semiconductor-accommodating container in a substrate accommodating container opening/closing apparatus that is the embodiment 2 of the present invention.
  • FIG. 11 is a partial side view showing an example of holding the opener of the semiconductor manufacturing apparatus shown in FIG. 10.
  • the method of manufacturing a semiconductor integrated circuit device that is the present embodiment 2 uses the container 200 shown in FIG. 2, that is a FOUP, which is a sealed type described in the embodiment 1 and a front-opening/closing type, and carries in or out the semiconductor substrate 300 having the diameter of 300 mm to or from the semiconductor manufacturing apparatus 400 .
  • said method explains a positional relation between the cover 220 of the container 200 and the connection surface 120 a of the opener 120 for the opening/closing apparatus 100 installed in the semiconductor manufacturing apparatus 400 .
  • the step D between the connection surface 120 a of the opener 120 and the surface 150 a of the surface plate 150 that is, projecting amounts from the surface 150 a of the surface plate 150 of the connection surface 120 a of the opener 120 is set to be longer than 0.25 mm. Namely, the connection surface 120 a of the opener 120 is projected from the surface 150 a of the surface plate 150 over 0.25 mm.
  • connection surface 120 a of the opener 120 is projected from the surface 150 a of the surface plate 150 over 0.3 mm (namely, the above-mentioned projecting amounts are set to be longer than 0.3 mm).
  • the above-mentioned projecting amounts depend on a virtual stop position (based on servo control, etc.) of the opener 120 in the case of no FOUP (container 200 ).
  • the projecting amounts are 1.0 mm.
  • An appropriate range is 0.7 mm ⁇ projecting amounts.
  • a preferable range is 0 ⁇ projecting amounts ⁇ 10 mm.
  • the opener 120 is supported by the opener support 130 a (cantilever beam).
  • the opener 120 supported by an opener supporting portion 130 a cantilevered as shown in FIG. 11 retreats inside the apparatus, by moving in parallel at a side of the semiconductor manufacturing apparatus 400 .
  • the projecting amounts may be preferably within a range capable of horizontally operating the opener 120 .
  • the semiconductor substrate 300 is carried in or out.
  • the full state container 200 (first semiconductor-accommodating container) accommodating a plurality of semiconductor substrates 300 therein is located on the stage 110 of the opening/closing apparatus 100 shown in FIG. 1.
  • a front surface which is a first surface of the container 200 is come in contact with or closely faced at the surface 150 a of the surface plate 150 of the opening/closing apparatus 100 of the local cleaning chamber 430 such that the rotary keys 121 of the opener 120 are inserted into the key grooves 221 of the cover 220 of the container 200 .
  • connection surface 120 a of the opener 120 is put into contact with the exposed surface 220 a of the cover 220 to hold (seize) the cover 220 by the opener 120 .
  • connection surface 120 a (front portion) of the opener 120 is maintained so as to project over 0.25 mm from the surface 150 a of the surface plate 150 in the case where the container 200 is not provided.
  • connection surface 120 a of the opener 120 projects from the surface 150 a of the surface plate 150 , the connection surface 120 a of the opener 120 is closely and certainly contact with the exposed surface 220 a of the cover 220 of the container 200 .
  • the opener 120 vertically moves the cover 220 relative to the opening surface of the container 200 to open the cover 220 . This connects the opening 210 a of the container 200 and the opening 150 b of the surface plate 150 for the opening/closing apparatus 100 to each other.
  • the semiconductor substrate 300 is carried in or out from the container between the container 200 and the semiconductor manufacturing apparatus 400 via the opening 210 a of the container 200 and the opening 150 b of the opening/closing apparatus 100 .
  • An overlap amount T in FIG. 10 is set to 0 ⁇ T ⁇ 1.25 mm in order to ensure a contact between the opener 120 and the cover 220 when the cover 220 of the container 200 is opened and closed.
  • the overlap amount T corresponds to an overlap between the container length L of the container 200 and the projection amount (Step D) from the surface 150 a of the surface plate 150 for the opener 120 .
  • the method of manufacturing the semiconductor integrated circuit device according to embodiment 2 requires contact between the opener 120 and the cover 220 .
  • the overlap amount T is at least T>0.
  • An allowable range of the overlap amount T is 0 ⁇ T ⁇ 1.25 mm.
  • the overlap amount T (mm) needs to be T>0 for all containers 200 operating on the semiconductor manufacturing line.
  • a desirable range is 0 ⁇ T ⁇ 1.25 for all containers 200 operating on the semiconductor manufacturing line.
  • a percentage of incomplete contact between the opener 120 and the cover 220 may exceed 1% of all containers 200 operating on the semiconductor manufacturing line.
  • connection surface 120 a of the opener 120 is made to project from the surface 150 a of the surface plate 150 for the opening/closing apparatus 100 installed on the semiconductor manufacturing apparatus 400 .
  • connection surface 120 a of the opener 120 is made to project from the surface 150 a of the surface plate 150 for the opening/closing apparatus 100 installed on the semiconductor manufacturing apparatus 400 .
  • connection surface 120 a of the opener 120 can contact with the cover 220 of the container 200 , it is possible to reliably open and close the cover 220 , preventing a foreign materials from adhering to the semiconductor substrate 300 .
  • the use of the ionizer 413 according to embodiment 1 can improve the reliability for carrying the semiconductor substrate 300 and opening and closing the cover 220 of the container 200 . Hence, it is possible to prevent a decrease in the operating ratio of the semiconductor manufacturing apparatus 400 on the entire semiconductor manufacturing line.
  • the semiconductor manufacturing apparatus 400 described in embodiments 1 and 2 is not limited to pre-processes.
  • the apparatus may be an inspection apparatus or a wafer sorter which does not directly conduct manufacture on the semiconductor substrate 300 . Also in this case, it is possible to provide same effects as for embodiments 1 and 2.
  • a yield of semiconductor substrates can be improved.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
US09/941,835 2000-10-12 2001-08-30 Method of manufacturing a semiconductor integrated circuit device Abandoned US20020045328A1 (en)

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US10/932,237 US7172981B2 (en) 2000-10-12 2004-09-02 Semiconductor integrated circuit device manufacturing method including static charge elimination
US11/698,107 US7390758B2 (en) 2000-10-12 2007-01-26 Method of manufacturing a semiconductor integrated circuit device with elimination of static charge
US12/123,584 US8119547B2 (en) 2000-10-12 2008-05-20 Method of manufacturing a semiconductor integrated circuit device including elimination of static charge of a treated wafer

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JP2000311480A JP3955724B2 (ja) 2000-10-12 2000-10-12 半導体集積回路装置の製造方法

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US10/932,237 Expired - Fee Related US7172981B2 (en) 2000-10-12 2004-09-02 Semiconductor integrated circuit device manufacturing method including static charge elimination
US11/698,107 Expired - Lifetime US7390758B2 (en) 2000-10-12 2007-01-26 Method of manufacturing a semiconductor integrated circuit device with elimination of static charge
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US12/123,584 Expired - Fee Related US8119547B2 (en) 2000-10-12 2008-05-20 Method of manufacturing a semiconductor integrated circuit device including elimination of static charge of a treated wafer

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US7172981B2 (en) 2007-02-06
US20050022840A1 (en) 2005-02-03
US20090023303A1 (en) 2009-01-22
US7390758B2 (en) 2008-06-24
US20070123063A1 (en) 2007-05-31
US8119547B2 (en) 2012-02-21

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