KR900008527A - 반도체 기억장치 - Google Patents

반도체 기억장치 Download PDF

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Publication number
KR900008527A
KR900008527A KR1019890016269A KR890016269A KR900008527A KR 900008527 A KR900008527 A KR 900008527A KR 1019890016269 A KR1019890016269 A KR 1019890016269A KR 890016269 A KR890016269 A KR 890016269A KR 900008527 A KR900008527 A KR 900008527A
Authority
KR
South Korea
Prior art keywords
memory device
semiconductor memory
write
read
compares
Prior art date
Application number
KR1019890016269A
Other languages
English (en)
Other versions
KR0166061B1 (ko
Inventor
아끼노리 마쯔오
마사시 와따나베
마사시 와다
다께시 와다
야스히로 나까무라
Original Assignee
미다 가쓰시게
가부시끼가이샤 히다찌세이사꾸쇼
오노 미노루
히다찌초 엘 에스 아이엔지니어링 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 미다 가쓰시게, 가부시끼가이샤 히다찌세이사꾸쇼, 오노 미노루, 히다찌초 엘 에스 아이엔지니어링 가부시끼가이샤 filed Critical 미다 가쓰시게
Publication of KR900008527A publication Critical patent/KR900008527A/ko
Application granted granted Critical
Publication of KR0166061B1 publication Critical patent/KR0166061B1/ko

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/46—Test trigger logic
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths

Landscapes

  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Non-Volatile Memory (AREA)

Abstract

내용 없음.

Description

반도체 기억장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명이 적용된 EPR0M의 1실시예를 도시한 블럭도.
제2도A는 본 발명의 자동 검증 모드의 설정에서 제1의 라이트 동작과 검증모드 까지를 설명하기 위한 타이밍도.
제2도B는 제2의 라이트 동작과 검증 모드를 설명하기 위한 타이밍도.
제2도 C는 추가 라이트 동작과 종료 라이트 동작을 설명 하기 위한 타이밍도.

Claims (3)

  1. 전기적인 라이트 정보에 따라서 임계값 전압이 변화되는 불휘발성 기억소자가 매트릭스 형상으로 배치되는 메모리 어레이를 포함하고, 소정의 제어신호의 입력에 의해 내부회로에서 라이트 시간이 설정됨과 동시에 상기 라이트 동작후 자동적으로 리드 모드로 전환되는 자동검증 기능을 갖는 반도체 기억장치.
  2. 특허청구의 범위 제1항에 있어서, 상기 자동검증 모드에서의 리드 동작은 내부에 마련된 래치회로에 기억된 라이트 데이타와 상기 리드모드에서의 리드데이타를 내부 비교회로에 의해 비교하고, 그 비교 결과를 출력하는것인 반도체 기억장치.
  3. 특허청구의 번위 제1항 또는 제2항에 있어서, 상기 불휘발성 기억소자는 EPROM을 구성하는 것을 반도체 기억장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890016269A 1988-11-22 1989-11-10 반도체 기억장치 KR0166061B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63-295172 1988-11-22
JP29517288A JP2648840B2 (ja) 1988-11-22 1988-11-22 半導体記憶装置

Publications (2)

Publication Number Publication Date
KR900008527A true KR900008527A (ko) 1990-06-04
KR0166061B1 KR0166061B1 (ko) 1999-02-01

Family

ID=17817164

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890016269A KR0166061B1 (ko) 1988-11-22 1989-11-10 반도체 기억장치

Country Status (3)

Country Link
US (2) US5434819A (ko)
JP (1) JP2648840B2 (ko)
KR (1) KR0166061B1 (ko)

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US5844842A (en) * 1989-02-06 1998-12-01 Hitachi, Ltd. Nonvolatile semiconductor memory device
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US5361227A (en) * 1991-12-19 1994-11-01 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
US6781895B1 (en) 1991-12-19 2004-08-24 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
US6287484B1 (en) 1992-11-12 2001-09-11 Robert Hausslein Iontophoretic material
US5452251A (en) 1992-12-03 1995-09-19 Fujitsu Limited Semiconductor memory device for selecting and deselecting blocks of word lines
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US6035401A (en) 1997-02-03 2000-03-07 Intel Corporation Block locking apparatus for flash memory
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TW380255B (en) * 1997-02-26 2000-01-21 Toshiba Corp Semiconductor memory
JP2001006387A (ja) * 1999-06-18 2001-01-12 Mitsubishi Electric Corp テスト回路を備える半導体装置および半導体装置の試験装置
US6834323B2 (en) 2000-12-26 2004-12-21 Intel Corporation Method and apparatus including special programming mode circuitry which disables internal program verification operations by a memory
US6732306B2 (en) * 2000-12-26 2004-05-04 Intel Corporation Special programming mode with hashing
US7007131B2 (en) * 2000-12-27 2006-02-28 Intel Corporation Method and apparatus including special programming mode circuitry which disables internal program verification operations by a memory
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JP5137550B2 (ja) * 2007-12-12 2013-02-06 キヤノン株式会社 情報処理装置及びその制御方法
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JP6709042B2 (ja) * 2014-12-10 2020-06-10 株式会社半導体エネルギー研究所 半導体装置
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Also Published As

Publication number Publication date
US5544098A (en) 1996-08-06
JPH02142000A (ja) 1990-05-31
KR0166061B1 (ko) 1999-02-01
JP2648840B2 (ja) 1997-09-03
US5434819A (en) 1995-07-18

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