KR890012387A - 반도체 기억장치 - Google Patents

반도체 기억장치

Info

Publication number
KR890012387A
KR890012387A KR1019880016949A KR880016949A KR890012387A KR 890012387 A KR890012387 A KR 890012387A KR 1019880016949 A KR1019880016949 A KR 1019880016949A KR 880016949 A KR880016949 A KR 880016949A KR 890012387 A KR890012387 A KR 890012387A
Authority
KR
South Korea
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Application number
KR1019880016949A
Other languages
English (en)
Other versions
KR920001636B1 (ko
Inventor
신이찌로 기무라
나오따까 하시모또
요시오 사까이
도꾸오 구레
요시후미 가와모또
Original Assignee
가부시기가이샤 히다찌세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시기가이샤 히다찌세이사꾸쇼 filed Critical 가부시기가이샤 히다찌세이사꾸쇼
Publication of KR890012387A publication Critical patent/KR890012387A/ko
Application granted granted Critical
Publication of KR920001636B1 publication Critical patent/KR920001636B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1019880016949A 1988-01-08 1988-12-19 반도체 기억장치 KR920001636B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63-001213 1988-01-08
JP63001213A JP2590171B2 (ja) 1988-01-08 1988-01-08 半導体記憶装置

Publications (2)

Publication Number Publication Date
KR890012387A true KR890012387A (ko) 1989-08-26
KR920001636B1 KR920001636B1 (ko) 1992-02-21

Family

ID=11495190

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880016949A KR920001636B1 (ko) 1988-01-08 1988-12-19 반도체 기억장치

Country Status (3)

Country Link
US (1) US4970564A (ko)
JP (1) JP2590171B2 (ko)
KR (1) KR920001636B1 (ko)

Families Citing this family (66)

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US5374576A (en) * 1988-12-21 1994-12-20 Hitachi, Ltd. Method of fabricating stacked capacitor cell memory devices
US20010008288A1 (en) * 1988-01-08 2001-07-19 Hitachi, Ltd. Semiconductor integrated circuit device having memory cells
US5235199A (en) * 1988-03-25 1993-08-10 Kabushiki Kaisha Toshiba Semiconductor memory with pad electrode and bit line under stacked capacitor
JPH01248556A (ja) * 1988-03-29 1989-10-04 Nec Corp 半導体記憶装置
US5272367A (en) * 1988-05-02 1993-12-21 Micron Technology, Inc. Fabrication of complementary n-channel and p-channel circuits (ICs) useful in the manufacture of dynamic random access memories (drams)
US5091761A (en) * 1988-08-22 1992-02-25 Hitachi, Ltd. Semiconductor device having an arrangement of IGFETs and capacitors stacked thereover
JP2777896B2 (ja) * 1989-01-20 1998-07-23 富士通株式会社 半導体記憶装置
JP2520721B2 (ja) * 1989-03-17 1996-07-31 富士通株式会社 半導体記憶装置及びその製造方法
JPH02310959A (ja) * 1989-05-25 1990-12-26 Nec Corp 半導体装置及びその製造方法
US5172202A (en) * 1989-05-31 1992-12-15 Nec Corporation Semiconductor memory cell having high density structure
JP2974252B2 (ja) * 1989-08-19 1999-11-10 富士通株式会社 半導体記憶装置
JP2528719B2 (ja) * 1989-12-01 1996-08-28 三菱電機株式会社 半導体記憶装置
JPH03229459A (ja) * 1990-02-05 1991-10-11 Nec Corp 半導体メモリおよびその製造方法
EP0449000B1 (en) * 1990-03-08 2004-08-18 Fujitsu Limited Layer structure having contact hole for fin-shaped capacitors in DRAMS and method of producing the same
JPH0697682B2 (ja) * 1990-03-20 1994-11-30 株式会社東芝 半導体装置の製造方法
JP2579236B2 (ja) * 1990-05-01 1997-02-05 三菱電機株式会社 トランジスタおよびその製造方法
US5229314A (en) * 1990-05-01 1993-07-20 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing field effect transistor having a multilayer interconnection layer therein with tapered sidewall insulation
JPH0775247B2 (ja) * 1990-05-28 1995-08-09 株式会社東芝 半導体記憶装置
EP0684649B1 (en) * 1990-07-06 2001-05-30 Fujitsu Limited Dynamic random access memory
JP2792211B2 (ja) * 1990-07-06 1998-09-03 日本電気株式会社 半導体記憶装置
EP0469555B1 (en) * 1990-07-31 1996-04-17 Nec Corporation Charge storage capacitor electrode and method of manufacturing the same
US5217918A (en) * 1990-08-14 1993-06-08 Samsung Electronics Co., Ltd. Method of manufacturing a highly integrated semiconductor memory device with trench capacitors and stacked capacitors
JP3003188B2 (ja) * 1990-09-10 2000-01-24 ソニー株式会社 半導体メモリ及びその製造方法
DE69213973T2 (de) * 1991-01-30 1997-02-13 Texas Instruments Inc SRAM-Zelle mit geschichteter Kapazität
US5324961A (en) * 1991-01-30 1994-06-28 Texas Instruments Incorporated Stacked capacitor SRAM cell
KR920017248A (ko) * 1991-02-18 1992-09-26 문정환 반도체 메모리 소자의 커패시터 제조방법
US5262343A (en) * 1991-04-12 1993-11-16 Micron Technology, Inc. DRAM stacked capacitor fabrication process
US5084406A (en) * 1991-07-01 1992-01-28 Micron Technology, Inc. Method for forming low resistance DRAM digit-line
JPH0521744A (ja) * 1991-07-10 1993-01-29 Sony Corp 半導体記憶装置のキヤパシタおよびその製造方法
TW301782B (ko) * 1991-08-16 1997-04-01 Gold Star Electronics
US5192703A (en) * 1991-10-31 1993-03-09 Micron Technology, Inc. Method of making tungsten contact core stack capacitor
JPH05218349A (ja) * 1992-02-04 1993-08-27 Sony Corp 半導体記憶装置
US5145801A (en) * 1992-02-07 1992-09-08 Micron Technology, Inc. Method of increasing the surface area of a mini-stacked capacitor
US5208180A (en) * 1992-03-04 1993-05-04 Micron Technology, Inc. Method of forming a capacitor
KR950011636B1 (ko) * 1992-03-04 1995-10-07 금성일렉트론주식회사 개선된 레이아웃을 갖는 다이내믹 랜덤 액세스 메모리와 그것의 메모리셀 배치방법
US5227325A (en) * 1992-04-02 1993-07-13 Micron Technology, Incl Method of forming a capacitor
KR100289348B1 (ko) * 1992-05-25 2001-12-28 이데이 노부유끼 절연기판실리콘반도체장치와그제조방법
JP3241106B2 (ja) * 1992-07-17 2001-12-25 株式会社東芝 ダイナミック型半導体記憶装置及びその製造方法
JP3197064B2 (ja) * 1992-07-17 2001-08-13 株式会社東芝 半導体記憶装置
WO1994003898A1 (de) * 1992-08-10 1994-02-17 Siemens Aktiengesellschaft Dram-zellenanordnung
JPH0661445A (ja) * 1992-08-11 1994-03-04 Nippon Steel Corp 半導体記憶装置およびその製造方法
JP3302796B2 (ja) * 1992-09-22 2002-07-15 株式会社東芝 半導体記憶装置
US5864181A (en) 1993-09-15 1999-01-26 Micron Technology, Inc. Bi-level digit line architecture for high density DRAMs
US5508881A (en) * 1994-02-01 1996-04-16 Quality Microcircuits Corporation Capacitors and interconnect lines for use with integrated circuits
US5364808A (en) * 1994-02-07 1994-11-15 United Micro Electronics Corporation Method of making a buried bit line DRAM cell
JPH0936325A (ja) * 1995-07-25 1997-02-07 Hitachi Ltd 半導体集積回路装置
US5747845A (en) * 1995-08-22 1998-05-05 Nippon Steel Corporation Semiconductor memory device with memory cells each having transistor and capacitor and method of making the same
US5602051A (en) * 1995-10-06 1997-02-11 International Business Machines Corporation Method of making stacked electrical device having regions of electrical isolation and electrical connection on a given stack level
WO1997019468A1 (fr) 1995-11-20 1997-05-29 Hitachi, Ltd. Dispositif de stockage a semi-conducteur, et processus de fabrication de ce dispositif
US5825061A (en) * 1995-12-06 1998-10-20 Utron Technology Inc. Channel-type stack capacitor for DRAM cell
KR0184064B1 (ko) * 1995-12-22 1999-03-20 문정환 반도체 소자의 캐패시터 제조방법
US6043562A (en) * 1996-01-26 2000-03-28 Micron Technology, Inc. Digit line architecture for dynamic memory
US6291846B1 (en) * 1996-06-19 2001-09-18 Fujitsu Limited DRAM semiconductor device including oblique area in active regions and its manufacture
KR100239404B1 (ko) * 1996-07-31 2000-01-15 김영환 디램(dram) 및 그의 셀 어레이방법
JP2930110B2 (ja) * 1996-11-14 1999-08-03 日本電気株式会社 半導体記憶装置およびその製造方法
US5783462A (en) * 1997-01-22 1998-07-21 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making an external contact to a MOSFET drain for testing of stacked-capacitor DRAMS
US5875138A (en) * 1997-06-30 1999-02-23 Siemens Aktiengesellschaft Dynamic access memory equalizer circuits and methods therefor
JPH11330418A (ja) 1998-03-12 1999-11-30 Fujitsu Ltd 半導体装置とその製造方法
KR100317434B1 (ko) 1998-03-12 2001-12-22 아끼구사 나오유끼 반도체 장치와 그 제조 방법
US6570781B1 (en) 2000-06-28 2003-05-27 Marvell International Ltd. Logic process DRAM
US6947324B1 (en) 2000-06-28 2005-09-20 Marvell International Ltd. Logic process DRAM
US7184290B1 (en) 2000-06-28 2007-02-27 Marvell International Ltd. Logic process DRAM
US6455886B1 (en) 2000-08-10 2002-09-24 International Business Machines Corporation Structure and process for compact cell area in a stacked capacitor cell array
JP3879518B2 (ja) * 2002-01-21 2007-02-14 ソニー株式会社 磁気記憶装置およびその製造方法
US20100320558A1 (en) * 2009-06-18 2010-12-23 Hsien-Chang Chang Circuit layout structure and method to scale down ic layout
JP7063019B2 (ja) * 2018-03-09 2022-05-09 Tdk株式会社 薄膜コンデンサの製造方法及び薄膜コンデンサ

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* Cited by examiner, † Cited by third party
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NL176415C (nl) * 1976-07-05 1985-04-01 Hitachi Ltd Halfgeleidergeheugeninrichting omvattende een matrix van halfgeleidergeheugencellen, die bestaan uit een veldeffekttransistor en een opslagcapaciteit.
US4475118A (en) * 1978-12-21 1984-10-02 National Semiconductor Corporation Dynamic MOS RAM with storage cells having a mainly insulated first plate
JPS5623771A (en) * 1979-08-01 1981-03-06 Hitachi Ltd Semiconductor memory
US4649406A (en) * 1982-12-20 1987-03-10 Fujitsu Limited Semiconductor memory device having stacked capacitor-type memory cells
JPH0618257B2 (ja) * 1984-04-28 1994-03-09 富士通株式会社 半導体記憶装置の製造方法
US4651183A (en) * 1984-06-28 1987-03-17 International Business Machines Corporation High density one device memory cell arrays
JPS61183952A (ja) * 1985-02-09 1986-08-16 Fujitsu Ltd 半導体記憶装置及びその製造方法
JPS62120070A (ja) * 1985-11-20 1987-06-01 Toshiba Corp 半導体記憶装置
JPH0736437B2 (ja) * 1985-11-29 1995-04-19 株式会社日立製作所 半導体メモリの製造方法

Also Published As

Publication number Publication date
JPH01179449A (ja) 1989-07-17
KR920001636B1 (ko) 1992-02-21
US4970564A (en) 1990-11-13
JP2590171B2 (ja) 1997-03-12

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E701 Decision to grant or registration of patent right
GRNT Written decision to grant
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Payment date: 20080205

Year of fee payment: 17

EXPY Expiration of term