JP2017111445A - 薄膜トランジスタ基板 - Google Patents
薄膜トランジスタ基板 Download PDFInfo
- Publication number
- JP2017111445A JP2017111445A JP2016242170A JP2016242170A JP2017111445A JP 2017111445 A JP2017111445 A JP 2017111445A JP 2016242170 A JP2016242170 A JP 2016242170A JP 2016242170 A JP2016242170 A JP 2016242170A JP 2017111445 A JP2017111445 A JP 2017111445A
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- transparent electrode
- electrode
- edge
- film transistor
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Abstract
Description
124 共通電極
130 薄膜トランジスタ
132 フローティング導電層
Claims (8)
- データラインと;
前記データラインに隣接したエッジ透明電極と、前記エッジ透明電極の一側端から第1幅の第1スリットを挟んで離隔した内部透明電極とを有する画素電極と;
前記エッジ透明電極の他側端から前記データラインの幅方向に第2幅だけ露出する共通電極とを含み、
前記第1幅に対する第2幅の割合は0.1〜0.74である、薄膜トランジスタ基板。 - 前記データラインと重畳するように前記共通電極の上部に配置されるフローティング導電層をさらに含み、
前記共通電極は前記エッジ透明電極と前記フローティング導電層の間で第2幅だけ露出し、
前記第1幅に対する第2幅の割合は0.1〜0.5である、請求項1に記載の薄膜トランジスタ基板。 - 前記フローティング導電層は前記画素電極と同一の素材からなり、前記画素電極と同一平面上に位置する、請求項2に記載の薄膜トランジスタ基板。
- 前記共通電極は、前記データラインと重畳する領域に配置される第2スリットを含み、
前記第2スリットによって露出する共通電極の他側端は前記エッジ透明電極の他側端から前記第2幅で離隔する、請求項1に記載の薄膜トランジスタ基板。 - 信号ラインと;
前記信号ラインに隣接したエッジ透明電極と、前記エッジ透明電極の一側端から第1幅の第1スリットを挟んで離隔した内部透明電極とを有する上部透明電極と;
前記エッジ透明電極の他側端から前記信号ラインの幅方向に第2幅だけ露出する下部透明電極とを含み、
前記第1幅に対する第2幅の割合は0.1〜0.74である、薄膜トランジスタ基板。 - 前記信号ラインと重畳するように前記下部透明電極の上部に配置されるフローティング導電層をさらに含み、
前記下部透明電極は前記エッジ透明電極と前記フローティング導電層の間で第2幅だけ露出し、
前記第1幅に対する第2幅の割合は0.1〜0.5である、請求項5に記載の薄膜トランジスタ基板。 - 前記フローティング導電層は前記上部透明電極と同一素材からなり、前記上部透明電極と同一平面上に配置される、請求項6に記載の薄膜トランジスタ基板。
- 前記下部透明電極は前記信号ラインと重畳する領域に配置される第2スリットを含み、
前記第2スリットによって露出した前記下部透明電極の他側端は前記エッジ透明電極の他側端から前記第2幅で離隔する、請求項5に記載の薄膜トランジスタ基板。
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CN106873270A (zh) | 2017-06-20 |
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