JP2010103570A - セラミックス回路基板 - Google Patents
セラミックス回路基板 Download PDFInfo
- Publication number
- JP2010103570A JP2010103570A JP2010024694A JP2010024694A JP2010103570A JP 2010103570 A JP2010103570 A JP 2010103570A JP 2010024694 A JP2010024694 A JP 2010024694A JP 2010024694 A JP2010024694 A JP 2010024694A JP 2010103570 A JP2010103570 A JP 2010103570A
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- Prior art keywords
- circuit board
- ceramic
- metal
- substrate
- bonding
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- H—ELECTRICITY
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- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
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- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
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- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
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Abstract
【解決手段】セラミックス基板に金属回路板を接合して成るセラミックス回路基板において、窒化アルミニウム,窒化けい素および酸化アルミニウムの少なくとも1種からなるセラミックス基板と、このセラミックス基板に一体に形成されたAlを主成分とするろう材からなる接合層と、この接合層に一体に形成され、上記ろう材と金属回路板との合金化を防止する隔離層と、この隔離層を介して接合される金属回路板とを備えることを特徴とするセラミックス回路基板である。また、金属回路板の周縁部に薄肉部,孔,溝を形成することが好ましい。
【選択図】 図2
Description
本実施例1は、表1に示すNo.1ないしNo.15の試料に基づいて説明する。試料No.1ないし試料No.9は、AlN基板(熱伝導率k=170W/mK)をセラミックス基板とし、試料No.10ないし試料No.15は、Si3N4基板(k=70W/mK)をセラミックス基板として用いた。
本比較例1では、表1に示すNo.16ないしNo.20の試料に基づいて説明する。試料No.16,18,20]はAlN基板(k=170W/mK)、試料No.17,19はSi3N4基板(k=70W/mK)をセラミックス基板として用いた。
本実施例2は、表2に示すNo.21ないしNo.31の試料に基づいて説明する。試料No.21ないし試料No.25、試料No.28ないし試料No.31は、AlN基板(k=170W/mK)をセラミックス基板として用いた。また、試料No.26は、Si3N4基板(k=70W/mK)を用い、試料No.27は、Al2O3基板をセラミックス基板として用いた。これらのセラミックス基板の上下面に、表2に示すAlを主成分とし、Siを0.1〜2wt%添加したAl−Siろう材ペーストをスクリーン印刷した。
本比較例2では、表2に示すNo.32およびNo.33の試料に基づいて説明する。試料No.32はAlN基板(k=170W/mK)を用い、試料No.33はSi3N4基板(k=70W/mK)をセラミックス基板として用いた。
本実施例3は、表3に示すNo.34ないしNo.39の試料に基づいて説明する。
比較例3は、表3に示すNo.40およびNo.41の試料に基づいて説明する。そして、実施例3の第1接合層の形成のみを行い、第2接合層の形成は行わず、以下のように製造した。
厚さ0.5mm、純度99%以上のアルミニウム板を用意し、エッチングによりこのアルミニウム板の外周縁部より1mmまでの部分の厚さを0.25mmとして、図18に示すように薄肉部3bを形成した。その後、このアルミニウム板を厚さ0.7mmの窒化アルミニウム基板に直接接合してセラミックス回路基板を作製した。
厚さ0.5mm、純度99%以上のアルミニウム板を用意し、図19に示すように、エッチングによりこのアルミニウム板の外周縁部内側に複数の孔6aを設けた。孔の直径は0.5mm、各孔の間隔は、0.5mm、かつ孔の縁部が外周縁部より0.5mmとなるようにした。このアルミニウム板を厚さ0.7mmの窒化アルミニウム基板に直接接合してセラミックス回路基板を作製した。
厚さ0.5mm、純度99%以上のアルミニウム板を用意し、図20に示すように、エッチングによりこのアルミニウム板の外周縁部内側に複数の溝7を設けた。溝の深さは0.25mm、溝の幅は、0.05mm、かつ溝の縁部が外周縁部より0.5mmとなるようにした。このアルミニウム板を厚さ0.7mmの窒化アルミニウム基板に直接接合してセラミックス回路基板を作製した。
厚さ0.5mm、純度99%以上のアルミニウム板を用意し、このアルミニウム板には薄肉部,孔,溝は形成しなかった。このアルミニウム板を厚さ0.7mmの窒化アルミニウム基板に直接接合してセラミックス回路基板を作製した。
2 セラミックス基板(AlN基板,Si3N4基板,Al2O3基板)
3,4,5 金属回路板(Al回路板,Cu回路板)
3a 金属回路板の外周縁部
3b 金属回路板の薄肉部
6 孔
6a 非貫通孔
6b 貫通孔
7 溝
7a U字状溝
7b V字状溝
Claims (9)
- セラミックス基板に金属回路板を接合して成るセラミックス回路基板において、窒化アルミニウム,窒化けい素および酸化アルミニウムの少なくとも1種からなるセラミックス基板と、このセラミックス基板に一体に形成されたAlを主成分とするろう材からなる接合層と、この接合層に一体に形成され、上記ろう材と金属回路板との合金化を防止する隔離層と、この隔離層を介して接合される金属回路板とを備えることを特徴とするセラミックス回路基板。
- 請求項1記載のセラミックス回路基板において、前記隔離層は、粒径が10μm以下の金属粉末を含む金属ペーストまたは金属箔からなることを特徴とするセラミックス回路基板。
- 請求項1記載のセラミックス回路基板において、前記隔離層の厚さが10μm以上であることを特徴とするセラミックス回路基板。
- 請求項2記載のセラミックス回路基板において、前記隔離層の金属ペーストまたは金属箔を構成する金属がNi,SnおよびInのいずれかの金属であることを特徴とするセラミックス回路基板。
- セラミックス基板に金属回路板を接合して成るセラミックス回路基板において、窒化アルミニウム,窒化けい素および酸化アルミニウムの少なくとも1種からなるセラミックス基板と、このセラミックス基板に一体に形成されAlを主成分とするろう材または合金からなる第1接合層と、この第1接合層に一体に接合され、第1接合層と金属回路板との合金化を防止する隔離層と、この隔離層表面に形成されAlを主成分とするろう材または合金からなる第2接合層と、この第2接合層を介して接合される金属回路板とを備えることを特徴とするセラミックス回路基板。
- 請求項5記載のセラミックス回路基板において、前記接合層および隔離層の厚さがそれぞれ10μm以上であることを特徴とするセラミックス回路基板。
- 請求項1,5のいずれかに記載のセラミックス回路基板において、前記金属回路板は外周縁部内側に薄肉部を有することを特徴とするセラミックス回路基板。
- 請求項1,5のいずれかに記載のセラミックス回路基板において、前記金属回路板は、前記セラミックス基板との接合面の反対側の面の外周縁部内側に設けられる複数の孔を有することを特徴とするセラミックス回路基板。
- 請求項1,5のいずれかに記載のセラミックス回路基板において、前記金属回路板は、前記セラミックス基板との接合面の反対側の面の外周縁部内側に設けられ、外周縁部に沿って複数の不連続な溝を有することを特徴とするセラミックス回路基板。
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JP3152344B2 (ja) * | 1996-08-22 | 2001-04-03 | 三菱マテリアル株式会社 | セラミック回路基板 |
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JP3115238B2 (ja) * | 1996-09-09 | 2000-12-04 | 株式会社東芝 | 窒化けい素回路基板 |
JPH1093211A (ja) * | 1996-09-17 | 1998-04-10 | Toshiba Corp | 窒化けい素回路基板 |
JP3907818B2 (ja) * | 1997-03-14 | 2007-04-18 | 株式会社東芝 | 窒化珪素回路基板、半導体装置及び窒化珪素回路基板の製造方法 |
KR100371974B1 (ko) * | 1997-05-26 | 2003-02-17 | 스미토모덴키고교가부시키가이샤 | 구리회로접합기판 및 그 제조방법 |
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EP1056321B1 (en) * | 1999-05-28 | 2007-11-14 | Denki Kagaku Kogyo Kabushiki Kaisha | Ceramic substrate circuit and its manufacturing process |
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2000
- 2000-09-13 JP JP2000277578A patent/JP4649027B2/ja not_active Expired - Lifetime
- 2000-09-25 US US09/668,747 patent/US6426154B1/en not_active Expired - Lifetime
- 2000-09-27 EP EP06013119.0A patent/EP1701381B1/en not_active Expired - Lifetime
- 2000-09-27 EP EP06013121A patent/EP1722411A3/en not_active Withdrawn
- 2000-09-27 EP EP00120263A patent/EP1089334B8/en not_active Expired - Lifetime
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2010
- 2010-02-05 JP JP2010024694A patent/JP5023165B2/ja not_active Expired - Fee Related
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JPS6338244A (ja) * | 1986-08-04 | 1988-02-18 | Hitachi Cable Ltd | 半導体装置用セラミツク基板の製造方法およびその方法に使用するクラツド材 |
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Also Published As
Publication number | Publication date |
---|---|
EP1701381B1 (en) | 2016-06-15 |
JP4649027B2 (ja) | 2011-03-09 |
EP1722411A3 (en) | 2007-01-24 |
EP1089334A2 (en) | 2001-04-04 |
EP1722411A2 (en) | 2006-11-15 |
JP2001168482A (ja) | 2001-06-22 |
EP1701381A2 (en) | 2006-09-13 |
EP1089334B1 (en) | 2011-06-22 |
EP1089334B8 (en) | 2011-09-21 |
US6426154B1 (en) | 2002-07-30 |
EP1701381A3 (en) | 2006-11-22 |
JP5023165B2 (ja) | 2012-09-12 |
EP1089334A3 (en) | 2005-11-09 |
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