CN1717156B - 电子部件的安装方法、半导体模块及半导体器件 - Google Patents
电子部件的安装方法、半导体模块及半导体器件 Download PDFInfo
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- CN1717156B CN1717156B CN2004100978824A CN200410097882A CN1717156B CN 1717156 B CN1717156 B CN 1717156B CN 2004100978824 A CN2004100978824 A CN 2004100978824A CN 200410097882 A CN200410097882 A CN 200410097882A CN 1717156 B CN1717156 B CN 1717156B
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Abstract
本发明提供可实现缩小安装面积及薄形化的电子部件的安装方法、半导体模块及半导体器件。本发明的一个课题解决手段是将形成于基板上的电极和形成于电子部件上的电极进行接合的电子部件的安装方法,所述接合通过凝聚了至少一种金属粒子的金属层来进行接合。而且,所述金属粒子以平均粒径为1~50nm构成。另外,最好是构成其厚度为5~100μm的金属层。
Description
技术领域
本发明涉及电子部件的安装方法、半导体模块及半导体器件。
背景技术
通常,在PDC(个人数字蜂窝电话)方式的车载电话和携带电话、或PHS(个人手持电话***)方式的携带电话所代表的携带通信设备中,装入有高频功率放大器。众所周知,这种高频功率放大器由半导体模块构成,是将多个放大器多级连接的多级式放大器。
这种高频功率放大器将一主表面上形成了放大器的半导体芯片搭载在布线基板的一主表面上,将形成于半导体芯片的一主表面上的电极和形成于布线基板的一主表面上的电极用导电性的焊线(wire)进行电连接。
这种高频功率放大器例如为将多个场效应晶体管并联连接的结构。作为高频功率放大器的输入部的栅极端子与形成于半导体芯片的一主表面上的芯片侧输入用电极电连接。
另一方面,作为高频功率放大器的输出部的漏极端子与形成于半导体芯片的一主表面上的芯片侧输出用电极电连接。芯片侧输入用电极被配置在半导体芯片的一边一侧,芯片侧输出用电极被配置在与半导体芯片的这一边一侧相对的另一边一侧。
高频功率放大器的源极端子与形成于与半导体芯片的主表面相反的另一面(背面)上的背面电极电连接。背面电极被固定为基准电位。芯片侧输入用电极朝向半导体芯片的一边,经由输入用焊线与形成于布线基板的主表面上的基板侧输入用电极电连接。芯片侧输出用电极朝向半导体芯片的另一边,经由输出用焊线对形成于布线基板的 所述主表面上的基板侧输出用电极进行电连接。
具体的半导体模块记载在非专利文献1(日立评论社发行‘日立评论’1993年第4号、同年4月25日发行、P12~P26)中。该半导体模块(高频功率放大器用MOS功率模块)将功率MOS装入为三级,以提高输出。
此外,在上述文献中,介绍了各种封装(密封)形态的半导体模块。装入于携带电话中的半导体模块为了小型化而采用金属盖和表面封装方式。
采用了这样的金属盖(以下称为帽)和表面封装方式的现有的半导体模块的构造示于图15。玻璃陶瓷基板202通过焊料(未图示)被固定在矩形板状的散热凸缘201的主表面(上表面)上。
在该基板202的主表面(上表面)上,搭载了功率MOSFET(未图示)等有源部件和电阻、电容器(未图示)等的无源部件。MOSFET等的有源部件和外部端子通过焊线键合法来连接。
此外,在散热凸缘201上安装帽203,以覆盖玻璃陶瓷基板202的主表面。在帽203的一侧面上设有开口部分,通过该开口部分来安装其内端被固定在玻璃陶瓷基板202上的引线204。从散热凸缘201的侧缘起,将表面用散热片205以台阶状仅向外突出一段来配置。
表面用散热片205具有将热传递到封装了高频功率模块206的未图示的底架上作用,同时带有接地管脚。散热凸缘201通过在设置于玻璃陶瓷基板202中的通孔内填充的导体而与玻璃陶瓷基板202的主表面的接地布线电连接。
专利文献1(特开平10-50926号公报)中,公开了以下散热模块:在电路板的凹部容纳具有散热性的电路部件,通过在电路板的焊区电极上焊接电路部件的焊料突点、以及将这样得到的电路板经由导热部件搭载在主电路板上,而且将电路板的侧面上设置的端子电极焊接在主电路板上的焊区电极上,从而将来自电路部件的发热传递到主电路板来散热。
另一方面,在作为被用于逆变器等中的功率半导体器件之一的非 绝缘型半导体器件中,固定半导体元件的部件也是半导体器件的电极之一。例如,在将功率晶体管使用Sn-Pb类钎焊材料搭载在固定部件(例如铜-二氧化铜复合材料)上的装置中,固定部件(基底材料)也是功率晶体管的集电极。
实际运转时流过数安培以上的集电极电流,此时晶体管芯片发热。为了避免该发热引起的特性不稳定和寿命降低,基底材料必须在散热上优良,并且必须可确保钎焊部的可靠性。就确保钎焊部的可靠性来说,需要半导体元件和固定部件的热膨胀率的匹配。
即使在绝缘型半导体器件中,为了使半导体元件安全并且稳定地工作,也需要使半导体器件工作时产生的热高效率地散热到封装的外部、以及确保钎焊部的可靠性。
为了使上述条件清楚,在专利文献2(特开平8-11503号公报)中,公开了将在贴铜AlN基板上搭载了Si芯片的组件通过焊料而钎焊在Mo构成的支承部件上,并一体化的半导体电流控制器件。在该技术中,贴铜AlN基板被钎焊在热膨胀率与其近似的Mo支承部件(5.1ppm/℃)上,所以这些部件间的焊料接合部具有优良的可靠性。
在专利文献3(特公平7-26174号公报)中,公开了将在氧化铝基板上搭载了晶闸管芯片的组件搭载在由Al或Al合金中分散了SiC陶瓷粉末的复合材料构成的支承部件上的半导体模块器件。在该技术中,氧化铝基板(7.5ppm/℃)被搭载在热膨胀率与其近似的Al/SiC复合材料支承部件(2~13ppm/℃)上,所以这些部件间的接合部具有优良的可靠性。
[非专利文献1](日立评论社发行‘日立评论’1993年第4号、同年4月25日发行、P12~P26)
[专利文献1]特开平10-50926号公报
[专利文献2]特开平8-11503号公报
[专利文献3]特公平7-26174号公报
现有的半导体模块,如图15所示,由散热凸缘201和帽203构成的半导体模块206本体部分的尺寸例如被小型化到长21mm、宽 10mm、高度3.7mm。
但是,在半导体模块206的周围,例如具有长度2mm左右的表面用散热片205。该表面用散热片205被分别设置在高频功率模块206的三边,所以成为进一步缩小安装面积的阻碍。
此外,将上述有源部件和外部布线进行连接的键合焊线成为降低半导体模块的高度、即进一步薄形化的阻碍。
此外,上述公报中展示的模块,所述电路基板和电路部件及电路部件和主基板的接合都使用Sn类钎焊接合,难以在它们的接合温度上设置层次。
另一方面,搭载了功率半导体元件的半导体器件,在钎焊材料上使用以Sn-Pb共晶材料为首的低熔点的Sn类材料,所以不能在高温环境下(例如大于等于180℃)使用半导体器件。
发明内容
本发明提供可以实现安装面积的缩小、薄形化的电子部件的安装方法、半导体模块及半导体器件。
而且,本发明提供即使在高温环境下,也不损失长期可靠性的电子部件的安装方法、半导体模块及半导体器件。
本发明的一个课题解决方式是一种电子部件的安装方法,将形成于基板上的电极和形成于电子部件上的电极进行接合,所述接合通过凝聚了至少一种金属粒子的金属层来进行接合。而且,最好是所述金属粒子以平均粒径为1~50nm来构成。而且,最好是构成为其厚度为5~100μm的金属层。
最好是所述金属粒子由Au或Au合金、或者Ag或Ag合金构成。
此外,最好是所述金属粒子由核和在该核的表面上实施镀敷而构成。而且,所述核为Ni粒子,在该核的表面上镀敷Au或Au合金、或者Ag或Ag合金。或者,作为所述核,取代Ni粒子,形成为具有在该核的表面上涂敷粒子混合物后、在干燥和接合工序的温度下不产生变形及分解特性的核。或者,所述核为Cu粒子,在该核的表面上 实施Ni镀敷,并在其表面层上镀敷Au或Au合金、或者Ag或Ag合金。或者,作为所述核,取代Cu粒子,形成为具有在该核的表面上涂敷粒子混合物后、在干燥和接合工序的温度下不产生变形及分解特性的核。
此外,本发明的一个课题解决方式包括:向具有在表面上形成了Au或Au合金金属层的电极的基板上涂敷包含了由Au或Ag中至少一种金属构成的、平均粒径为1~50nm的金属粒子的液体的工序;在涂敷后进行加热,在所述Au或Au合金的电极上形成所述金属粒子的凝聚区域的工序;以及加热后进行冷却,从而在所述金属粒子的凝聚区域上搭载电子部件,然后以50~300℃的温度再次进行加热而使所述金属粒子和所述电子部件接合,将所述基板上的布线和所述电子部件进行电连接的工序。
此外,本发明的一个课题解决方式包括:在表面上具有电极的基板上形成疏水层的工序;在所述电极的预定区域中设置除去了所述疏水层的区域的工序;在除去了所述疏水层的区域中涂敷包含了由Au或Ag中至少一种金属构成的、平均粒径为1~50nm的金属粒子的液体的工序;在涂敷后进行加热,从而将所述Au或Au合金在电极上形成所述金属粒子的凝聚区域的工序;以及加热后进行冷却,从而在所述金属粒子的凝聚区域上搭载电子部件,然后以50~300℃的温度再次进行加热而使所述金属粒子和所述电子部件接合,将所述基板上的电极和所述电子部件进行电连接的工序。
而且,最好所述疏水层包括非晶含氟聚合体,并且非晶含氟聚合体在分子内具有全氟聚醚链和烷氧基硅烷残基,或具有氟代烷基链和烷氧基硅烷残基,所述疏水层包括非晶含氟聚合体,并且非晶含氟聚合体在分子内具有全氟聚醚链和烷氧基硅烷残基,或具有氟代烷基链和烷氧基硅烷残基。
此外,本发明的一个课题解决方式为:在基板的一表面侧设置凹部,同时在所述凹部的底面上形成平均粒径为1~50nm且从Au、Au合金、Ag、Ag合金中选择的至少一种微粒构成的金属层,并通过所 述金属层与设置在电子部件的一个表面侧上的端子连接。
此外,本发明的一个课题解决方式为:形成于基板上的电极和形成了电极的电子部件通过凝聚了至少一种金属粒子的金属层而接合。而且,最好是形成于基板上的电极和形成了电极的电子部件通过由Au或Ag中至少一种金属构成的、平均粒径为1~50nm的粒子所形成的金属层而接合。
而且,本发明的一个课题解决方式是一种半导体模块,具有多个半导体元件通过第一连接材料连接到形成了电极的基板上且该基板通过第二连接材料连接到外部安装基板上的结构,所述第二连接材料是凝聚了Au或Ag中至少一种金属粒子的金属层。而且,最好是所述第二连接材料是以Sn作为主体的焊料和无铅焊料的二者之一。
而且,本发明的一个课题解决方式是形成一种半导体器件,形成于基板表面上的电极和表面上形成了电极的电子部件通过由Au或Ag中至少一种金属构成的、平均粒径为1~50nm的金属粒子和1~100μm的金属粒子所构成的层而接合。而且,最好是形成一种半导体器件,平均粒径为1~100μm的金属粒子通过在镍粒子表面上形成Au或Au合金层而构成,或者平均粒径为1~100μm的粒子表面上结合有平均粒径为1~50nm的微粒。
根据本发明,可以提供能够实现安装面积的缩小、薄形化的电子部件的安装方法、半导体模块及半导体器件。
此外,根据本发明,可以提供即使在高温环境下,也不损失长期可靠性的电子部件的安装方法、半导体模块及半导体器件。
附图说明
图1是表示实施例1的半导体模块结构的概略图。
图2是表示实施例1的半导体模块的局部详细构造的详细图。
图3是图2的MOSFET元件和基板1的接合部的放大图。
图4是从对玻璃陶瓷基板的MOSFET搭载至对玻璃陶瓷基板的电路板的搭载的制造流程。
图5是MOSFET元件和基板1的接合部的放大图。
图6是表示一例将凝聚层用作接合层的半导体元件的纵剖面图。
图7是对玻璃陶瓷基板的MOSFET搭载流程。
图8是采用本实施例的半导体模块的携带电话的电路方框图。
图9是表示本发明实施例之一的绝缘型半导体器件构造的图。
图10表示图9所示的本发明绝缘型半导体器件的局部装配部。
图11是说明陶瓷绝缘基板的细节的平面图和剖面图。
图12是本实施例绝缘型半导体器件的电路的说明图。
图13是表示本发明另一实施例的绝缘布线基板的概略图。
图14是表示本发明又一实施例的绝缘布线基板的概略图。
图15是表示以往例的图。
图16是本发明另一实施例的绝缘型半导体器件的局部装配部概略图。
图17是图16的半导体元件和端子及布线接合部的放大图。
图18是元件和基板的接合部放大图。
图19是元件和基板的接合部的另一实施例的放大图。
图20是表示本发明另一实施例的立体图和剖面概略图。
图21是对有机多层基板的元件搭载流程图。
具体实施方式
以下,参照附图来说明本发明的实施方式。
(实施例1)
图1是表示本发明一实施例的半导体模块100的结构的概略图,图2是沿图1的A-A’线的纵剖面图。本实施例的半导体模块的厚度约0.45mm。
在图1及图2中,玻璃陶瓷制的基板1为多层构造,在层间形成传输布线107并形成有电容器、电阻、电感器等的无源元件。此外,在基板1中,形成用于安装用半导体材料构成的MOSFET元件101的凹部102。
基板1被安装在电路板103上。Au突点104用于将MOSFET元件101和基板1电连接,由平均粒径5nm的粒子构成。电极108形成于电路板103上,通过Sn类焊料106与基板1电连接。在基板1上,电容器、螺线管、电阻等无源部件111通过金属焊料(未图示)来搭载。环氧树脂110覆盖被搭载在基板1上的电容器、螺线管、电阻等无源部件111及MOSFET元件101。
图3是图2的MOSFET元件和基板1的接合部的放大图,即,是表 Au突点104的接合部细节的图。Au突点104由平均粒径5nm的粒子构成,覆盖电极501。由Au覆盖了形成于基板1上的表面的Ni制电极501在基板1内部与布线107、106连接。MOSFET上形成的电极502的表面被Au覆盖。
再有,本实施例的半导体模块指MOSFET元件101、安装了MOSFET元件101的基板1、基板1上搭载的电容器、螺线管、电阻等的无源部件111、以及为覆盖基板1上搭载的无源部件111及MOSFET元件101而形成的环氧树脂110所构成的集合体。
下面,参照图1和图2来说明有关本实施例的半导体模块的制造方法。
首先,制备通过烧结法而形成了传输布线及所述无源部件的多层构造的玻璃陶瓷基板1(厚度0.30mm)。在玻璃陶瓷基板1中,在玻璃陶瓷基板1的形成加工时同时形成其尺寸为可安装MOSFET程度的凹部102(图2)。
在凹部102的MOSFET搭载面上形成电极,其表面被镀敷Au。在搭载了电容器、螺线管、电阻等无源部件111一侧的表面上形成电极,以应对电容器、螺线管、电阻等的部件搭载。
下面,参照图4,说明从对玻璃陶瓷基板1的MOSFET搭载至对玻璃陶瓷基板1的电路板的搭载的制造流程。
首先,在玻璃陶瓷基板1的形成了凹部102的表面上,在形成了Au薄膜的Ni电极上使用喷墨法来涂敷包含了平均粒径5nm的Au粒子的溶液(图4(a)、图4(b))。然后进行干燥,使Au粒子形成 的凸状电极(突点)形成在Ni电极上(c)。在干燥时,也可以施加30℃~80℃左右的热。
使MOSFET配置在该Au突点上,在上述玻璃陶瓷基板的凹部中连接MOSFET(c)、(e)。此时将80℃左右的热施加60分钟。接着,在玻璃陶瓷基板上的预定位置上通过包含90wt%的Pb、10wt%的Sn的膏状焊料来配置电容器、螺线管、电阻等的无源部件。与将MOSFET搭载后的氧化铝基板搭载在电路板上时使用的Sn为主体的膏状焊料相比,以Pb为主体的膏状焊料的熔点高。
接着,在330℃左右的温度下焊接安装电容器、螺线管、电阻等的无源部件111(g)。接着,在玻璃陶瓷基板1上搭载的电容器、螺线管、电阻等的无源部件111上,使用预定的模具来流入环氧树脂110,保持该状态在120℃左右的高温下使环氧树脂110固化。
接着,在与玻璃陶瓷基板1的电路板搭载部对应的电极上,丝网印刷Sn类焊料膏。此时的Sn类焊料膏的厚度约为500μm。接着,在印刷了Sn类焊料膏的电路板103上,进行定位配置,以使搭载了MOSFET的玻璃陶瓷基板1位于预定的位置,然后,使其通过峰值温度为250℃的回流炉(h)。由此,结束对搭载了MOSFET的玻璃陶瓷基板1的电路板103的搭载,完成本实施例的高频功率模块(i)。
在本实施例中,电容器、螺线管、电阻等的无源部件111的搭载中使用的膏状焊料是主成分为Pb的焊料,其熔点比Sn类焊料高,所以在玻璃陶瓷基板1的搭载时没有再熔融。
不使用Pb主体的焊料,与MOSFET搭载同样,使用Au纳米粒子层进行连接也可以。这种情况下,MOSFET和无源部件111同时进行搭载。再有,高频功率模块与同一电路板103上搭载的其他任何部件相比,最好是其高度低。
再有,在搭载了MOSFET的玻璃陶瓷基板1的凹部102中,为了避免机械撞击和湿气等为原因的化学变化而保护MOSFET,最好是填充树脂。
此外,图1和图4是本发明的一实施例,各元件的配置不限于此。
此外,MOSFET这样的有源部件也可以搭载多个。
在本实施例中,也可以使用氧化铝制、氮化铝制、玻璃制、以及有机材料制的多层布线基板来取代玻璃陶瓷基板1。此外,在本实施例中,也可以在基板的集成电路元件搭载部中设置凹部102。而且,也可以是覆盖金属和树脂制的盖来取代环氧树脂的构造。
由Au纳米粒子构成的突点也可以形成在MOSFET那样的集成电路元件上的电极上。这种情况下,Au纳米粒子凝聚层为图5所示的形状。图5是表示MOSFET元件和基板1的接合部的放大图,即是表示Au突点104的接合部细节的图。
Au突点104由平均粒径5nm的粒子构成。Ni制电极501形成在基板1上,其表面被Au覆盖,在基板1内部与布线107、106连接。MOSFET上形成的电极502的表面被Au覆盖。Au突点104形成为覆盖电极502。
如以上说明,本发明是应用了将Au纳米粒子凝聚在Au电极上的新的自然现象的安装技术。将该凝聚层作为接合层来应用。此时,由于在将MOSFET这样的半导体元件搭载在基板上时可不附加载荷进行接合,所以还可以对形成了用于构成半导体元件的电子电路的布线的区域(有源区域)上的电极进行接合。
图6是表示其一例的图,在半导体元件602的有源区域整体面上形成表面为Au的电极焊盘604,通过Au纳米粒子形成的突点606,将基板608上形成的表面与Au的电极焊盘610连接。Au纳米粒子的突点形成、以及半导体元件和基板的连接按与上述同样的方法进行。
因此,可将以往设置在有源区域之外的接合用电极设置在有源区域上,可以提供半导体元件的小型化、安装面积缩小、薄形的半导体器件和电子装置。而且,不产生接合损伤。因而可大幅度地提高生产合格率。此外,在本发明的纳米粒子接合法中,构成了接合层的纳米粒子层呈现固体金属或固体金属合金的性质,与Au和Ag同样具有高熔点。因而接合层在上述接合温度下没有再熔融。因此,如本实施例那样,即使在将玻璃陶瓷基板1搭载在电路板103上时使用高熔点的 焊料,也没有再熔融。在通过镀敷突点、柱状突点法形成的Au突点的固相接合中,在接合时需要施加机械的外力(加压、超声波振动)。对元件的有源区域上的接合因产生键合损伤而不能进行。
而在本实施例中,在将玻璃陶瓷基板1搭载在电路板103上时使用了高熔点的焊料,但这里也可以使用纳米粒子凝聚层。如果将玻璃陶瓷基板1搭载在电路板103上的二次安装时的部件为本发明的纳米粒子凝聚层,则可在80℃左右的低温下进行连接,因而不必担心将MOSFET等元件搭载在基板上的焊料的再熔融,作为一次安装用的焊料,也可使用低熔点的焊料,所以材料的选择范围广。
以往,在使用无铅焊料的情况下,难以使二次安装的安装温度达到无铅焊料的熔点以下,存在二次安装时的再熔融的课题,而通过将本发明的纳米粒子凝聚层用作二次安装用的连接材料,没有二次安装时的再熔融,可以采用无铅焊料作为一次安装用的焊料。
再有,元件的对基板的安装方式不限于本实施例中说明的倒装片构造,也可以为用焊线键合等来连接元件和基板的构造。此外,在一次安装时的连接材料和二次安装时的连接材料两者中都可以采用本发明的纳米粒子凝聚层。这种情况下,由于可在低温下进行连接,所以可以抑制对基板和元件等部件的热变形。此外,纳米粒子凝聚层在抗腐蚀性上也优良,可以获得连接可靠性高的半导体器件。
这样,本发明的纳米粒子凝聚层可应用于电子电路装置中使用的连接部件。此外,可采用本发明的半导体器件涉及高频模块、多芯片模块(封装上的***)、网格焊球阵列、片上安装等多个领域。
(实施例2)
参照图1和图2来说明本实施例的半导体模块的制造方法。
首先,制备通过烧结法而形成了传输布线及所述无源部件的多层构造的玻璃陶瓷基板1(厚度0.30mm)。在玻璃陶瓷基板1中,在玻璃陶瓷基板1的形成加工时同时形成其尺寸为可安装MOSFET程度的凹部102。
凹部102的深度为MOSFET搭载后MOSFET的背面与玻璃陶 瓷基板1的MOSFET搭载侧的表面相同的高度的尺寸。在凹部102的MOSFET搭载面上形成金属布线,表面被镀敷Au。在搭载了电容器、螺线管、电阻等的无源部件111一侧的表面上形成有电极布线,以应对电容器、螺线管、电阻等的无源部件111的搭载。
下面,参照图7的玻璃陶瓷基板凹部102的放大概略图,说明对玻璃陶瓷基板1的MOSFET搭载流程。
首先,在玻璃陶瓷基板1的凹部102的MOSFET搭载面上形成疏水膜。疏水膜例如由非晶含氟聚合体构成,非晶含氟聚合体使用在分子内具有全氟聚醚链和烷氧基硅烷残基或具有氟代烷基链和烷氧基硅烷残基的非晶含氟聚合体。
接着,通过激光曝光法来剥离在形成了玻璃陶瓷基板1的凹部102的MOSFET搭载面的表面上表层覆盖了Au的Ni电极501上的疏水膜,仅使表层覆盖了Au的Ni电极上形成亲水区(a)。
接着,使用喷墨法涂敷包含了平均粒径5nm的Au粒子的溶液(b)。然后进行干燥,使Au粒子形成的凸状电极104(突点)形成在Ni电极501上。在干燥时,也可以施加30℃~80℃左右的热(c)。在该Au突点上配置MOSFET,在上述玻璃陶瓷基板1的凹部102中连接MOSFET。此时将80℃左右的热施加60分钟,搭载MOSFET元件101(d)。
直至无源部件111、及玻璃陶瓷基板1的对电路板103的搭载的制造流程与实施例1同样地进行,从而完成本实施例的高频功率模块。再有,在本实施例中,也可以使用氧化铝制、氮化铝制、玻璃制、以及有机材料制的多层布线基板来取代玻璃陶瓷基板1。此外,在本实施例中,也可以在基板的集成电路元件搭载部中设置凹部102。而且,也可以是覆盖金属和树脂制的盖来取代环氧树脂的构造。
由Au纳米粒子构成的突点也可以形成在MOSFET那样的集成电路元件上的电极上。
如以上说明,本实施例是使用疏水膜而使Au纳米粒子局部地凝聚,短时间内形成接合层的例子。因而在电子装置中,除了小型化、 接合部的无损伤导致的生产合格率提高以外,还具有生产时间缩短带来的生产率提高的效果。
(实施例3)
在本实施例中,将实施例1和实施例2的Au制突点置换为Ag制突点。以上说明的各实施例可应用于蜂窝电话机等的发送部中使用的高频功率放大装置的制造。
图8是应用了本实施例的半导体模块的携带电话的电路方框图。从麦克风输入的声音信号在混合器12中被变换为来自发送器14的高频信号,通过作为功率放大器的绝缘型半导体器件16(MOSFET)、天线共用器18而从天线20被作为电波发射。
发送功率通过耦合器22来监视,通过将监视输出反馈到作为功率放大器的绝缘型半导体器件16而保持恒定。在该携带电话中使用800~1000MHz频带的电波。以上,将本发明的实施例与高频功率放大器相关联进行了说明,但本发明的半导体模块100不限于实施例记载的范围。天线20接收的信号通过高频接收部22、声音处理装置24被提供到扬声器26。
(实施例4)
图9是表示本发明的实施例之一的绝缘型半导体器件的构造图。图9(a)是上表面图,图9(b)是图9(a)的A-A’部的剖面图。在将半导体元件(MOSFET)301焊接搭载在陶瓷绝缘基板302上,将陶瓷绝缘基板302焊接搭载在基材303上后,设置环氧类树脂外壳304、键合焊线305、环氧类树脂盖306,在同一外壳内填充硅酮凝胶树脂307。
这里,基材303上的陶瓷绝缘基板302被平均粒径5nm的Au粒子构成的接合层308(厚度100μm)接合,在陶瓷绝缘板302的铜板202a上8个Si构成的MOSFET元件(尺寸为7mm×7mm×0.4mm)301被平均粒径5nm的Au粒子构成的接合层309(厚度30μm)接合。
首先,Au纳米粒子构成的接合层308和309产生的接合,首先,是在陶瓷绝缘板302的铜板302a(实施了Ni镀敷)上、以及基材303 上涂敷包含了平均粒径5nm的Au粒子的溶液。
然后进行干燥,使形成了Au粒子的接合层分别形成在铜板302a(实施了Ni镀敷)上和基材303上。在进行干燥时,也可以施加30℃至80℃左右的热。
在该Au接合层上配置并连接半导体元件301、以及陶瓷绝缘板302。此时将80℃左右的热施加60分钟。
在各元件301上形成的栅极电极、发射极电极等和绝缘基板上形成的电极302、环氧类树脂外壳304上预先安装的端子310间,使用直径300μm的Al线305通过超声波接合法进行焊线键合。311是温度检测用热敏电阻元件,用Sn-3wt%、Ag-0.5wt%的Cu焊料309焊接安装,将电极302和端子310之间用直径300μm的Al线305进行焊线键合,连接到外部。
再有,环氧类树脂外壳304和基材303之间使用硅酮粘结树脂(未图示)来固定。在环氧类树脂盖306的内壁部中设有凹部306’,在端子210中设有孔210’,以安装用于将绝缘型半导体器件1000与外部电路连接的螺钉(未图示)。端子210是预先冲切为预定形状,在成形的铜板中实施了Ni镀敷的端子,被安装在环氧类树脂外壳220上。
图10表示图9所示的本发明绝缘型半导体器件的局部装配部,将陶瓷基板和半导体元件搭载在作为基材的复合材303上,基材303的尺寸为74mm×43mm×3mm,在周边部设有安装孔(直径5.6mm)303A。基材由Cu构成,在其表面上实施厚度为203μm的Ni镀敷。
在基材303上通过Au纳米粒子层来搭载陶瓷绝缘基板302,然后在陶瓷基板302上通过Au纳米粒子层来搭载MOSFET元件301。此外,在基材303上以对应于陶瓷绝缘基板302搭载区域来施加疏水膜322,防止Au纳米粒子含有液涂敷时的溶液流动。
而且,在陶瓷绝缘基板302上,以对应于MOSFET元件301的搭载区域来施加疏水膜321,防止Au纳米粒子含有液涂敷时的溶液流动。再有,该绝缘型半导体器件1000为100V、400A级的半导体器件。
图11是说明陶瓷绝缘基板的细节的平面及剖面图。陶瓷绝缘基 板302是在具有尺寸为50mm×30mm×0.6mm的AlN烧结体(热膨胀系数4.3ppm/℃,热导率160W/m·K)220的两面上,通过Ag-Cu类焊接材料(未图示,厚度20μm)分别接合厚度300μm的Cu-Cu2O复合材料板302a(兼用漏极电极)、302b(兼用源极电极)、302c(用于搭载热敏电阻)、以及厚度250μm的Cu-Cu2O复合材料板302d。
在布线材料中使用Cu-Cu2O复合材料的原因是,实现与AlN烧结体的热膨胀系数的匹配,确保长期可靠性。再有,在Cu-Cu2O复合材料板302a、302b、302c、及302d的表面上实施厚度2μm的Ni镀敷(未图示)。此外,作为AlN烧结体302的代替物,可以使用氮化硅烧结体(热膨胀系数3.1ppm/℃,热导率120W/m·K)。
图12是说明本实施例的绝缘型半导体器件的电路图。四个并联配置的MOSFET元件301的块1001被串联连接,从预定的位置引出输入端子Ain、输出端子Aout等。此外,用于检测该电路工作时的温度的热敏电阻211被独立配置在绝缘型半导体器件1000内。
如以上说明,本发明的实施例通过Au纳米粒子构成的接合层,可在低温下将半导体元件、电路基板搭载在目标基板上。因而可以降低高温下接合情况那样的电路基板变形、以及接合后的接合层中产生的残留应力,可以提高作为半导体器件的可靠性。
此外,在本发明的实施例的纳米粒子接合法中,构成接合层的纳米粒子层作为主体材料起作用。因而接合层在上述接合温度下没有再熔融。因此,可以应用于搭载了在碳化硅和氮化镓等的高温环境下可动作的半导体元件的半导体器件。
而且,本发明的实施例使用了将纳米等级的金属粒子凝聚在电极上的新的自然现象的安装方法。在通过该凝聚层将半导体元件和布线基板进行接合时,可在低温下、并且不附加载荷地进行接合,所以不产生接合损伤,可以大幅度地提高制品可靠性和生产合格率。
此外,由于可实现低负载接合,所以可对形成了半导体元件的布线的区域进行接合。因而可以缩小半导体元件面积,所以可以提供小型电子装置。
接合后的金属粒子凝聚层(接合层)作为构成接合层的金属粒子材料的主体材料起作用。因此,在本发明的实施例中将搭载了半导体元件的电子部件搭载在电路板上时,即使使用Sn、或Pb为主体的焊料,上述接合层也不产生再熔融。由此,可以提高生产合格率。
(实施例5)
图13是在构成IGBT的半导体元件的发射极电极上安装了由具有应力缓冲效应的金属构成的板的绝缘布线基板的概略图。IGBT在IGBT芯片132的发射极电极上通过Au纳米粒子而设有应力缓冲板134。应力缓冲板134的材质由Cu、Cu-Cu2O复合材料、Cu-Mo复合材料、Cu-W复合材料、Cu-殷钢-Cu叠层材料、Cu-C复合材料等构成。最好是在应力缓冲材料134的表面上实施Ni镀敷。此外,其厚度最好在0.05mm~0.1mm左右的范围。应力缓冲板134按与上述同样的方法来接合。
键合焊线136的材质可以采用纯Al、Al-Si、掺 Ni的Al-Si等。在该构造中,应力缓冲材料134因在低温下被接合而与Si构成的IGBT芯片132之间的变形小。此外,在将接合了应力缓冲板134的IGBT芯片132经由Sn类焊料装载在布线基板138上时,作为芯片132和应力缓冲板134之间的接合层的Au纳米粒子层没有再熔融。而且,通过在应力缓冲板134上进行焊线键合,使Al引线材料和Si芯片间产生的热变形缓和,所以键合焊线的连接寿命提高。
图14是安装了由SiC构成的半导体元件的绝缘布线基板的概略图。半导体元件142经由Au纳米粒子层而被安装在绝缘布线基板144上。键合焊线146将半导体芯片142和布线148之间进行连接。在该构造中,由于半导体芯片142在低温下进行接合,所以与SiC构成的半导体元件芯片142之间产生的残留变形小。此外,即使在温度为200℃左右的高温环境下,作为芯片和布线板间的接合层的Au纳米粒子层也没有再熔融。
(实施例6)
图16是表示采用了本发明的非绝缘型半导体器件的另一个实施 例的图。
在本实施例中,半导体元件401和陶瓷绝缘基板403通过平均粒径5nm的Au粒子构成的接合层来接合。半导体元件的发射极电极也经由接合端子431,通过Au粒子层来连接在陶瓷绝缘基板上形成的实施了表面镀敷Au和Ni的铜布线402b。
图17是表示图16的半导体元件装载部分的剖面放大概略图的图。连接用端子431采用对铜板实施Ni镀敷,并对其表面进行金镀敷的端子,在绝缘基板的布线402a上装载半导体元件401后,将平均粒径5nm的Au粒子含有液涂敷在半导体元件的发射极电极(上侧)上。而且,用绝缘基板402上形成的铜布线图形对表面进行Ni镀敷处理,进而在通过端子431而与半导体元件的发射极电极连接的部分,在进行了Au镀敷处理的布线402b的Au镀敷部分上涂敷Au粒子含有液。在对这些半导体元件和绝缘基板上的布线上涂敷的Au含有液进行干燥,并形成金粒子构成的电极部分后,通过将连接用端子431装载在这种金粒子构成的电极上部上进行60分钟的80℃左右的加热,从而完成半导体元件301和布线402b的连接。在绝缘型半导体器件中,由于不仅在集电极中而且还在发射极电极部分中流过大电流,所以通过采用布线宽度宽的连接端子431,可以进一步提高发射极侧的连接可靠性。
(实施例7)
本实施例说明采用在实施例1中使用的接合层的另一形态的例子。再有,作为MOSFET元件和基板1的接合层的Au突点104以外的结构、模块的制造方法与实施例1相同。
图18是图2的MOSFET元件和基板1的接合部的放大图,表示Au突点104的接合部细节。Au突点104由体积比为5∶1的平均粒径5nm和平均粒径20μm组成的粒子的混合物构成,覆盖电极501。被Au覆盖了形成于基板1上的表面的Ni制电极501在基板1内部与布线107、106连接。MOSFET上形成的电极502的表面被Au覆盖。在本实施例中,将由具有不同的平均粒径的粒子构成的层用作接合层。这里,作为接合层,最好是由1至50nm的微粒和1至100μm的金属 微粒构成的层。
此外,本实施例的由Au粒子构成的突点也可以形成在MOSFET这样的集成电路元件上的电极上。这种情况下,Au纳米粒子凝聚层为图18那样的形状。图19是表示将MOSFET元件和基板1的接合部放大,即Au突点104的接合部细节的图。Au突点104是由各体积比为5∶1的平均粒径5nm和平均粒径20μm组成的混合物粒子构成的Au突点,Ni制电极501形成在基板1上,其表面被Au覆盖,在基板1内部与布线106、107连接。MOSFET上形成的电极502的表面被Au覆盖。Au突点104以覆盖电极502而形成。
在本实施例中,平均粒径为1至50nm的微粒具有在其熔点以下的温度进行凝聚的性质。因此,通过与粒径大到1至100μm的金属粒子进行配合,与仅用微粒来形成的情况相比,可形成厚的凝聚层。在电子部件和装载它的基板的热膨胀系数极大不同的情况下,如果该接合层厚,则因热膨胀系数的不同而产生的热应力在接合部分被缓和,可提高接合部分的可靠性。
而且在涂敷时,通过与粒径大到1至100μm的金属粒子进行配合,可形成厚的涂敷层,所以难以造成接合层形成时的缺陷,可进一步提高接合部的寿命。此外,用于接合的基板电极表面和电子部件电极表面因形成于内层的布线的影响而有凹凸,在接合层薄时,在基板上的电极和电子部件的电极间有产生未接合部的危险。而且,形成于基板上的电极和电子部件的电极受到基板和电子部件制造中的布线形成或热处理等工序的影响而变形,各自的电极从同一平面上稍稍产生偏移。因此,在基板上的电极和电子部件的电极的连接中高度低的电极有可能未进行连接。因此,通过将平均粒径为1至50nm的微粒和平均粒径为1至100μm的粒子混合使用,可通过配合平均粒径大的金属粒子来进行仅用微粒而难以形成厚的接合层的涂敷、形成,不易造成未连接和连接部的缺陷。
作为1至50nm的微粒,可以采用从金、银、铜、铂、钯、铑、锇、钌、铱、铁、锡、锌、钴、镍、铬、钛、钽、钨、铟、硅、铝等 中至少一种金属或两种以上金属构成的合金,特别是Au或Au合金构成的微粒,或最好是将Ag或Ag合金构成的微粒分别单独使用或混合两种以上使用。而且,作为平均粒径1至100μm的金属粒子,可以采用Au或Au合金构成的粒子或者Ag或Ag合金构成的粒子、以镍粒子作为核在表面上镀敷了Au或Au合金或者Ag或Ag合金的粒子、或在铜的核粒子表面上实施镍镀敷再在其表层镀敷了Au或Au合金或者Ag或Ag合金的粒子。此外,作为核的粒子不仅是金属,如聚酰亚胺或聚醚酰亚胺等那样,如果是在粒子混合物涂敷后的干燥和接合工序的温度中不产生变形和分解的核,则可作为核材料来使用,在该粒子的表面上形成了无电解法或镀敷用导电膜后,用电解法进行镍镀敷,然后与金属粒子的情况同样,在其表面上可以实施Au或Au合金、或者Ag或Ag合金的镀敷。
这些金属微粒和金属粒子的混合物产生与各个粒子表面相互作用并且在接合温度下容易地分散在可分离的水或表面活性剂中来使用,以在保管或涂敷工序中凝聚并使各个粒子不熔融。
分散了这种微粒和粒子的膏,有以下涂敷方法:通过喷墨法使膏从微细喷嘴喷射而涂敷在基板上的电极或电子部件的连接部上的方法;或采用对涂敷部分进行开口的金属掩模或网状掩模仅在必要部分上进行涂敷的方法;采用分配器而涂敷在必要部分上的方法;用仅在必要的部分开口的金属掩模或网状掩模来涂敷硅酮或包含氟等的疏水性树脂,通过曝光和显像而将涂敷了所述微粒等构成的膏的部分除去,然后将接合用膏涂敷在该开口部的方法;以及将疏水性树脂涂敷在基板或电子部件上后,通过激光而除去所述金属粒子构成的膏涂敷部分,然后将接合用膏涂敷在该开口部的方法。这些涂敷方法可根据要接合的电极的面积、形状来组合。
再有,作为实施例2~6的接合层,不言而喻,通过采用本实施例的接合层,可获得与本实施例相同的效果。
(实施例8)
参照图20来说明本实施例的半导体模块的制造方法。
首先,准备形成了传输布线的多层结构的有机基板600(厚度0.30mm)。在有机多层基板600中,将可安装MOSFET尺寸程度的凹部602形成在有机多层基板600中。
在凹部602的MOSFET装载面上形成金属布线,其表面被镀敷Au。在装载了电容器、螺线管、电阻等的无源部件611一侧的表面上形成电极布线,以应对电容器、螺线管、电阻等的无源部件611的装载。
下面,参照图21,说明对有机多层基板600的MOSFET装载流程。
首先,在形成了图21(a)所示的有机多层基板600的凹部102的MoSFET装载面的表面上,在被Au薄膜覆盖的金属布线(兼用电极)上涂敷包含了平均粒径5nm的Au粒子和Ag粒子的溶液,将Au和Ag粒子形成的凸状的层(突点)形成在电极上(图21(b))。在该AuAg突点上配置MOSFET,在上述有机多层基板600的凹部602中装载MOSFET(图21(c))。此时进行60分钟80℃左右的加热,对MoSFET进行接合(图21(d))。
通过无源部件611、以及有机多层基板600的对电路基板603的装载前的制造流程与实施例1同样地进行来完成本实施例的高频功率模块。再有,在本实施例中,取代有机多层基板,也可以采用氧化铝制、氮化铝制、玻璃制、以及玻璃陶瓷制的多层布线基板。此外,也可以在基板的集成电路元件装载部中不设置凹部。而且,取代环氧树脂,也可以是覆盖了金属或树脂制的盖的结构。焊接接合部也可以如网格焊球阵列(BGA)那样采用焊球。在Ag和Au的分配上没有限制。
如以上说明,本实施例是局部地设置了混合Au和Ag微粒的接合层,在短时间内完成接合的例子。Au和Ag不形成特定的化合物相,处于连续固溶体状态。因而在Au和Ag的接触部中没有接合缺陷,具有良好的导电性及导热性。而且,由于含有Au,所以对于来自密封的树脂的成分或从外部进入的水分等具有抑制Ag溶出的电迁移(离子迁移)的效果。
Claims (12)
1.一种电子部件的安装方法,其特征在于,包括:
向具有在表面上形成了Au或Au合金金属层的电极的基板上涂敷平均粒径为1~50nm的金属粒子的液体的工序;
在涂敷后进行加热,在所述Au或Au合金的电极上形成所述金属粒子的凝聚区域的工序;以及
加热后进行冷却,在所述金属粒子的凝聚区域上搭载电子部件,然后以50~300℃的温度再次进行加热而使所述金属粒子和所述电子部件接合,将所述基板上的布线和所述电子部件电连接的工序。
2.如权利要求1的电子部件的安装方法,其特征在于,所述金属粒子构成厚度为5~100μm的金属层。
3.如权利要求1的电子部件的安装方法,其特征在于,所述金属粒子由Au或Au合金、或者Ag或Ag合金构成。
4.如权利要求1的电子部件的安装方法,其特征在于,所述金属粒子包含核和在该核的表面上实施镀敷而构成的粒子。
5.如权利要求4的电子部件的安装方法,其特征在于,所述核为Ni粒子,在该核的表面上镀敷Au或Au合金、或者Ag或Ag合金。
6.如权利要求4的电子部件的安装方法,其特征在于,所述核为Cu粒子,在该核的表面上实施Ni镀敷,并在其表面层上镀敷Au或Au合金、或者Ag或Ag合金。
7.如权利要求5的电子部件的安装方法,其特征在于,作为所述核,取代Ni粒子,形成为具有在该核的表面上涂敷粒子混合物后、在干燥和接合工序的温度下不产生变形及分解的特性的核。
8.如权利要求6的电子部件的安装方法,其特征在于,作为所述核,取代Cu粒子,形成为具有在该核的表面上涂敷粒子混合物后、在干燥和接合工序的温度下不产生变形及分解的特性的核。
9.一种电子部件的安装方法,其特征在于,包括:
在表面上具有电极的基板上形成疏水层的工序;
在所述电极的预定区域中设置除去了所述疏水层的区域的工序;
在除去了所述疏水层的区域中涂敷包含了由Au或Ag中至少一种金属构成的、平均粒径为1~50nm的金属粒子的液体的工序;
在涂敷后进行加热,从而将所述Au或Au合金在电极上形成所述金属粒子的凝聚区域的工序;以及
加热后进行冷却,在所述金属粒子的凝聚区域上搭载电子部件,然后以50~300℃的温度再次进行加热而使所述金属粒子和所述电子部件接合,将所述基板上的电极和所述电子部件电连接的工序。
10.如权利要求9的电子部件的安装方法,其中,所述疏水层包括非晶含氟聚合体,并且非晶含氟聚合体在分子内具有全氟聚醚链和烷氧基硅烷残基或者具有氟代烷基链和烷氧基硅烷残基。
11.一种电子部件的安装方法,其特征在于,包括:
在基板的一表面侧设置凹部,并且在所述凹部的底面上对凹部涂覆平均粒径为1~50nm且包含从Au、Au合金、Ag、Ag合金中选择的至少一种微粒的液体的工序;
涂覆后进行加热,形成所述金属粒子的凝聚区域的工序;以及
加热后进行冷却,在所述金属粒子的凝聚区域上搭载电子部件,然后以50~300℃的温度再次进行加热而使所述金属粒子和所述电子部件接合,将所述基板上的凹部和所述电子部件电连接的工序。
12.一种半导体模块,具有包括电极的基板和电子部件,其特征在于,通过权利要求1所述的方法来接合所述电极和电子部件。
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Also Published As
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US7393771B2 (en) | 2008-07-01 |
US20070216012A1 (en) | 2007-09-20 |
CN1717156A (zh) | 2006-01-04 |
US20060267218A1 (en) | 2006-11-30 |
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