CN102736657B - 电压调节器 - Google Patents

电压调节器 Download PDF

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CN102736657B
CN102736657B CN201210089368.0A CN201210089368A CN102736657B CN 102736657 B CN102736657 B CN 102736657B CN 201210089368 A CN201210089368 A CN 201210089368A CN 102736657 B CN102736657 B CN 102736657B
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voltage
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S·亨
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Ablic Inc
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/569Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
    • G05F1/573Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/569Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection

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  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

本发明提供一种与基准电压电路的启动特性无关,能够连续且顺畅地防止冲击电流的电压调节器。该电压调节器具有冲击电流防止电路,该冲击电流防止电路由以下部分构成:恒流电路;第一晶体管,其源极与恒流电路连接,栅极由输出电压检测电路控制;电容,其连接在第一晶体管和输出晶体管的栅极之间;第二晶体管,其栅极与第一晶体管的源极连接,源极与电源端子连接;以及第三晶体管,其连接在第二晶体管和输出晶体管之间,栅极由输出电压检测电路控制。

Description

电压调节器
技术领域
本发明涉及具有冲击电流防止电路的电压调节器,更具体而言,涉及限制输出驱动器的栅极的变动量来控制冲击电流,以抑制启动时产生的流过输出电容的冲击电流的冲击电流防止电路。
背景技术
对以往的冲击电流防止电路进行说明。图3是以往的恒压电路的电路图。恒压电路由恒压源401和作为冲击电流防止电路的软启动电路构成。软启动电路具有比较器404、延迟电路412、恒流源407、电容408、电阻403和开关402、410、411。
恒流源407和电容408的接点与恒压电路的输出端子101连接。比较器404的非反转输入端子与输出端子101连接,反转输入端子经由偏置电压405与恒压源401的输出端子连接。比较器404的输出端子与开关402、恒流源407以及延迟电路412连接。延迟电路412的输出端子与开关411连接。
电容408从恒流源407接收恒定电流Ic的电流而被充电。比较器404对从恒压源401的输出电压减去预定的偏置电压405后的电压、和恒流源407与电容408的接点处的电压进行比较,输出与其比较结果对应的输出电压。比较器404的输出电压对开关402、恒流源407进行控制,并经由延迟电路412对开关411进行控制。当开关402接通时,从恒压源401经由电阻403,按照RC的时间常数向电容408进行充电。延迟电路412在从接收到比较器404的高电平(Hi)的输出电压起经过预定时间后接通开关411。当开关411接通时,将恒压源401的输出电压直接输出到输出端子101。
对以往的恒压电路的动作进行说明。在开关410接通的状态下,恒压电路停止工作,输出端子101的输出电压成为0V。当开关410断开时,恒压电路开始工作。从恒流源407接收恒定电流Ic的电流,开始对电容408进行恒流充电。此时,输出端子101的输出电压根据恒定电流Ic和电容408直线上升。当充电到电容408的电压超过从恒压源401的电压减去偏置电压405后的电压时,比较器404的输出信号反转。因此,开关402接通,恒流源407停止,延迟电路412开始工作。由于恒流源407停止,由此,恒压源401的输出电压经由电阻403对电容408进行充电。
从延迟电路412开始工作起经过预定时间之后,开关411接通,由此,恒压源401的输出电压直接成为输出端子101的输出电压。如以上所说明的那样,恒压电路的输出端子101的输出电压逐渐上升,由此能够防止恒压电路的输出端子101的冲击电流(例如参照专利文献1图2)。
【专利文献1】日本特开2000-56843号公报
但是,在现有技术中,是利用开关对软启动期间与恒压输出期间进行切换,因此存在直线上升的输出电压不连续的问题。并且,由于需要比较器和延迟电路,因此存在电路规模大的问题。
发明内容
本发明鉴于上述问题,提供一种电路规模小、输出电压连续且能够顺畅地启动的具有冲击电流防止电路的电压调节器。
本发明的具有冲击电流防止电路的电压调节器具有:输出基准电压的基准电压电路;输出晶体管;第一差动放大电路,其对所述基准电压与对所述输出晶体管输出的电压进行分压后的分压电压之差进行放大而输出,控制所述输出晶体管的栅极;冲击电流防止电路,其控制所述输出晶体管的栅极电压,防止冲击电流;以及输出电压检测电路,其控制所述冲击电流防止电路,该电压调节器的特征在于,所述冲击电流防止电路具有:一端与电源端子连接的恒流电路;第一晶体管,其源极与所述恒流电路的另一端连接,栅极由所述输出电压检测电路控制;电容,其一端与所述第一晶体管的漏极连接,另一端与所述输出晶体管的栅极连接;第二晶体管,其栅极与所述第一晶体管的源极连接,源极与电源端子连接;以及第三晶体管,其漏极与所述输出晶体管的栅极连接,源极与所述第二晶体管的漏极连接,栅极由所述输出电压检测电路控制。
本发明的具有冲击电流防止电路的电压调节器不使用开关,因此能够连续地抑制冲击电流。并且,自身不消耗电流,能够减小电路规模。
附图说明
图1是示出第一实施方式的电压调节器的电路图。
图2是示出第二实施方式的电压调节器的电路图。
图3是示出以往的电压调节器的电路图。
标号说明
100:接地端子
150:电源电压端子
180:输出电压端子
101:基准电压电路
102、404:差动放大电路
103:冲击电流防止电路
202:恒流电路
401:恒压源
407:恒流源
412:延迟电路
具体实施方式
参照附图对用于实施本发明的方式进行说明。
【实施例1】
图1是第一实施方式的电压调节器的电路图。第一实施方式的电压调节器由以下部分构成:基准电压电路101、差动放大电路102、PMOS晶体管104、电阻105、106、冲击电流防止电路103、输出电压检测电路110、电源端子150、接地端子100、输出端子180。冲击电流防止电路103由以下部分构成:输入端子210、输出端子211、PMOS晶体管203、204、205、恒流电路202、电容206。
关于差动放大电路102,其反转输入端子与基准电压电路101连接,非反转输入端子与电阻105和106的连接点连接,输出端子与PMOS晶体管104的栅极以及冲击电流防止电路103的输出端子211连接。基准电压电路101的另一方与接地端子100连接。关于PMOS晶体管104,其源极与电源端子150连接,漏极与输出端子180及电阻105的另一方连接。电阻106的另一方与接地端子100连接。关于PMOS晶体管204,其栅极与冲击电流防止电路103的输入端子210以及PMOS晶体管205的栅极连接,源极与恒流电路202以及PMOS晶体管203的栅极连接,漏极与电容206连接。恒流电路202的另一方与电源端子150连接。关于PMOS晶体管205,其源极与PMOS晶体管203的漏极连接,漏极与电容206的另一方以及冲击电流防止电路103的输出端子211连接。PMOS晶体管203的源极与电源端子150连接。输入端子210与输出电压检测电路110连接。
对本实施方式的电压调节器的动作进行说明。
电阻105和106对作为输出端子180的电压的输出电压Vout进行分压,并输出分压电压Vfb。差动放大电路102对基准电压电路101的输出电压Vref和分压电压Vfb进行比较,控制PMOS晶体管104的栅极电压,使得输出电压Vout恒定。当输出电压Vout高于目标值时,分压电压Vfb高于基准电压Vref,从而差动放大电路102的输出信号(PMOS晶体管104的栅极电压)变高。并且,PMOS晶体管104向截止变化,输出电压Vout变低。由此,将输出电压Vout控制为恒定。当输出电压Vout低于目标值时,进行相反的动作,从而输出电压Vout变高。由此将输出电压Vout控制为恒定。
接着,对本实施方式的电压调节器的电源电压启动时的动作进行说明。
差动放大电路102检测到输出电压Vout低的情况,并控制栅极电压,使得PMOS晶体管104导通。输出电压检测电路110向冲击电流防止电路103的端子210输出低电平(Lo)的信号。冲击电流防止电路103中的PMOS晶体管204和205导通。当PMOS晶体管204导通时,PMOS晶体管203的栅极电压成为低电平,因此PMOS晶体管203导通。由于PMOS晶体管203和PMOS晶体管205导通,因此控制PMOS晶体管104的栅极电压,使得PMOS晶体管104截止。此处,将流过PMOS晶体管203和PMOS晶体管205的电流设计得比流过差动放大电路102的输出级晶体管的电流小。因此,PMOS晶体管203和PMOS晶体管205起到防止差动放大电路102过度地导通PMOS晶体管104的作用。由此,冲击电流防止电路103抑制了输出端子180的冲击电流。
在电源电压启动时,根据稳态电容和负载电流的条件的不同,PMOS晶体管104的栅极的瞬态变动量也发生变化,因此,该变动量越大,使得PMOS晶体管203的栅极电压相对于电源电压的变动量越大,使PMOS晶体管104的栅极返回电源电压的动作也变强。反之,如果减小变动量,则减小PMOS晶体管203的栅极电压相对于电源电压的变动量,对于PMOS晶体管104的栅极的动作基本消失。由此,能够与稳态电容和负载电流对应地,将冲击电流抑制到最小限度,并且能够进行高速启动。
在输出电压启动后,从输出电压检测电路110输出高电平的信号。输入端子210的电压成为高电平,因此PMOS晶体管204、205截止,冲击电流防止电路103停止工作。由此,能够在通常工作时防止误动作,实现低功耗化。
如上所述,第一实施方式的电压调节器能够防止电源启动时的冲击电流并实现高速启动。
【实施例2】
图2是第2实施方式的电压调节器的电路图。与图1的不同点为:将恒流电路202变更为电阻301。即使是这种结构,也能够与第一实施方式的电压调节器同样地进行工作。

Claims (2)

1.一种电压调节器,其具有:
输出基准电压的基准电压电路;
输出晶体管;
第一差动放大电路,其对所述基准电压与分压电压之差进行放大而输出,控制所述输出晶体管的栅极,所述分压电压是对所述输出晶体管输出的电压进行分压而得到的;
冲击电流防止电路,其控制所述输出晶体管的栅极电压,防止冲击电流;以及
输出电压检测电路,其控制所述冲击电流防止电路,
该电压调节器的特征在于,
所述冲击电流防止电路具有:
恒流电路,其一端与电源端子连接;
第一晶体管,其源极与所述恒流电路的另一端连接,栅极由所述输出电压检测电路控制;
电容,其一端与所述第一晶体管的漏极连接,另一端与所述输出晶体管的栅极连接;
第二晶体管,其栅极与所述第一晶体管的源极连接,源极与电源端子连接;以及
第三晶体管,其漏极与所述输出晶体管的栅极连接,源极与所述第二晶体管的漏极连接,栅极由所述输出电压检测电路控制,
流过所述第二晶体管和所述第三晶体管的电流比流过所述第一差动放大电路的输出级晶体管的电流小。
2.根据权利要求1所述的电压调节器,其特征在于,
所述恒流电路由电阻构成。
CN201210089368.0A 2011-03-30 2012-03-29 电压调节器 Expired - Fee Related CN102736657B (zh)

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CN102736657A (zh) 2012-10-17
JP5676340B2 (ja) 2015-02-25
TW201310188A (zh) 2013-03-01
JP2012208867A (ja) 2012-10-25
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US8593120B2 (en) 2013-11-26
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