CN101479846B - 利用已形成的耦合件进行倒装互连 - Google Patents

利用已形成的耦合件进行倒装互连 Download PDF

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CN101479846B
CN101479846B CN200780023981XA CN200780023981A CN101479846B CN 101479846 B CN101479846 B CN 101479846B CN 200780023981X A CN200780023981X A CN 200780023981XA CN 200780023981 A CN200780023981 A CN 200780023981A CN 101479846 B CN101479846 B CN 101479846B
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salient point
pad
coupled
electric
electric coupling
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CN101479846A (zh
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W·苏多尔
M·威尔逊
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Koninklijke Philips NV
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Abstract

一种位于第一电气部件与第二电气部件(250，260)之间的倒装电耦合件。该耦合件包括凸点(210)和焊盘(220)。该凸点(210)电耦合到第一电气部件(250)。该焊盘(220)电耦合到第二电气部件(260)。该焊盘(220)电耦合到该凸点(210)的对应耦合表面(214)并且该焊盘(220)的尺寸小于该凸点(210)的对应耦合表面(214)。可以利用超声波柱形凸点键合工艺、导电环氧树脂等将焊盘(220)和凸点(210)电耦合到一起。

Description

利用已形成的耦合件进行倒装互连
本***涉及一种将倒装型电互连与已形成的电焊盘连接一起使用的互连方法和装置。
当前的集成电路(IC)正在向尺寸不断减小、复杂性不断增大的方面发展。随着部件密度的增大，电耦合部件的***已经变得至关重要，这是因为物理互连占据着可用表面积的很大部分，从而减弱了在该区域内设置电路的能力。
已知有一种电互连技术，其中由接触凸点形成互连的一个部分，由接触焊盘形成互连的另一部分。焊盘使形成电连接的手段变得容易。凸点不仅提供了形成电连接的手段，而且它还具有很大的高度以在连接的基板之间提供物理分隔。通常，在ASIC的表面上制造凸点，而焊盘位于声学元件的底部。在制造过程中，使凸点和焊盘彼此接触以形成电互连。美国专利No.6015652针对安装在基板上的IC披露了一种这样的互连***，被称为“倒装键合”，通过引用将该专利并入本文，如同它的全文是在本文中阐述了一样。这种典型的互连***减轻了与其他电互连***相关联的一些问题，但它仍占据了大量的可用表面积，否则这些可用表面积可以供电子部件使用。当直接为诸如专用集成电路(ASIC)之类的集成电路制造电互连时，这个问题更加严重了。
PCT专利申请WO 2004/052209披露了一种为了形成微型换能器而将ASIC电耦合到多个声学元件的***，通过引用将该专利并入本文，如同它的全文是在本文中阐述了一样。在所示的***中，凸点电耦合到声学元件或ASIC之一，焊盘电耦合到声学元件或ASIC中的另一个。该***实现了一种小的电气封装，例如可以形成这种封装来制造用于食管检查、腹腔镜检查和心内检查的超声换能器。但是，由于这些产品假定声学元件正下方的单元电路的间距匹配(pitch match)，因此希望进一步减小该间距。目前的混合信号ASIC工艺和正常工作所需的电压仍然限制着进一步减小声学元件和控制电路。例如，对于如图1所示的采用柱形凸点110的倒装互连***100而言，在185μm间距阵列上方，大约有40％的ASIC面积由于这些凸点而不能供电路使用。电互连到凸点的焊盘或表面在横向穿过接触所述凸点的表面上一般比凸点的接触表面大。换言之，与焊盘形成电互连的凸点表面小于焊盘上对应的接触表面。
本***的目的在于克服现有技术中的不足和/或做出改进。本***的目的在于通过使用芯片制造技术来提供多种减小间距的方法，这可以通过使用例如典型的ASIC技术来实现。
根据本***，在第一电气部件与第二电气部件之间形成倒装电耦合件(flip-chip electrical coupling)。所述耦合件包括凸点和焊盘。所述凸点电耦合到第一电气部件。所述焊盘电耦合到第二电气部件。所述焊盘电耦合到所述凸点的对应耦合表面并且所述焊盘的尺寸小于所述凸点的所述对应耦合表面。在一个实施例中，可以利用超声波柱形凸点键合工艺将焊盘和凸点电耦合到一起。在另一个实施例中，可以利用导电环氧树脂将焊盘和凸点电耦合到一起。所述凸点可以是柱形、球形等。
在同一个或另一个实施例中，第一电气部件可以是声学元件且/或第二电气部件可以是ASIC。所述耦合件可以是存在于小于150μm的间距阵列中的多个电耦合件之一。
以下是对示例性实施例的描述，在结合下列附图阅读时，它们将展示上述特征和优点以及其他特征和优点。在下列描述中，出于解释的目的而非限制的目的，阐述了诸如特定架构、接口、技术等的具体细节以便进行示例。然而，对于本领域普通技术人员显而易见的是，没有这些具体细节的其他实施例仍然将被理解为在所附权利要求的范围内。此外，为了明晰起见，省略了对公知器件、电路和方法的详细描述以免使本***的描述模糊不清。
应当清楚地理解，包括附图是出于示例的目的，并不代表本***的范围。在附图中，不同图中的类似附图标记表示类似的元件。
图1示出了现有技术的倒装互连***；
图2示出了根据本***实施例的倒装互连的示例性横截面；以及
图3示出了根据本***实施例的图2所示的示例性倒装互连***200的详细横截面区域部分290。
图2示出了根据本***实施例的倒装互连***200的示例性横截面。在本实施例中，以柱形凸点的形式示出了一种高纵横比的凸点210，在制造期间将该凸点被电耦合到诸如声学元件250等电气部件的去匹配层表面230。该凸点可以是任何形状，包括球形、柱形或其它适合应用的形状。声学元件可以是用于产生超声能量发射的类型，如可用于超声换能器应用的类型。
图3示出了根据本***实施例的图2所示的示例性倒装互连***200的详细横截面区域部分290。可以使用任何制造工艺，例如电镀、机器加工、形成、电子平版印刷术、引线键合或任何其他适合应用的制造工艺来制造该凸点210。在一种应用中，凸点210的高度可以在50-150μm高的范围内，例如100μm高，并且其具有与声学元件250电耦合的接触表面214，且具有介于50-120μm范围内的直径，例如70μm的直径。凸点210的高度有助于在连接的基板(例如声学元件250和ASIC 260)之间提供物理分隔。
根据本***的实施例，诸如ASIC 260之类的IC具有接触焊盘220，这些接触焊盘220通过焊盘220的接触表面224电耦合到ASIC 260。可以通过ASIC 260的接触金属化层265来提供电耦合，或者通过用于在接触焊盘220与ASIC 260之间提供电互连的任何其他***来提供电耦合。在一个实施例中，焊盘220可以具有介于10-70μm范围内的直径225，例如20μm的直径，并且焊盘220具有介于1-30μm范围内的高度，例如15μm的高度。可以利用任何形成工艺和/或沉积工艺(包括电解电镀、溅镀、光沉积或其他适合应用的***)来形成焊盘220。在一个实施例中，可以简单地利用金的电解电镀来形成焊盘220，利用低成本治金技术可以容易地实现这种电解电镀。
根据本***，与凸点210的接触表面215相比，将焊盘220形成为具有小的直径225。例如，接触表面215可以具有介于40-80μm范围内的直径218，例如50μm的直径。与现有***相比，通过在ASIC 260上形成直径较小的焊盘220，可以将ASIC表面积的更大部分用于电路。例如，可以将本互连***合适地应用于150μm和更小的细间距阵列中。在另一个实施例中，可以利用低温低压键合技术(例如超声波柱形凸点键合)来形成凸点210的接触表面215与焊盘220的接触表面228之间的电耦合。该技术具有附加的优点，即，由于在键合表面之间(例如凸点与焊盘之间)采用了低压，因此可以将焊盘220下方的(例如ASIC 260的顶部金属化层265下方的)ASIC 260的面积用于电路，相应地，这导致了比现有***具有更多可用的ASIC面积。在另一个实施例中，可以利用导电环氧树脂来将焊盘220和凸点210电耦合到一起。
此外，应该容易地认识到，虽然在示例性实施例中示出了三个声学元件250具有三个互连***(例如凸点210和焊盘220)，但是可以采用更多或更少的互连***，这取决于预期的应用。声学元件250可以是任何类型并可以具有任何构造，包括便于3维(3D)成像的构造(例如可用于3D超声成像应用)和/或矩阵换能器构造。
当然，应该认识到，可以将上述实施例或工艺中的任一个与一个或多个其他实施例或工艺组合，以便根据本***提供更进一步的改进。
最后，上面的论述仅仅意在对本***进行示例，而不应被视为将所附权利要求限制为任何特定实施例或实施例组。这样，尽管已经参考其特定示范性实施例详细描述了本***，但是还应当认识到，在不脱离如下面的权利要求所阐述的本***的更广阔期望精神和范围的情况下，本领域的普通技术人员可以想到很多修改和备选实施例。因此，应该将本说明书和附图当作是示例的方式，它们并不是要限制所附权利要求的范围。
在解释所附权利要求时，应当理解：
a)“包括”一词不排除存在给定权利要求所列元件或动作之外的元件或动作；
b)元件前的“一个”或“一种”一词并不排除存在多个这种元件；
c)权利要求中的任何附图标记并不限制它们的范围；
d)若干“装置”可以由同一物品或硬件或软件实现的结构或功能来代表；
e)任何所披露的元件都可以包括硬件部分(例如，包括分立电子电路和集成电子电路)、软件部分(例如计算机程序)和其任意组合；
f)硬件部分可以包括模拟部分和数字部分之一或两者；
g)可以将所披露的任何装置或其部分组合到一起或进一步分成多个部分，除非另行给出具体声明；以及
h)不要求动作或步骤具有任何特定次序，除非另行具体指出。

Claims (17)

1.一种位于第一电气部件与第二电气部件(250，260)之间的倒装电耦合件，所述耦合件包括：
包括第一电耦合表面和第二电耦合表面(214，215)的凸点(210)，其中所述凸点(210)的所述第一耦合表面(214)电耦合到所述第一电气部件(250)；以及
包括第一电耦合表面和第二电耦合表面(224，228)的焊盘(220)，其中所述焊盘(220)的所述第一耦合表面(224)电耦合到所述第二电气部件(260)，所述焊盘(220)的所述第二电耦合表面(228)电耦合到所述凸点(210)的所述第二电耦合表面(215)且所述焊盘(220)的所述第二电耦合表面(228)的尺寸小于所述凸点(210)的所述第二电耦合表面(215)，
其中所述凸点(210)被配置为具有介于50-150μm范围内的凸点高度。
2.根据权利要求1所述的耦合件，其中所述凸点(210)为柱形凸点。
3.根据权利要求1所述的耦合件，其中所述凸点(210)为球形凸点。
4.根据权利要求1所述的耦合件，其中所述凸点的所述第一耦合表面(214)具有介于50-120μm范围内的直径。
5.根据权利要求1所述的耦合件，其中所述焊盘(220)被配置为具有介于10-70μm范围内的直径。
6.根据权利要求1所述的耦合件，其中所述第一电气部件(250)为声学元件。
7.根据权利要求1所述的耦合件，其中所述第二电气部件(260)为ASIC。 
8.根据权利要求7所述的耦合件，其中所述ASIC被配置为具有位于所述焊盘下方的电路。
9.根据权利要求1所述的耦合件，其中所述耦合件被配置成是在小于150μm的间距阵列中的多个电耦合件之一。
10.一种用于在第一电气部件与第二电气部件(250，260)之间形成倒装电耦合件的方法，所述方法包括如下动作：
将凸点部分(210)耦合到所述第一电气部件(250)；
将焊盘部分(220)耦合到所述第二电气部件(260)；
将所述凸点部分(210)耦合到所述焊盘部分(220)，其中所述焊盘部分(220)的耦合到所述凸点部分(210)的表面(228)的尺寸小于所述凸点部分(210)的对应耦合表面(215)；以及
形成所述凸点部分(210)，其中所述凸点部分(210)具有介于50-150μm范围内的凸点高度。
11.根据权利要求10所述的方法，包括将所述凸点部分(210)形成为柱形凸点部分的动作。
12.根据权利要求10所述的方法，其中所述凸点部分(210)具有耦合到所述第一电气部件(250)的、直径在50-120μm范围内的表面(214)。
13.根据权利要求10所述的方法，包括形成直径在10-70μm范围内的所述焊盘部分(220)的动作。
14.根据权利要求10所述的方法，其中所述的将所述凸点部分(210)耦合到所述焊盘部分(220)的动作是利用低温低键合压力耦合技术执行的。
15.根据权利要求14所述的方法，其中所述低温低键合压力耦合技术是超声波柱形凸点键合。 
16.根据权利要求10所述的方法，包括将所述倒装电耦合件形成是在小于150μm的间距阵列内形成的多个电耦合件之一的动作。
17.根据权利要求10所述的方法，其中所述的将所述凸点部分(210)耦合到所述焊盘部分(220)的动作是利用导电环氧树脂执行的。 
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