JPS55146952A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS55146952A
JPS55146952A JP5349079A JP5349079A JPS55146952A JP S55146952 A JPS55146952 A JP S55146952A JP 5349079 A JP5349079 A JP 5349079A JP 5349079 A JP5349079 A JP 5349079A JP S55146952 A JPS55146952 A JP S55146952A
Authority
JP
Japan
Prior art keywords
lead frame
framework
leads
connecting piece
cut
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5349079A
Other languages
Japanese (ja)
Inventor
Kazuo Shimizu
Fumihito Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5349079A priority Critical patent/JPS55146952A/en
Publication of JPS55146952A publication Critical patent/JPS55146952A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the yield of semiconductor device by providing a lead frame having cantilevered elongated leads extending along the framework, wherein a part of leads is fixed to the framework by means of connecting pieces which are cut off later, so as to avoid distortion of the lead frame. CONSTITUTION:A lead frame 3 having a tab 7 to which a semiconductor pellet 10 is fixed is provided with a plurality of elongated leads 2. The leads are surrounding by a main framework 4 and an auxiliary framework 5 to form an integral body. In this structure, the lead 2 adjacent to a pair of the main framework 4 is cantilevered and has the greatest length, so that it is liable to be distorted by an external force. Therefore, in this lead frame, a connecting piece is used to interconnect this lead 2 and the auxiliary framework 5. This connecting piece is easy to cut off, but is left uncut till the molding is completed. The connecting piece has, to this end, a groove 13 for facilitating the cutting. In the production of the semiconductor device, the semiconductor pellet 10 is fixed to the tab 7 of the thus constructed lead frame, and the electrodes of the pellet 10 are connected to the leads 2 by means of wires 11. Then, a resin molding is conducted and, thereafter, the connecting piece 12 is cut off at its groove 13.
JP5349079A 1979-05-02 1979-05-02 Lead frame Pending JPS55146952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5349079A JPS55146952A (en) 1979-05-02 1979-05-02 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5349079A JPS55146952A (en) 1979-05-02 1979-05-02 Lead frame

Publications (1)

Publication Number Publication Date
JPS55146952A true JPS55146952A (en) 1980-11-15

Family

ID=12944273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5349079A Pending JPS55146952A (en) 1979-05-02 1979-05-02 Lead frame

Country Status (1)

Country Link
JP (1) JPS55146952A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59104149A (en) * 1982-12-06 1984-06-15 Hitachi Chem Co Ltd Forming method for package of semiconductor
JPS62180957U (en) * 1986-05-06 1987-11-17
JPH0546282Y2 (en) * 1987-11-26 1993-12-03

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5265670A (en) * 1975-11-27 1977-05-31 Mitsubishi Electric Corp Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5265670A (en) * 1975-11-27 1977-05-31 Mitsubishi Electric Corp Production of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59104149A (en) * 1982-12-06 1984-06-15 Hitachi Chem Co Ltd Forming method for package of semiconductor
JPS62180957U (en) * 1986-05-06 1987-11-17
JPH0546282Y2 (en) * 1987-11-26 1993-12-03

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