JPS55146951A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS55146951A
JPS55146951A JP5348679A JP5348679A JPS55146951A JP S55146951 A JPS55146951 A JP S55146951A JP 5348679 A JP5348679 A JP 5348679A JP 5348679 A JP5348679 A JP 5348679A JP S55146951 A JPS55146951 A JP S55146951A
Authority
JP
Japan
Prior art keywords
framework
frame
lead
lead frame
connecting piece
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5348679A
Other languages
Japanese (ja)
Other versions
JPS6239543B2 (en
Inventor
Kazuo Shimizu
Fumihito Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5348679A priority Critical patent/JPS55146951A/en
Publication of JPS55146951A publication Critical patent/JPS55146951A/en
Publication of JPS6239543B2 publication Critical patent/JPS6239543B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the size of lead frame through a reduction of width of the framework of the lead frame, by providing the locating hole not in the frame work but in the lead portion of the lead frame. CONSTITUTION:An ordinary lead frame 3 has a tab 7 to which a semiconductor pellet 10 is fixed. The outermost framework 4 constituting the frame 3 is formed to have a reduced width by a punching. Accordingly, the framework 4 has a reduced mechanical strength and the cantilevered outermost lead 2 projecting in one direction therefrom has also a reduced strength. The framework 4 and the lead 2 are therefore connected by means of an auxiliary framework 5. A weak connecting piece 12 is disposed between the main framework 4 and the auxiliary frame 5 to enhance the strength of whole part of the frame 3. Then, the positioning hole 9 is formed. In this case, however, the positioning hole 9, which is usually formed in the main framework 4, is formed over the connecting piece 12 and a locally widened lead 2, because the main framework 4 has a reduced width. Then, the pellet 10 is fixed onto the tab 7, and the connecting piece 12 is cut off after the molding.
JP5348679A 1979-05-02 1979-05-02 Lead frame Granted JPS55146951A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5348679A JPS55146951A (en) 1979-05-02 1979-05-02 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5348679A JPS55146951A (en) 1979-05-02 1979-05-02 Lead frame

Publications (2)

Publication Number Publication Date
JPS55146951A true JPS55146951A (en) 1980-11-15
JPS6239543B2 JPS6239543B2 (en) 1987-08-24

Family

ID=12944166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5348679A Granted JPS55146951A (en) 1979-05-02 1979-05-02 Lead frame

Country Status (1)

Country Link
JP (1) JPS55146951A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59500340A (en) * 1982-03-08 1984-03-01 モトロ−ラ・インコ−ポレ−テツド integrated circuit lead frame
JPS59104149A (en) * 1982-12-06 1984-06-15 Hitachi Chem Co Ltd Forming method for package of semiconductor
JPS59132640A (en) * 1983-01-20 1984-07-30 Nec Corp Lead frame for semiconductor element
JPS60176552U (en) * 1984-04-28 1985-11-22 凸版印刷株式会社 etching parts
JPS6139558A (en) * 1984-07-31 1986-02-25 Toshiba Glass Co Ltd Semiconductor circuit substrate
JPH04164357A (en) * 1990-10-29 1992-06-10 Nec Corp Lead frame for semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59500340A (en) * 1982-03-08 1984-03-01 モトロ−ラ・インコ−ポレ−テツド integrated circuit lead frame
JPS59104149A (en) * 1982-12-06 1984-06-15 Hitachi Chem Co Ltd Forming method for package of semiconductor
JPS59132640A (en) * 1983-01-20 1984-07-30 Nec Corp Lead frame for semiconductor element
JPH0151060B2 (en) * 1983-01-20 1989-11-01 Nippon Electric Co
JPS60176552U (en) * 1984-04-28 1985-11-22 凸版印刷株式会社 etching parts
JPS6139558A (en) * 1984-07-31 1986-02-25 Toshiba Glass Co Ltd Semiconductor circuit substrate
JPH04164357A (en) * 1990-10-29 1992-06-10 Nec Corp Lead frame for semiconductor device

Also Published As

Publication number Publication date
JPS6239543B2 (en) 1987-08-24

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