JP6736531B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6736531B2 JP6736531B2 JP2017176263A JP2017176263A JP6736531B2 JP 6736531 B2 JP6736531 B2 JP 6736531B2 JP 2017176263 A JP2017176263 A JP 2017176263A JP 2017176263 A JP2017176263 A JP 2017176263A JP 6736531 B2 JP6736531 B2 JP 6736531B2
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- 239000004065 semiconductor Substances 0.000 title claims description 99
- 239000012535 impurity Substances 0.000 claims description 33
- 230000000052 comparative effect Effects 0.000 description 12
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 5
- 229910052796 boron Inorganic materials 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- 239000000969 carrier Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000010408 sweeping Methods 0.000 description 1
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Description
第1の実施形態の半導体装置は、第1の面と第2の面を有する半導体層の中に設けられた第1導電型の第1のアノード領域と、第1のアノード領域と第2の面との間に設けられた第2導電型の第1のカソード領域と、第1のアノード領域と第1のカソード領域との間に設けられ、第1のカソード領域よりも第2導電型の不純物濃度の低い第2導電型のドリフト領域と、半導体層の中に設けられて第1の方向に伸長する第1のトレンチと、第1のトレンチの中に設けられた第1のトレンチ絶縁膜と、第1のトレンチの中であって、第1のトレンチ絶縁膜の上に設けられ、第1のアノード領域に電気的に接続された第1のトレンチ電極と、を有する第1のダイオード部と、半導体層の中に設けられた第1導電型の第2のアノード領域と、第2のアノード領域と第2の面との間に設けられた第2導電型の第2のカソード領域と、第2のアノード領域と第2のカソード領域との間に設けられたドリフト領域と、半導体層の中に設けられて第1の方向に伸長する第2のトレンチと、第2のトレンチの中に設けられた第2のトレンチ絶縁膜と、第2のトレンチの中であって、第2のトレンチ絶縁膜の上に設けられ、第2のアノード領域に電気的に接続された第2のトレンチ電極と、を有し、第1の方向の幅が、第1のダイオード領域の第1の方向に直交する第2の方向の幅よりも大きく、第1のダイオード部の第1の方向に隣り合って設けられた第2のダイオード部と、半導体層の中に設けられた第2導電型の第1のエミッタ領域と、第1のエミッタ領域と第2の面との間に設けられた第1導電型の第1のコレクタ領域と、第1のエミッタ領域と第1のコレクタ領域との間に設けられたドリフト領域と、第1のエミッタ領域とドリフト領域との間に設けられた第1導電型の第1のベース領域と、半導体層の中に設けられて第1の方向に伸長する第3のトレンチと、第3のトレンチの中に設けられた第1のゲート絶縁膜と、第3のトレンチの中であって、第1のゲート絶縁膜の上に設けられた第1のゲート電極と、を有し、第1のダイオード部の第2の方向に隣り合って設けられ、第2のダイオード部の第1の方向に隣り合って設けられた第1のIGBT部と、を備える。
第2の実施形態の半導体装置は、第1のコレクタ領域が第1のダイオード部に設けられた点で、第1の実施形態と異なる。以下、第1の実施形態と重複する内容については、一部記述を省略する。
第3の実施形態の半導体装置は、第2のIGBT部を更に、備え、第2のIGBT部は、第1のダイオード部及び第2のダイオード部の第2の方向に隣り合って設けられ、半導体層の中に設けられた第2導電型の第2のエミッタ領域と、第2のエミッタ領域と第2の面との間に設けられた第1導電型の第2のコレクタ領域と、第2のエミッタ領域と第2のコレクタ領域との間に設けられたドリフト領域と、第2のエミッタ領域とドリフト領域との間に設けられた第1導電型の第2のベース領域と、半導体層の中に設けられて第1の方向に伸長する第4のトレンチと、第4のトレンチの中に設けられた第2のゲート絶縁膜と、第4のトレンチの中であって第2のゲート絶縁膜の上に設けられた第2のゲート電極と、を有し、第2のコレクタ領域と第1のコレクタ領域が物理的に接続され、第2のコレクタ領域の第2の方向の幅が第1のコレクタ領域の第1の方向の幅よりも大きい点で、第1の実施形態と異なる。以下、第1の実施形態と重複する内容については、一部記述を省略する。
12 p型のアノード領域(第1のアノード領域)
16 n+型のカソード領域(第1のカソード領域)
18 n−型のドリフト領域
24 トレンチ(第1のトレンチ)
26 トレンチ絶縁膜(第1のトレンチ絶縁膜)
28 トレンチ電極(第1のトレンチ電極)
30 n+型のエミッタ領域(第1のエミッタ領域)
34 p型のベース領域(第1のベース領域)
36 p+型のコレクタ領域(第1のコレクタ領域)
44 トレンチ(第3のトレンチ)
46 ゲート絶縁膜(第1のゲート絶縁膜)
48 ゲート電極(第1のゲート電極)
52 p型のアノード領域(第2のアノード領域)
56 n+型のカソード領域(第2のカソード領域)
64 トレンチ(第2のトレンチ)
66 トレンチ絶縁膜(第2のトレンチ絶縁膜)
68 トレンチ電極(第2のトレンチ電極)
70 n+型のエミッタ領域(第2のエミッタ領域)
74 p型のベース領域(第2のベース領域)
76 p+型のコレクタ領域(第2のコレクタ領域)
84 トレンチ(第4のトレンチ)
86 ゲート絶縁膜(第2のゲート絶縁膜)
88 ゲート電極(第2のゲート電極)
100 RC−IGBT(半導体装置)
111 セルダイオード部(第1のダイオード部)
112 リーディングダイオード部(第2のダイオード部)
113 セルIGBT部(第1のIGBT部)
114 リーディングIGBT部(第2のIGBT部)
Claims (9)
- 第1の面と第2の面を有する半導体層の中に設けられた第1導電型の第1のアノード領域と、
前記第1のアノード領域と前記第2の面との間に設けられた第2導電型の第1のカソード領域と、
前記第1のアノード領域と前記第1のカソード領域との間に設けられ、前記第1のカソード領域よりも第2導電型の不純物濃度の低い第2導電型のドリフト領域と、
前記半導体層の中に設けられて第1の方向に伸長する第1のトレンチと、
前記第1のトレンチの中に設けられた第1のトレンチ絶縁膜と、
前記第1のトレンチの中であって、前記第1のトレンチ絶縁膜の上に設けられ、前記第1のアノード領域に電気的に接続された第1のトレンチ電極と、を有する第1のダイオード部と、
前記半導体層の中に設けられた第1導電型の第2のアノード領域と、
前記第2のアノード領域と前記第2の面との間に設けられた第2導電型の第2のカソード領域と、
前記第2のアノード領域と前記第2のカソード領域との間に設けられた前記ドリフト領域と、
前記半導体層の中に設けられて前記第1の方向に伸長する第2のトレンチと、
前記第2のトレンチの中に設けられた第2のトレンチ絶縁膜と、
第2のトレンチの中であって、前記第2のトレンチ絶縁膜の上に設けられ、前記第2のアノード領域に電気的に接続された第2のトレンチ電極と、を有し、
前記第1の方向の幅が、前記第1のダイオード部の前記第1の方向に直交する第2の方向の幅よりも大きく、
前記第1のダイオード部の前記第1の方向に隣り合って設けられた第2のダイオード部と、
前記半導体層の中に設けられた第2導電型の第1のエミッタ領域と、
前記第1のエミッタ領域と前記第2の面との間に設けられた第1導電型の第1のコレクタ領域と、
前記第1のエミッタ領域と前記第1のコレクタ領域との間に設けられた前記ドリフト領域と、
前記第1のエミッタ領域と前記ドリフト領域との間に設けられた第1導電型の第1のベース領域と、
前記半導体層の中に設けられて前記第1の方向に伸長する第3のトレンチと、
前記第3のトレンチの中に設けられた第1のゲート絶縁膜と、
前記第3のトレンチの中であって、前記第1のゲート絶縁膜の上に設けられた第1のゲート電極と、を有し、
前記第1のダイオード部の前記第2の方向に隣り合って設けられ、前記第2のダイオード部の前記第1の方向に隣り合って設けられた第1のIGBT部と、
を備える半導体装置。 - 前記第2のダイオード部の前記第1の方向の幅が60μm以上である請求項1記載の半導体装置。
- 前記第1のトレンチと前記第2のトレンチは連続している請求項1又は請求項2記載の半導体装置。
- 前記第2のトレンチと前記第3のトレンチは離間している請求項1乃至請求項3いずれか一項記載の半導体装置。
- 前記第1のコレクタ領域が前記第1のダイオード部に設けられた請求項1乃至請求項4いずれか一項記載の半導体装置。
- 前記第1のカソード領域が前記第1のIGBT部に設けられた請求項5記載の半導体装置。
- 前記第1の方向に隣り合う2つの前記第1のコレクタ領域の間に前記第1のカソード領域が設けられ、前記第1のコレクタ領域と前記第1のカソード領域が接続されている請求項6記載の半導体装置。
- 第2のIGBT部を更に、備え、
前記第2のIGBT部は、
前記第1のダイオード部及び前記第2のダイオード部の前記第2の方向に隣り合って設けられ、
前記半導体層の中に設けられた第2導電型の第2のエミッタ領域と、
前記第2のエミッタ領域と前記第2の面との間に設けられた第1導電型の第2のコレクタ領域と、
前記第2のエミッタ領域と前記第2のコレクタ領域との間に設けられた前記ドリフト領域と、
前記第2のエミッタ領域と前記ドリフト領域との間に設けられた第1導電型の第2のベース領域と、
前記半導体層の中に設けられて前記第1の方向に伸長する第4のトレンチと、
前記第4のトレンチの中に設けられた第2のゲート絶縁膜と、
前記第4のトレンチの中であって、前記第2のゲート絶縁膜の上に設けられた第2のゲート電極と、を有し、
前記第2のコレクタ領域と前記第1のコレクタ領域が接続され、
前記第2のコレクタ領域の前記第2の方向の幅が前記第1のコレクタ領域の前記第1の方向の幅よりも大きい請求項1乃至請求項7いずれか一項記載の半導体装置。 - 前記第2のコレクタ領域の前記第2の方向の幅が600μm以上である請求項8記載の半導体装置。
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