JP6281570B2 - 半導体集積回路装置 - Google Patents
半導体集積回路装置 Download PDFInfo
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- JP6281570B2 JP6281570B2 JP2015532681A JP2015532681A JP6281570B2 JP 6281570 B2 JP6281570 B2 JP 6281570B2 JP 2015532681 A JP2015532681 A JP 2015532681A JP 2015532681 A JP2015532681 A JP 2015532681A JP 6281570 B2 JP6281570 B2 JP 6281570B2
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- 239000004065 semiconductor Substances 0.000 title claims description 41
- 238000010586 diagram Methods 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0886—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823431—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
- H01L21/845—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body including field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11803—Masterslice integrated circuits using field effect technology
- H01L27/11807—CMOS gate arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
- H01L27/1211—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- General Engineering & Computer Science (AREA)
- Geometry (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013173739 | 2013-08-23 | ||
JP2013173739 | 2013-08-23 | ||
PCT/JP2014/002237 WO2015025441A1 (ja) | 2013-08-23 | 2014-04-21 | 半導体集積回路装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018010604A Division JP2018064125A (ja) | 2013-08-23 | 2018-01-25 | 半導体集積回路装置 |
Publications (2)
Publication Number | Publication Date |
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JPWO2015025441A1 JPWO2015025441A1 (ja) | 2017-03-02 |
JP6281570B2 true JP6281570B2 (ja) | 2018-02-21 |
Family
ID=52483241
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015532681A Active JP6281570B2 (ja) | 2013-08-23 | 2014-04-21 | 半導体集積回路装置 |
JP2018010604A Pending JP2018064125A (ja) | 2013-08-23 | 2018-01-25 | 半導体集積回路装置 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018010604A Pending JP2018064125A (ja) | 2013-08-23 | 2018-01-25 | 半導体集積回路装置 |
Country Status (4)
Country | Link |
---|---|
US (6) | US9899381B2 (zh) |
JP (2) | JP6281570B2 (zh) |
CN (2) | CN108630607B (zh) |
WO (1) | WO2015025441A1 (zh) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108630607B (zh) * | 2013-08-23 | 2022-04-26 | 株式会社索思未来 | 半导体集成电路装置 |
WO2015033490A1 (ja) * | 2013-09-04 | 2015-03-12 | パナソニック株式会社 | 半導体装置 |
JP6396834B2 (ja) | 2015-03-23 | 2018-09-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US20160284836A1 (en) * | 2015-03-25 | 2016-09-29 | Qualcomm Incorporated | System, apparatus, and method for n/p tuning in a fin-fet |
US9577639B1 (en) * | 2015-09-24 | 2017-02-21 | Qualcomm Incorporated | Source separated cell |
US9793211B2 (en) * | 2015-10-20 | 2017-10-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Dual power structure with connection pins |
WO2018003001A1 (ja) * | 2016-06-28 | 2018-01-04 | 株式会社ソシオネクスト | 半導体装置及び半導体集積回路 |
CN109314080B (zh) * | 2016-07-01 | 2022-09-30 | 株式会社索思未来 | 半导体集成电路装置 |
CN107623509B (zh) * | 2016-07-14 | 2023-06-20 | 三星电子株式会社 | 包括三态反相器的触发器 |
JP6970348B2 (ja) * | 2016-08-01 | 2021-11-24 | 株式会社ソシオネクスト | 半導体チップ |
US10559501B2 (en) * | 2016-09-20 | 2020-02-11 | Qualcomm Incorporated | Self-aligned quadruple patterning process for Fin pitch below 20nm |
KR102633141B1 (ko) * | 2016-12-07 | 2024-02-02 | 삼성전자주식회사 | 집적회로 소자 |
KR102568562B1 (ko) * | 2017-01-24 | 2023-08-18 | 삼성전자주식회사 | 반도체 장치 |
JP6970357B2 (ja) * | 2017-08-31 | 2021-11-24 | 株式会社ソシオネクスト | 半導体集積回路装置 |
CN109524394B (zh) * | 2017-09-18 | 2021-08-10 | 联华电子股份有限公司 | 具有虚置标准单元的集成电路 |
KR102362016B1 (ko) | 2017-09-19 | 2022-02-10 | 삼성전자주식회사 | 마스터 슬레이브 플립 플롭 |
US11120190B2 (en) * | 2017-11-21 | 2021-09-14 | Advanced Micro Devices, Inc. | Metal zero power ground stub route to reduce cell area and improve cell placement at the chip level |
CN111466020A (zh) * | 2017-12-12 | 2020-07-28 | 株式会社索思未来 | 半导体集成电路装置 |
TWI756405B (zh) * | 2018-04-13 | 2022-03-01 | 聯華電子股份有限公司 | 靜態隨機存取記憶體的信噪比的調整方式以及反相器的結構 |
TWI762425B (zh) * | 2018-04-13 | 2022-04-21 | 聯華電子股份有限公司 | 靜態隨機存取記憶體的信噪比的調整方式以及反相器的結構 |
CN110600546B (zh) * | 2018-06-13 | 2022-12-06 | 联华电子股份有限公司 | 纳米管晶体管结构和纳米管反相器结构 |
JP7364922B2 (ja) * | 2018-12-26 | 2023-10-19 | 株式会社ソシオネクスト | 半導体集積回路装置 |
JP7364928B2 (ja) * | 2019-02-18 | 2023-10-19 | 株式会社ソシオネクスト | 半導体集積回路装置 |
US11094695B2 (en) * | 2019-05-17 | 2021-08-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit device and method of forming the same |
WO2020255256A1 (ja) * | 2019-06-18 | 2020-12-24 | 株式会社ソシオネクスト | 半導体装置 |
JP6818107B2 (ja) * | 2019-10-01 | 2021-01-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US11557590B2 (en) * | 2020-02-19 | 2023-01-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Transistor gate profile optimization |
KR20220033850A (ko) | 2020-09-10 | 2022-03-17 | 삼성전자주식회사 | 집적회로 장치 |
Family Cites Families (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09289251A (ja) * | 1996-04-23 | 1997-11-04 | Matsushita Electric Ind Co Ltd | 半導体集積回路のレイアウト構造およびその検証方法 |
US6399972B1 (en) * | 2000-03-13 | 2002-06-04 | Oki Electric Industry Co., Ltd. | Cell based integrated circuit and unit cell architecture therefor |
JP2002353413A (ja) * | 2001-05-28 | 2002-12-06 | Mitsubishi Electric Corp | 半導体記憶装置 |
KR100702552B1 (ko) | 2003-12-22 | 2007-04-04 | 인터내셔널 비지네스 머신즈 코포레이션 | 이중 게이트 FinFET 디자인을 위한 자동화 레이어생성 방법 및 장치 |
JP2007012855A (ja) | 2005-06-30 | 2007-01-18 | Matsushita Electric Ind Co Ltd | 半導体集積回路、標準セル、標準セルライブラリ、半導体集積回路の設計方法および半導体集積回路の設計装置 |
JP4829645B2 (ja) * | 2006-03-08 | 2011-12-07 | パナソニック株式会社 | 半導体集積回路装置 |
US9009641B2 (en) | 2006-03-09 | 2015-04-14 | Tela Innovations, Inc. | Circuits with linear finfet structures |
US9563733B2 (en) | 2009-05-06 | 2017-02-07 | Tela Innovations, Inc. | Cell circuit and layout with linear finfet structures |
US7446352B2 (en) * | 2006-03-09 | 2008-11-04 | Tela Innovations, Inc. | Dynamic array architecture |
US7812373B2 (en) * | 2007-02-12 | 2010-10-12 | Infineon Technologies Ag | MuGFET array layout |
US8518767B2 (en) | 2007-02-28 | 2013-08-27 | International Business Machines Corporation | FinFET with reduced gate to fin overlay sensitivity |
US8682116B2 (en) * | 2007-08-08 | 2014-03-25 | Infineon Technologies Ag | Integrated circuit including non-planar structure and waveguide |
JP4591525B2 (ja) * | 2008-03-12 | 2010-12-01 | ソニー株式会社 | 半導体装置 |
WO2009122353A1 (en) * | 2008-04-04 | 2009-10-08 | Nxp B.V. | Sram cell comprising finfets |
JP2010016258A (ja) * | 2008-07-04 | 2010-01-21 | Panasonic Corp | 半導体集積回路装置 |
JP5292005B2 (ja) * | 2008-07-14 | 2013-09-18 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
US20100127333A1 (en) * | 2008-11-21 | 2010-05-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | novel layout architecture for performance enhancement |
US8004042B2 (en) * | 2009-03-20 | 2011-08-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Static random access memory (SRAM) cell and method for forming same |
JPWO2010122754A1 (ja) * | 2009-04-22 | 2012-10-25 | パナソニック株式会社 | 半導体集積回路 |
US8848423B2 (en) * | 2011-02-14 | 2014-09-30 | Shine C. Chung | Circuit and system of using FinFET for building programmable resistive devices |
US8816444B2 (en) * | 2011-04-29 | 2014-08-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | System and methods for converting planar design to FinFET design |
KR101850703B1 (ko) * | 2011-05-17 | 2018-04-23 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
US8519462B2 (en) * | 2011-06-27 | 2013-08-27 | Intel Corporation | 6F2 DRAM cell |
JP2013030602A (ja) * | 2011-07-28 | 2013-02-07 | Panasonic Corp | 半導体集積回路装置 |
US8561003B2 (en) * | 2011-07-29 | 2013-10-15 | Synopsys, Inc. | N-channel and P-channel finFET cell architecture with inter-block insulator |
SG10201605564WA (en) | 2012-01-13 | 2016-09-29 | Tela Innovations Inc | Circuits with linear finfet structures |
US9196540B2 (en) * | 2012-02-07 | 2015-11-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET structure with novel edge fins |
US8723268B2 (en) * | 2012-06-13 | 2014-05-13 | Synopsys, Inc. | N-channel and P-channel end-to-end finFET cell architecture with relaxed gate pitch |
US8901615B2 (en) * | 2012-06-13 | 2014-12-02 | Synopsys, Inc. | N-channel and P-channel end-to-end finfet cell architecture |
US8766364B2 (en) | 2012-08-31 | 2014-07-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin field effect transistor layout for stress optimization |
US9576978B2 (en) | 2012-10-09 | 2017-02-21 | Samsung Electronics Co., Ltd. | Cells including at least one fin field effect transistor and semiconductor integrated circuits including the same |
US9337318B2 (en) * | 2012-10-26 | 2016-05-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET with dummy gate on non-recessed shallow trench isolation (STI) |
US9012287B2 (en) * | 2012-11-14 | 2015-04-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Cell layout for SRAM FinFET transistors |
US9059242B2 (en) * | 2012-11-27 | 2015-06-16 | International Business Machines Corporation | FinFET semiconductor device having increased gate height control |
US9064725B2 (en) * | 2012-12-14 | 2015-06-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET with embedded MOS varactor and method of making same |
US9318621B2 (en) * | 2013-03-08 | 2016-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Rotated STI diode on FinFET technology |
US8869090B2 (en) | 2013-03-11 | 2014-10-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Stretch dummy cell insertion in FinFET process |
US9997617B2 (en) * | 2013-03-13 | 2018-06-12 | Qualcomm Incorporated | Metal oxide semiconductor (MOS) isolation schemes with continuous active areas separated by dummy gates and related methods |
US9111801B2 (en) * | 2013-04-04 | 2015-08-18 | Stmicroelectronics, Inc. | Integrated circuit devices and fabrication techniques |
US9158877B2 (en) | 2013-05-02 | 2015-10-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Standard cell metal structure directly over polysilicon structure |
US20150008524A1 (en) * | 2013-07-02 | 2015-01-08 | United Microelectronics Corp. | Integrated circuit device structure and fabrication method thereof |
US9536876B2 (en) * | 2013-08-01 | 2017-01-03 | Taiwan Semiconductor Manufacturing Company Ltd. | Temperature detector and controlling heat |
CN108630607B (zh) * | 2013-08-23 | 2022-04-26 | 株式会社索思未来 | 半导体集成电路装置 |
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2014
- 2014-04-21 CN CN201810440111.2A patent/CN108630607B/zh active Active
- 2014-04-21 JP JP2015532681A patent/JP6281570B2/ja active Active
- 2014-04-21 CN CN201480046450.2A patent/CN105493264B/zh active Active
- 2014-04-21 WO PCT/JP2014/002237 patent/WO2015025441A1/ja active Application Filing
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2016
- 2016-02-22 US US15/049,680 patent/US9899381B2/en active Active
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2018
- 2018-01-05 US US15/863,107 patent/US10181469B2/en active Active
- 2018-01-25 JP JP2018010604A patent/JP2018064125A/ja active Pending
- 2018-12-06 US US16/211,919 patent/US10833075B2/en active Active
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2020
- 2020-09-30 US US17/039,051 patent/US11362088B2/en active Active
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2022
- 2022-05-13 US US17/744,141 patent/US11764217B2/en active Active
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2023
- 2023-08-15 US US18/450,146 patent/US20230387116A1/en active Pending
Also Published As
Publication number | Publication date |
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CN105493264A (zh) | 2016-04-13 |
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