JP2011228631A - 半導体チップ内蔵配線基板及びその製造方法 - Google Patents
半導体チップ内蔵配線基板及びその製造方法 Download PDFInfo
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- JP2011228631A JP2011228631A JP2011002321A JP2011002321A JP2011228631A JP 2011228631 A JP2011228631 A JP 2011228631A JP 2011002321 A JP2011002321 A JP 2011002321A JP 2011002321 A JP2011002321 A JP 2011002321A JP 2011228631 A JP2011228631 A JP 2011228631A
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- semiconductor chip
- film
- electrode
- thermoplastic resin
- pad
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Classifications
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
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- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
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- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H05K1/00—Printed circuits
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- H01L2224/11—Manufacturing methods
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Abstract
【解決手段】電極51aにスタッドバンプ52aが設けられた半導体チップ50と、パッド31が形成された熱硬化性樹脂フィルム21bとを、熱可塑性樹脂フィルム22bを介してスタッドバンプ52aとパッド31とが向き合うように配置し、半導体チップ50における電極51b,51cが形成された電極形成面側には、ビアホール内に導電性ペーストが充填された熱可塑性樹脂フィルム22cを、電極51b,51cとその導電性ペーストとが対向するように配置する。加圧・加熱工程では、電極51aとスタッドバンプ52a及びスタッドバンプ52aとパッド31を固相拡散接合によって接合すると共に、電極51b,51cと熱硬化性樹脂フィルム21bにおける導電性ペーストとを液相拡散接合によって接合する。
【選択図】図5
Description
一方の面に第1電極を有すると共に、他方の面に第2電極を有した半導体チップを内蔵する半導体チップ内蔵配線基板の製造方法であって、
表面に導体パターンが形成された樹脂フィルム、ビアホール内に導電性ペーストが充填された樹脂フィルム、を含む複数枚の樹脂フィルムを、熱可塑性樹脂を含む熱可塑性樹脂フィルムが少なくとも1枚おきに位置しつつ半導体チップの両電極形成面に隣接するように積層して積層体とする積層工程と、
積層体を加熱しつつ積層方向上下から加圧することにより、熱可塑性樹脂を軟化させて複数枚の樹脂フィルムを一括で一体化するとともに半導体チップを封止し、導電性ペースト中の導電性粒子を焼結体として、この焼結体と導体パターンを有した配線部を形成する加圧・加熱工程と、を備え、
積層工程においては、
第1電極にスタッドバンプが設けられた半導体チップと、樹脂フィルムからなり導体パターンの一部としてパッドが形成された第1フィルムとを、熱可塑性樹脂フィルムとしての第2フィルムを介してスタッドバンプとパッドとが向き合うように配置すると共に、半導体チップにおける第2電極が形成された電極形成面側には、少なくともビアホール内に導電性ペーストが充填された熱可塑性樹脂フィルムとしての第3フィルムを、第2電極と第3フィルムにおける導電性ペーストとが対向するように配置し、
加圧・加熱工程では、第1電極とスタッドバンプ及びスタッドバンプとパッドを固相拡散接合によって接合すると共に、第2電極と第3フィルムにおける導電性ペーストとを液相拡散接合によって接合し、第3フィルムにおける導電性ペースト中の導電性粒子を焼結体とすることを特徴とするものである。
少なくとも熱可塑性樹脂を含む絶縁基材と、
複数の素子が構成され、一方の面に第1電極を有すると共に他方の面に第2電極を有し、絶縁基材に埋設されてこの絶縁基材の熱可塑性樹脂により封止された半導体チップと、
絶縁基材に設けられ、半導体チップの第1電極及び第2電極と電気的に接続されるものであり、導体箔からなる導体パターンと、ビアホール内に設けられた層間接続部と、第1電極と導体パターンの一部としてのパッドとを接続する接続部とを含む配線部と、を備える半導体チップ内蔵配線基板であって、
第1電極における少なくとも接続部との界面、接続部とパッドとの界面、及び第2電極と層間接続部との界面には、拡散層が形成されており、
第2電極と電気的に接続される層間接続部を構成する少なくとも一つの元素は、融点が熱可塑性樹脂のガラス転移点よりも低く、接続部を構成する元素は、融点が熱可塑性樹脂の融点よりも高いことを特徴とするものである。
以下、本発明の実施形態を図に基づいて説明する。なお、絶縁基材20の厚み方向(換言すれば、複数枚の樹脂フィルムの積層方向)を単に厚み方向と示し、該厚み方向に垂直な方向を単に垂直方向と示す。また、特に断りのない限り、厚さとは、厚み方向に沿う厚さを示すものとする。
第1実施形態では、半導体チップ50を、基板としての熱硬化性樹脂フィルム21bにフリップチップ実装する際に、スタッドバンプ52aを、熱硬化性樹脂フィルム21bのパッド形成面上に貼り付けた熱可塑性樹脂フィルム22bに押し込んで、パッド31との圧接状態を確保する例を示した。
なお、スタッドバンプが設けられていなくても、両面に電極51を有する半導体チップ50であれば、加圧・加熱工程時において、この電極51に応力がかかることによって半導体チップ50に局所的に応力が印加されることになり好ましくない。つまり、両面に電極51を有する半導体チップ50を内蔵する半導体チップ内蔵配線基板においては、上述のような加圧・加熱工程を用いて製造すると、この加圧・加熱工程時において、電極51によって半導体チップに応力が印加されることになり好ましくない。
20・・・絶縁基材
21a〜21d・・・熱硬化性樹脂フィルム
22a〜22d・・・熱可塑性樹脂フィルム
30・・・導体パターン
31・・・パッド
40・・・層間接続部
50・・・半導体チップ
51・・・電極
52・・・接続部
52a・・・スタッドバンプ
521・・・AuAl合金層
522・・・CuAu合金層
Claims (14)
- 一方の面に第1電極を有すると共に、他方の面に第2電極を有した半導体チップを内蔵する半導体チップ内蔵配線基板の製造方法であって、
表面に導体パターンが形成された樹脂フィルム、ビアホール内に導電性ペーストが充填された樹脂フィルム、を含む複数枚の樹脂フィルムを、熱可塑性樹脂を含む熱可塑性樹脂フィルムが少なくとも1枚おきに位置しつつ前記半導体チップの両電極形成面に隣接するように積層して積層体とする積層工程と、
前記積層体を加熱しつつ積層方向上下から加圧することにより、前記熱可塑性樹脂を軟化させて複数枚の前記樹脂フィルムを一括で一体化するとともに前記半導体チップを封止し、前記導電性ペースト中の導電性粒子を焼結体として、該焼結体と前記導体パターンを有した配線部を形成する加圧・加熱工程と、を備え、
前記積層工程においては、
前記第1電極にスタッドバンプが設けられた前記半導体チップと、前記樹脂フィルムからなり前記導体パターンの一部としてパッドが形成された第1フィルムとを、前記熱可塑性樹脂フィルムとしての第2フィルムを介して前記スタッドバンプと前記パッドとが向き合うように配置すると共に、前記半導体チップにおける第2電極が形成された電極形成面側には、少なくともビアホール内に導電性ペーストが充填された前記熱可塑性樹脂フィルムとしての第3フィルムを、前記第2電極と前記第3フィルムにおける導電性ペーストとが対向するように配置し、
前記加圧・加熱工程では、前記第1電極と前記スタッドバンプ及び前記スタッドバンプと前記パッドを固相拡散接合によって接合すると共に、前記第2電極と前記第3フィルムにおける導電性ペーストとを液相拡散接合によって接合し、前記第3フィルムにおける導電性ペースト中の導電性粒子を焼結体とすることを特徴とする半導体チップ内蔵配線基板の製造方法。 - 前記第1電極はAl系材料からなり、前記スタッドバンプはAuからなり、前記第2電極はNiからなり、前記導体パターンはCuからなると共に、前記導電性ペーストは、少なくともSn,Agを含むことを特徴とする請求項1に記載の半導体チップ内蔵配線基板の製造方法。
- 前記積層工程においては、前記積層体における前記半導体チップの第2電極と向き合う方向の表層に、金属材料からなる放熱部材を配置し、前記加圧・加熱工程では、前記放熱部材と前記樹脂フィルムのビアホール内に充填された導電性ペーストとを接合することを特徴とする請求項1又は2に記載の半導体チップ内蔵配線基板の製造方法。
- 前記積層工程の前工程として、
前記第1フィルムを含む基板に対し、加熱しつつ加圧することにより、前記パッドを覆うように、前記第2フィルムを前記基板のパッド形成面に貼り付ける貼り付け工程と、
前記第2フィルムを構成する熱可塑性樹脂の融点以上の温度で加熱しつつ加圧することにより、前記スタッドバンプを、前記第2フィルムを溶融させながら押し込んで、対応する前記パッドに圧接させるとともに、溶融した前記第2フィルムにて前記半導体チップと前記基板との間を封止するフリップチップ実装工程と、を備えることを特徴とする請求項1乃至3のいずれか一項に記載の半導体チップ内蔵配線基板の製造方法。 - 前記積層工程の前工程として、
前記第1フィルムを含む基板に対し、パッド形成面に、前記パッドに対応する位置に貫通孔が設けられた前記第2フィルムを貼り付けた状態で、前記第2フィルムを構成する熱可塑性樹脂のガラス転移点以上の温度で加熱しつつ加圧することにより、前記スタッドバンプを、前記貫通孔を通じて対応する前記パッドに圧接させるとともに、軟化した前記第2フィルムにて前記半導体チップと前記基板との間を封止するフリップチップ実装工程を備えることを特徴とする請求項1乃至3のいずれか一項に記載の半導体チップ内蔵配線基板の製造方法。 - 前記貫通孔を、前記パッドごとに設けることを特徴とする請求項5に記載の半導体チップ内蔵配線基板の製造方法。
- 前記貫通孔を、複数の前記パッドごとに1つ設けることを特徴とする請求項5に記載の半導体チップ内蔵配線基板の製造方法。
- 前記フリップチップ実装工程として、
前記貫通孔が設けられた第2フィルムを、前記貫通孔の形成位置とは異なる位置を加熱しつつ加圧することにより、前記基板のパッド形成面に貼り付ける工程を含むことを特徴とする請求項6又は請求項7に記載の半導体チップ内蔵配線基板の製造方法。 - 前記フリップチップ実装工程として、
加熱しつつ加圧することにより、前記第2フィルムを、前記パッドを覆うように前記基板のパッド形成面に貼り付けた後、前記第2フィルムにおける前記パッドに対応する位置に、貫通孔を形成する工程を含むことを特徴とする請求項6又は請求項7に記載の半導体チップ内蔵配線基板の製造方法。 - 前記積層工程では、前記半導体チップと前記第1フィルムとを、前記第2フィルムを介して前記スタッドバンプと前記パッドとが向き合う方向に分離した状態で積層すると共に、前記半導体チップにおける第2電極が形成された電極形成面側に、前記第2電極と前記第3フィルムにおける導電性ペーストとが対向するように前記第3フィルムを分離した状態で積層し、
前記加圧・加熱工程では、スタッドバンプを、前記第2フィルムを溶融させながら押し込んで、前記パッドと前記スタッドバンプ、及び前記第1電極と前記スタッドバンプとを固相拡散接合により接合することを特徴とする請求項1に記載の半導体チップ内蔵配線基板の製造方法。 - 前記半導体チップを封止する前記熱可塑性樹脂フィルムは、厚さが5μm以上であることを特徴とする請求項1乃至請求項10のいずれか一項に記載の半導体チップ内蔵配線基板の製造方法。
- 少なくとも熱可塑性樹脂を含む絶縁基材と、
複数の素子が構成され、一方の面に第1電極を有すると共に他方の面に第2電極を有し、前記絶縁基材に埋設されて該絶縁基材の熱可塑性樹脂により封止された半導体チップと、
前記絶縁基材に設けられ、前記半導体チップの第1電極及び第2電極と電気的に接続されるものであり、導体箔からなる導体パターンと、ビアホール内に設けられた層間接続部と、前記第1電極と前記導体パターンの一部としてのパッドとを接続する接続部とを含む配線部と、
を備える半導体チップ内蔵配線基板であって、
前記第1電極における少なくとも前記接続部との界面、前記接続部と前記パッドとの界面、及び前記第2電極と前記層間接続部との界面には、拡散層が形成されており、
前記第2電極と電気的に接続される前記層間接続部を構成する少なくとも一つの元素は、融点が前記熱可塑性樹脂のガラス転移点よりも低く、前記接続部を構成する元素は、融点が前記熱可塑性樹脂の融点よりも高いことを特徴とする半導体チップ内蔵配線基板。 - 前記絶縁基材は、熱可塑性樹脂を含む熱可塑性樹脂フィルムが少なくとも一枚おきに位置しつつ前記半導体チップの両電極形成面に隣接するように、複数枚の樹脂フィルムが積層され、前記熱可塑性樹脂フィルムを接着層として相互に接着されてなることを特徴とする請求項12に記載の半導体チップ内蔵配線基板。
- 前記絶縁基材における前記半導体チップの第2電極と向き合う方向の表層には、金属材料からなる放熱部材が配置され、該放熱部材は、前記配線部を介して前記第2電極と接続されることを特徴とする請求項12又は13に記載の半導体チップ内蔵配線基板。
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