WO2018186451A1 - 基板処理装置および基板搬送方法 - Google Patents
基板処理装置および基板搬送方法 Download PDFInfo
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- WO2018186451A1 WO2018186451A1 PCT/JP2018/014470 JP2018014470W WO2018186451A1 WO 2018186451 A1 WO2018186451 A1 WO 2018186451A1 JP 2018014470 W JP2018014470 W JP 2018014470W WO 2018186451 A1 WO2018186451 A1 WO 2018186451A1
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- 238000012545 processing Methods 0.000 title claims abstract description 246
- 239000000758 substrate Substances 0.000 title claims abstract description 190
- 238000000034 method Methods 0.000 title claims abstract description 44
- 230000008569 process Effects 0.000 claims abstract description 39
- 238000012546 transfer Methods 0.000 claims description 144
- 238000000605 extraction Methods 0.000 claims description 28
- 238000002360 preparation method Methods 0.000 claims description 4
- 239000000969 carrier Substances 0.000 abstract description 6
- 235000012431 wafers Nutrition 0.000 description 208
- 230000032258 transport Effects 0.000 description 63
- 230000007246 mechanism Effects 0.000 description 33
- 238000010586 diagram Methods 0.000 description 17
- 239000012530 fluid Substances 0.000 description 13
- 238000011068 loading method Methods 0.000 description 8
- 238000011084 recovery Methods 0.000 description 7
- 239000007788 liquid Substances 0.000 description 6
- 230000004048 modification Effects 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 239000011261 inert gas Substances 0.000 description 5
- 230000005856 abnormality Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000004308 accommodation Effects 0.000 description 1
- 238000001311 chemical methods and process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/6704—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
- H01L21/67051—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing using mainly spraying means, e.g. nozzles
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- H01L21/67766—Mechanical parts of transfer devices
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B65—CONVEYING; PACKING; STORING; HANDLING THIN OR FILAMENTARY MATERIAL
- B65G—TRANSPORT OR STORAGE DEVICES, e.g. CONVEYORS FOR LOADING OR TIPPING, SHOP CONVEYOR SYSTEMS OR PNEUMATIC TUBE CONVEYORS
- B65G49/00—Conveying systems characterised by their application for specified purposes not otherwise provided for
- B65G49/05—Conveying systems characterised by their application for specified purposes not otherwise provided for for fragile or damageable materials or articles
- B65G49/07—Conveying systems characterised by their application for specified purposes not otherwise provided for for fragile or damageable materials or articles for semiconductor wafers Not used, see H01L21/677
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- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
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- H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
- H01L21/67178—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers vertical arrangement
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Definitions
- the disclosed embodiment relates to a substrate processing apparatus and a substrate transfer method.
- Patent Document 1 discloses a substrate placement unit on which a substrate is placed, a first transport device that transports a substrate between a carrier that houses a plurality of substrates and the substrate placement unit, and a substrate.
- a substrate processing apparatus including a plurality of processing units and a second transfer device that transfers a substrate between the plurality of processing units and the substrate mounting unit is described.
- the first transport device takes out a plurality of substrates from the carrier, and temporarily places the taken-out substrates on the substrate platform.
- the second transport device takes out the substrates one by one from the substrate platform and transports them to the processing unit.
- the second transport device takes out the processed substrate from the processing unit, and temporarily places the taken-out substrate on the substrate mounting unit.
- the first transport device takes out a plurality of substrates from the substrate platform and returns them to the carrier.
- the substrate is transferred between the first transfer device and the second transfer device via the substrate mounting portion.
- the substrate processing apparatus described in Patent Document 1 has room for further improvement in that all the substrates in the substrate platform are not retained in the substrate platform longer than the permissible time.
- An object of one embodiment of the present invention is to provide a substrate processing apparatus and a substrate transport method capable of preventing all substrates in a substrate platform from staying in the substrate platform for longer than an allowable time.
- a substrate processing apparatus includes a carrier mounting unit, a substrate mounting unit, a first transfer device, a plurality of processing units, a second transfer device, and a control unit.
- the carrier placement unit places a carrier that accommodates a plurality of substrates.
- the substrate placement unit can place a plurality of substrates.
- the first transport device transports the substrate between the carrier placed on the carrier placement unit and the substrate placement unit.
- the plurality of processing units process the substrate.
- the second transport device transports the substrate between the plurality of processing units and the substrate platform.
- the control unit controls the first transport device, the plurality of processing units, and the second transport device.
- control unit has a time interval equal to or longer than a required time from when the first transport device takes out the substrate from the carrier and places the substrate on the substrate placement unit, and removes the substrate from the substrate placement unit and stores it in the carrier.
- One transport apparatus is caused to perform an unloading operation of unloading the substrate from the carrier and placing it on the substrate platform.
- FIG. 1 is a diagram showing a schematic configuration of a substrate processing system according to the present embodiment.
- FIG. 2 is a diagram showing a schematic configuration of the processing unit.
- FIG. 3 is a diagram for explaining a wafer conveyance path in the substrate processing system.
- FIG. 4 is a block diagram illustrating an example of the configuration of the control device.
- FIG. 5 is a block diagram illustrating an example of the configuration of the transport control unit.
- FIG. 6 is a flowchart illustrating an example of the content of the transfer control process for the first transfer device.
- FIG. 7 is a diagram illustrating an example of a route securing condition.
- FIG. 8 is a diagram for explaining a process for suppressing the execution of an event.
- FIG. 9 is a flowchart showing the contents of the route redetermination process.
- FIG. 10 is a diagram for describing a modified example of the conveyance control process for the first conveyance device.
- FIG. 1 is a diagram showing a schematic configuration of a substrate processing system according to the present embodiment.
- the X axis, the Y axis, and the Z axis that are orthogonal to each other are defined, and the positive direction of the Z axis is the vertically upward direction.
- the substrate processing system 1 includes a carry-in / out station 2 and a processing station 3.
- the carry-in / out station 2 and the processing station 3 are provided adjacent to each other.
- the loading / unloading station 2 includes a carrier placement unit 11 and a conveyance unit 12.
- the transfer unit 12 is provided adjacent to the carrier placement unit 11 and includes a substrate transfer device 13 and a delivery unit 14 inside.
- the substrate transfer device 13 includes a wafer holding mechanism that holds the wafer W. Further, the substrate transfer device 13 can move in the horizontal direction and the vertical direction and can turn around the vertical axis, and transfers the wafer W between the carrier C and the delivery unit 14 using the wafer holding mechanism. Do.
- the processing station 3 is provided adjacent to the transfer unit 12.
- the processing station 3 includes a transport unit 15 and a plurality of processing units 16.
- the plurality of processing units 16 are provided side by side on the transport unit 15.
- the transfer unit 15 includes a substrate transfer device 17 inside.
- the substrate transfer device 17 includes a wafer holding mechanism that holds the wafer W. Further, the substrate transfer device 17 can move in the horizontal direction and the vertical direction and can turn around the vertical axis, and transfers the wafer W between the delivery unit 14 and the processing unit 16 using a wafer holding mechanism. I do.
- the processing unit 16 performs predetermined substrate processing on the wafer W transferred by the substrate transfer device 17.
- the substrate processing system 1 includes a control device 4.
- the control device 4 is a computer, for example, and includes a control unit 18 and a storage unit 19.
- the storage unit 19 stores a program for controlling various processes executed in the substrate processing system 1.
- the control unit 18 controls the operation of the substrate processing system 1 by reading and executing the program stored in the storage unit 19.
- Such a program may be recorded in a computer-readable storage medium and installed in the storage unit 19 of the control device 4 from the storage medium.
- Examples of the computer-readable storage medium include a hard disk (HD), a flexible disk (FD), a compact disk (CD), a magnetic optical disk (MO), and a memory card.
- the substrate transfer device 13 of the loading / unloading station 2 takes out the wafer W from the carrier C placed on the carrier placement unit 11 and receives the taken-out wafer W. Place on the transfer section 14.
- the wafer W placed on the delivery unit 14 is taken out from the delivery unit 14 by the substrate transfer device 17 of the processing station 3 and carried into the processing unit 16.
- the wafer W loaded into the processing unit 16 is processed by the processing unit 16, then unloaded from the processing unit 16 by the substrate transfer device 17, and placed on the delivery unit 14. Then, the processed wafer W placed on the delivery unit 14 is returned to the carrier C of the carrier placement unit 11 by the substrate transfer device 13.
- FIG. 2 is a diagram showing a schematic configuration of the processing unit 16.
- the processing unit 16 includes a chamber 20, a substrate holding mechanism 30, a processing fluid supply unit 40, and a recovery cup 50.
- the chamber 20 accommodates the substrate holding mechanism 30, the processing fluid supply unit 40, and the recovery cup 50.
- An FFU (Fan Filter Unit) 21 is provided on the ceiling of the chamber 20.
- the FFU 21 forms a down flow in the chamber 20.
- the substrate holding mechanism 30 includes a holding part 31, a support part 32, and a driving part 33.
- the holding unit 31 holds the wafer W horizontally.
- pillar part 32 is a member extended in a perpendicular direction, a base end part is rotatably supported by the drive part 33, and supports the holding
- the drive unit 33 rotates the column unit 32 around the vertical axis.
- the substrate holding mechanism 30 rotates the support unit 31 by rotating the support unit 32 using the drive unit 33, thereby rotating the wafer W held by the support unit 31. .
- the processing fluid supply unit 40 supplies a processing fluid to the wafer W.
- the processing fluid supply unit 40 is connected to a processing fluid supply source 70.
- the collection cup 50 is disposed so as to surround the holding unit 31, and collects the processing liquid scattered from the wafer W by the rotation of the holding unit 31.
- a drain port 51 is formed at the bottom of the recovery cup 50, and the processing liquid collected by the recovery cup 50 is discharged from the drain port 51 to the outside of the processing unit 16. Further, an exhaust port 52 for discharging the gas supplied from the FFU 21 to the outside of the processing unit 16 is formed at the bottom of the recovery cup 50.
- FIG. 3 is a diagram for explaining a transfer path of the wafer W in the substrate processing system 1.
- FIG. 3 the simple side surface schematic diagram which saw through the substrate processing system 1 from the negative direction of the Y-axis is shown.
- the substrate transfer device 13 is described as “first transfer device 13”
- the substrate transfer device 17 is described as “second transfer device 17”.
- the transfer unit 12 of the carry-in / out station 2 includes a carry-in / out chamber 12a and a delivery chamber 12b.
- the loading / unloading chamber 12a is provided adjacent to the carrier placement unit 11, and the first transfer device 13 is disposed therein.
- the first transfer device 13 includes a wafer holding mechanism 13a and a moving mechanism 13b.
- the wafer holding mechanism 13a can hold one wafer W.
- the moving mechanism 13b moves the wafer holding mechanism 13a up and down along a vertical guide 13c extending in the vertical direction.
- the moving mechanism 13b moves the wafer holding mechanism 13a along the horizontal direction and rotates it around the vertical axis.
- the first transfer device 13 is assumed to transfer the wafers W one by one.
- the first transfer device 13 includes a wafer holding mechanism capable of holding a plurality of wafers W and includes a plurality of wafers W. May be transported collectively. This point will be described later.
- the delivery chamber 12b is provided between the carry-in / out chamber 12a and the processing station 3, and a plurality (two in this case) of delivery units 14 are arranged therein.
- the two delivery parts 14 are arranged side by side in the height direction (Z-axis direction).
- Each delivery unit 14 is an example of a “substrate mounting unit”, and has a plurality of slots on which a plurality of wafers W can be mounted in multiple stages.
- the upper delivery unit 14 is loaded with a wafer W that is carried into and out of the upper delivery unit 15 described later.
- the lower delivery unit 14 is loaded with a wafer W that is carried into and out of the lower delivery unit 15 described below.
- Each delivery unit 14 includes a unit on which a wafer W carried into the transfer unit 15 (that is, a wafer W before being processed by the processing unit 16) is placed, and a wafer W ( That is, it may be divided into a unit on which the wafer W) processed by the processing unit 16 is placed. In this case, each unit need only be capable of mounting at least one wafer W.
- the processing station 3 includes a plurality of (here, two) transport units 15.
- the transport unit 15 is arranged side by side in the height direction (Z-axis direction).
- a second transport device 17 is disposed in each transport unit 15.
- the second transfer device 17 includes a first wafer holding mechanism 17a, a second wafer holding mechanism 17b, and a moving mechanism 17c.
- the first wafer holding mechanism 17a and the second wafer holding mechanism 17b can each hold one wafer W. Specifically, the first wafer holding mechanism 17a holds the wafer W before being processed by the processing unit 16 (hereinafter, may be referred to as “unprocessed wafer W”), and the second wafer holding mechanism 17b. Holds the wafer W after being processed by the processing unit 16 (hereinafter may be referred to as “processed wafer W”).
- the moving mechanism 17c moves the first wafer holding mechanism 17a and the second wafer holding mechanism 17b along the horizontal guide 17d extending in the horizontal direction (X-axis direction) and along the vertical guide 17e extending in the vertical direction.
- the first wafer holding mechanism 17a and the second wafer holding mechanism 17b are moved up and down.
- the moving mechanism 17c moves the first wafer holding mechanism 17a and the second wafer holding mechanism 17b along the horizontal direction (Y-axis direction) orthogonal to the extending direction of the horizontal guide 17d, and rotates it around the vertical axis. .
- the plurality of processing units 16 are arranged in each transport unit 15.
- a space is provided below the lower transport unit 15.
- a piping box that accommodates various types of piping and a chemical tank as the processing fluid supply source 70 are provided. Etc. are arranged.
- the first transfer device 13 takes out one unprocessed wafer W from the carrier C and places it on the delivery unit 14.
- the second transfer device 17 takes out one unprocessed wafer W from the delivery unit 14 and loads it into one of the processing units 16.
- the unprocessed wafer W placed on the upper delivery unit 14 is taken out by the upper second transfer device 17 and carried into the upper process unit 16.
- the unprocessed wafer W placed on the lower delivery unit 14 is taken out by the lower second transfer device 17 and carried into the lower process unit 16.
- the second transfer device 17 takes out the processed wafer W from the processing unit 16 and places it on the delivery unit 14. Then, the first transfer device 13 takes out the processed wafer W from the delivery unit 14 and stores it in the carrier C.
- the unprocessed wafer W is transferred from the carrier C to the processing unit 16 via the first transfer device 13, the delivery unit 14, and the second transfer device 17. Further, the processed wafer W returns from the processing unit 16 to the carrier C via the second transfer device 17, the delivery unit 14, and the first transfer device 13.
- the wafer W when processing the wafer W, it is desirable that the wafer W is not exposed to air as much as possible from the viewpoint of preventing the wafer W from being altered.
- an inert gas for example, nitrogen
- an inert gas for example, nitrogen
- the FFU 6 is also provided in the ceiling portion of the carry-in / out chamber 12a, the delivery unit 14 and each transport unit 15, and the purified air is supplied from the FFU 6 to the carry-in / out chamber 12a, the delivery unit 14 and each transport unit 15. . Therefore, in order to prevent the wafer W from being exposed to the air as much as possible, it is desirable to shorten the residence time of the wafer W in the loading / unloading chamber 12a, the delivery chamber 12b, and the transfer unit 15.
- the timing at which the first transfer device 13 takes out the unprocessed wafer W from the carrier C is appropriately controlled in order to shorten the residence time of the wafer W in the delivery unit 14. did. Below, this point is demonstrated concretely.
- FIG. 4 is a block diagram showing an example of the configuration of the control device 4.
- FIG. 4 shows only some of the plurality of components included in the control device 4.
- control device 4 includes a control unit 18 and a storage unit 19.
- the control unit 18 includes, for example, a microcomputer having a CPU (Central Processing Unit), a ROM (Read Only Memory), a RAM (Random Access Memory), an input / output port, and various circuits.
- the control unit 18 includes a plurality of processing units that function when the CPU executes a program stored in the ROM using the RAM as a work area.
- the control unit 18 includes a recipe execution unit 18a, an information collection unit 18b, and a conveyance control unit 18c.
- the recipe execution unit 18a, the information collection unit 18b, and the transport control unit 18c may be partially or entirely configured by hardware such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array).
- ASIC Application Specific Integrated Circuit
- FPGA Field Programmable Gate Array
- the storage unit 19 is realized by, for example, a semiconductor memory element such as a RAM or a flash memory, or a storage device such as a hard disk or an optical disk.
- the storage unit 19 stores recipe information 19a and state information 19b.
- the recipe execution unit 18a controls the processing unit 16 according to the recipe information 19a, thereby causing the processing unit 16 to execute processing on the wafer W.
- the recipe execution unit 18a controls the processing unit 16 in accordance with the recipe information 19a, thereby drying the wafer W, the chemical process for supplying the chemical liquid to the wafer W, the rinsing process for supplying the rinse liquid to the wafer W, and the wafer W.
- the processing unit 16 is caused to execute processing including the drying processing.
- the recipe information 19a is information indicating the content of processing to be executed by the processing unit 16. Specifically, the recipe information 19a includes information such as the execution order of each process, the processing time, the type of processing fluid to be used, the discharge flow rate of the processing fluid, the position of the processing fluid supply unit 40, and the rotation speed of the holding unit 31. Is included.
- the information collecting unit 18b is information on the state of the substrate processing system 1 from the first transfer device 13, the second transfer devices 17, the processing units 16, and various sensors (not shown) provided in the substrate processing system 1. To collect.
- the information collecting unit 18b stores the collected information in the storage unit 19 as state information 19b.
- the state information 19b is information regarding the state of the substrate processing system 1. Specifically, the status information 19b includes at least information related to “the status of the first transport device 13,” “the status of the delivery unit 14,” “the status of the second transport device 17,” and “the status of the processing unit 16.” Is included.
- the information related to “the state of the first transfer device 13” and the information related to the “state of the second transfer device 17” include information such as whether the wafer W is held or not. Further, the information on “the state of the delivery unit 14” includes information on the number of empty slots. In addition, the information regarding the “state of the processing unit 16” includes whether or not preparation for starting the processing on the wafer W is complete, whether or not the wafer W is accommodated in the chamber 20, and whether processing on the wafer W is being executed. Information such as whether or not is included.
- the conveyance control unit 18c controls the first conveyance device 13 and the second conveyance device 17 based on the state information 19b.
- the transport control unit 18c instructs the first transport device 13 to execute the “take-out operation” and the “collection operation”, and the second transport device 17 performs the “load-in operation” and the “unload operation”. "Is instructed to execute.
- the “removal operation” is an operation for taking out the unprocessed wafer W from the carrier C and placing it on the delivery unit 14
- the “collection operation” is an operation for taking out the processed wafer W from the delivery unit 14 and returning it to the carrier C. is there.
- the “carrying-in operation” is an operation for taking out the unprocessed wafer W from the delivery unit 14 and carrying it into the processing unit 16.
- the “carrying-out operation” takes out the processed wafer W from the processing unit 16 and sends it to the delivery unit 14. It is an operation to place.
- the transfer control unit 18c instructs the second transfer device 17 to execute the “loading operation” when the unprocessed wafer W is placed on the delivery unit 14, and the processing unit When the processing by 16 is completed, the second transport device 17 is instructed to execute the “unloading operation”.
- the transfer control unit 18c gives the “transfer operation” to the first transfer device 13 at a timing that takes into account the elapsed time from the start of the previous “take-out operation” and the state of the transfer path of the wafer W. Instructs execution of “collection operation”.
- FIG. 5 is a block diagram illustrating an example of the configuration of the transport control unit 18c.
- FIG. 5 shows only some of the plurality of components included in the transport control unit 18c.
- the transport control unit 18 c includes a time determination unit 181, a route determination unit 182, and an instruction unit 183.
- the time determination unit 181 determines whether or not the elapsed time from the start time of the previous “extraction operation” has reached a threshold value.
- the time set as the “threshold value” is that the first transfer device 13 takes out the unprocessed wafer W from the carrier C and places it on the delivery unit 14, and takes out the processed wafer W from the delivery unit 14 to the carrier C. It is the time required for the accommodation (for example, 20 sec) or more.
- the required time includes, for example, the operation from the standby state in a predetermined initial position to a predetermined initial position until the unprocessed wafer W is extracted from the carrier C, and the unprocessed wafer W is extracted from the carrier C.
- the operation from the placement of the unprocessed wafer W on the delivery unit 14 to the removal of the processed wafer W from the delivery unit 14, and the treated wafer from the delivery unit 14 The shortest operation in the case where the first transfer device 13 is caused to perform the operation from taking out W to returning to the carrier C and the operation from returning the processed wafer W to the carrier C to returning to the initial position and initial posture. Is the required time.
- the path determination unit 182 determines whether a transfer path for the wafer W is secured.
- the transfer path of the wafer W has a forward path from the carrier C to the processing unit 16 and a return path from the processing unit 16 to the carrier C.
- the path determination unit 182 determines whether the forward path and the return path are secured, that is, the unprocessed wafer W can be carried into the processing unit 16 without delay and the processed wafer W can be transported without delay. It is determined whether or not it can be returned to C.
- the instruction unit 183 determines that the time determination unit 181 has determined that the elapsed time from the start time of the previous “extraction operation” has reached the threshold, and the path determination unit 182 has secured the transfer path of the wafer W. When the determination is made, the first conveyance device 13 is instructed to perform the “extraction operation”.
- FIG. 6 is a flowchart illustrating an example of the content of the transfer control process for the first transfer device 13.
- FIG. 6 is executed for each processing unit in which a plurality of wafers W included in one carrier C are set as one set, for example. Further, in FIG. 6, for easy understanding, illustration of the process of taking out the first one from the carrier C and the process after taking out all the wafers W in the processing unit from the carrier C are omitted. However, these processes are also described below.
- control unit 18 determines whether or not the elapsed time from the start time of the previous take-out operation by the first transport device 13 has reached the threshold (step S ⁇ b> 101). Specifically, the control unit 18 determines whether or not the time measurement started in step S106 described later has reached a threshold value.
- Step S101 when it is determined that the elapsed time from the start time of the previous take-out operation by the first transport device 13 has reached the threshold (Yes in Step S101), the control unit 18 shifts the processing to Step S102. On the other hand, when the elapsed time has not reached the threshold (No in step S101), the control unit 18 repeats the determination process in step S101 until the elapsed time reaches the threshold.
- the first transfer device 13 executes only the “extraction operation” among the “extraction operation” and “recovery operation”. Will be.
- the first transport device 13 takes the next time (for example, 15 sec) shorter than the time required for performing both the “extraction operation” and the “collection operation” (for example, 15 sec). It becomes possible to perform the “take-out operation” for the wafer W.
- the first transfer device 13 performs the “extraction operation” at intervals of 15 sec, the first transfer device 13 is required when performing both the “extraction operation” and the “collection operation”.
- the “take-out operation” for the next wafer W is performed at intervals of 15 seconds shorter than the time.
- the first transfer device 13 performs both “extraction operation” and “collection operation” until all the unprocessed wafers W are extracted from the carrier C. Will be executed.
- the second transfer device 17 places the processed wafer W on the delivery unit 14 at the same interval as the first transfer device 13 places the unprocessed wafer W on the delivery unit 14. Set to do. Therefore, the unprocessed wafer W taken out from the carrier C and placed on the delivery unit 14 while only the “takeout operation” of the “takeout operation” and “collection operation” is performed is treated as a processed wafer W. It will be placed on the delivery unit 14 at intervals of 15 sec.
- the first transfer device 13 can take out the processed wafer W from the delivery unit 14 only at intervals of 20 seconds at the shortest. As a result, the processed wafer W stays in the delivery unit 14 and may stay longer than the allowable time.
- the time required for performing both the “extraction operation” and the “recovery operation”, that is, the first transfer device 13 takes out the unprocessed wafer W from the carrier C and receives it. Execution of “extraction operation” on the first transfer device 13 until a time equal to or longer than the time required for placing the processed wafer W on the delivery unit 14 and taking out the processed wafer W from the delivery unit 14 and storing it in the carrier C has elapsed. It was decided not to instruct.
- control unit 18 omits the process of step S101 and proceeds to the process of step S102.
- step S102 the control unit 18 determines whether or not a transfer path for the wafer W is secured. Specifically, the control unit 18 determines whether or not the current state of the substrate processing system 1 satisfies a predetermined route securing condition based on the state information 19b.
- FIG. 7 is a diagram illustrating an example of a route securing condition.
- the first transfer device 13 does not hold the wafer W (condition Q1), and an empty slot for the unprocessed wafer W exists in the delivery unit 14.
- condition Q2 the second transfer device 17 does not hold the wafer W (Condition Q3), the empty processing unit 16 exists (Condition Q4), and the processing start preparation of the empty processing unit 16 is ready.
- Condition Q5 there may be an empty slot for the processed wafer W in the delivery unit 14 (Condition Q6).
- the “empty processing unit 16” in the condition Q4 means the processing unit 16 in a state where the wafer W is not accommodated in the chamber 20.
- “preparation for processing start” in the condition Q5 means that the wafer W can be immediately processed when the wafer W is accommodated in the chamber 20 of the empty processing unit 16. It means that Specifically, it means that one or a plurality of processing fluids used in a series of processing on the wafer W can be discharged from the processing fluid supply unit 40 (see FIG. 2).
- the control unit 18 determines whether or not the current state of the substrate processing system 1 satisfies the above conditions Q1 to Q6 based on the state information 19b. Then, when the conditions Q1 to Q6 are satisfied, the control unit 18 determines that the transfer path for the wafer W is secured (Yes in step S102), and advances the process to step S103. On the other hand, when the conditions Q1 to Q6 are not satisfied, that is, when the transfer path of the wafer W is not secured (No in step S102), the control unit 18 performs step S102 until the conditions Q1 to Q6 are satisfied. Repeat the process.
- the control unit 18 may perform an abnormality handling process such as outputting an error signal when the process of step S102 continues for a predetermined time or more.
- the first transport device 13 can perform the “extraction operation” without delay. That is, the first transfer device 13 can immediately take out the unprocessed wafer W from the carrier C when the condition Q1 is satisfied, and take out from the carrier C when the condition Q2 is satisfied.
- the unprocessed wafer W can be placed on the delivery unit 14 without stagnation in the loading / unloading chamber 12a.
- the second transport device 17 can perform the “carry-in operation” without delay. That is, the second transfer device 17 can immediately take out the unprocessed wafer W placed on the delivery unit 14 from the delivery unit 14 when the condition Q3 is satisfied. Therefore, the residence time of the unprocessed wafer W in the delivery unit 14 can be shortened. Further, when the condition Q4 is satisfied, the second transfer device 17 can immediately load the unprocessed wafer W taken out from the delivery unit 14 into the processing unit 16 without stagnation in the transfer unit 15. .
- the processing unit 16 supplies an inert gas from the FFU 21 into the chamber 20. Accordingly, the wafer W is cut off from the air while being accommodated in the processing unit 16.
- the processing unit 16 can immediately start executing a series of processes on the unprocessed wafer W. Therefore, the residence time of the wafer W in the processing unit 16 can be shortened as much as possible.
- the second transfer device 17 transfers the processed wafer W transferred from the processing unit 16 to the transfer unit 15. It can be mounted immediately on the delivery unit 14 without stagnation.
- the stay time can be shortened as much as possible. Therefore, according to the substrate processing system 1 according to the present embodiment, the time during which the unprocessed wafer W is exposed to air can be shortened as much as possible.
- control unit 18 may determine only the conditions Q2 to Q4 among the conditions Q1 to Q6 described above. When the conditions Q2 to Q4 are satisfied, even if other conditions are not satisfied, at least the residence time of the unprocessed wafer W in the delivery unit 14 can be shortened.
- step S ⁇ b> 103 the control unit 18 determines whether or not the processed wafer W is placed on the delivery unit 14 based on the state information 19 b, for example. If the processed wafer W is placed on the delivery unit 14 (step S103, Yes), the first transfer device 13 is instructed to execute the “take-out operation” and the “collection operation” (step S103). S104). On the other hand, when the processed wafer W is not placed on the delivery unit 14 (No at Step S103), the control unit 18 instructs the first transfer device 13 to execute the “takeout operation” (Step S103). S105).
- control unit 18 starts measuring time (step S106).
- the time measurement result is used in the next determination process in step S101.
- step S107 the control unit 18 determines whether or not all unprocessed wafers W in the processing unit have been taken out from the carrier C based on the state information 19b, for example (step S107).
- the process proceeds to Step S101.
- step S101 as described above, it is determined whether or not the elapsed time from the start time of the previous extraction operation has reached the threshold value, and at least after this determination is affirmed, the next “extraction operation” is executed. Is instructed.
- the control unit 18 takes a time longer than the time required for the first transfer device 13 to take out the wafer W from the carrier C and place it on the delivery unit 14 and to take out the wafer W from the delivery unit 14 and store it in the carrier C.
- the “first take-out operation” is executed on the first transport device 13. Further, when the path securing condition is not satisfied due to, for example, the wafer W staying in the processing unit 16, the “collection operation” is continued without performing the “extraction operation”. Accordingly, the processed wafer W does not stay in the delivery unit 14.
- step S107 If it is determined in step S107 that all unprocessed wafers W in the processing unit have been taken out from the carrier C (step S107, Yes), the control unit 18 stores all the processed wafers W in the carrier C. Until the processed wafer W is placed on the delivery unit 14, the first transfer device 13 is instructed to execute the “collection operation”, and all the processed wafers W are accommodated in the carrier C. Then, the transport control process for the first transport device 13 is finished.
- the substrate processing system 1 (an example of the substrate processing apparatus) according to the present embodiment includes the carrier mounting unit 11, the delivery unit 14 (an example of the substrate mounting unit), the first transfer device 13, and the like.
- a plurality of processing units 16 (an example of a processing unit), a second transport device 17, and a control unit 18 are provided.
- the carrier placement unit 11 places a carrier C that accommodates a plurality of wafers W (an example of a substrate).
- the delivery unit 14 can place a plurality of wafers W thereon.
- the first transfer device 13 transfers the wafer W between the carrier C placed on the carrier placement unit 11 and the delivery unit 14.
- the plurality of processing units 16 process the wafer W.
- the second transfer device 17 transfers the wafer W between the plurality of processing units 16 and the delivery unit 14.
- the control unit 18 controls the first transport device 13, the plurality of processing units 16, and the second transport device 17. Further, the control unit 18 takes a time longer than the time required for the first transfer device 13 to take out the wafer W from the carrier C and place it on the delivery unit 14 and to take out the wafer W from the delivery unit 14 and store it in the carrier C. At intervals, the first transfer device 13 is caused to execute a take-out operation of taking the wafer W from the carrier C and placing it on the delivery unit 14.
- the substrate processing system 1 according to the present embodiment, it is possible to prevent all the wafers W in the delivery unit 14 from staying in the delivery unit 14 longer than the allowable time.
- Each event occurs when a preset event occurrence condition is met.
- the dummy dispensing process occurs when a state in which the nozzle does not discharge the processing liquid continues for a certain period of time.
- the wafer W may stay. For example, after an event in which the second transfer device 17 is used after the first transfer device 13 places the unprocessed wafer W on the delivery unit 14, the second transfer device 17 waits until the event ends. During this time, the unprocessed wafer W cannot be taken out from the delivery unit 14. As a result, the unprocessed wafer W stays in the delivery unit 14.
- FIG. 8 is a diagram for explaining a process for suppressing the execution of an event.
- the control unit 18 of the control device 4 takes out all the wafers W included in the processing unit P1 from the carrier C until the substrate processing for the processing unit P1 is completed, and all the taken out wafers W. Until the carrier C finishes accommodating the event.
- control unit 18 ends the event processing condition during execution of the substrate processing for the processing unit P1 before the substrate processing for the processing unit P1 is completed and before the substrate processing for the next processing unit P2 is started. Instructs the execution of an event that has been established.
- control unit 18 terminates execution of one processing unit when a specific event occurrence condition is satisfied during execution of one processing unit for processing a plurality of wafers W.
- the event may be executed before the execution of the processing unit is started. By doing so, it is possible to make it difficult for the wafer W to stay in the delivery unit 14.
- the control unit 18 before instructing the second transfer device 17 to execute the “loading operation”, the transfer unit 14. It is determined again whether or not a route from the processing unit 16 to the processing unit 16 is secured. If the route is not secured, a second retraction operation for avoiding contact of the wafer W with the air is performed. You may make it carry out with respect to the conveying apparatus 17.
- FIG. 1
- FIG. 9 is a flowchart showing the contents of the route redetermination process.
- the control unit 18 determines whether or not the unprocessed wafer W is placed on the delivery unit 14 based on, for example, the state information 19b (step S201). When the unprocessed wafer W is not placed on the delivery unit 14 (No at Step S201), the control unit 18 repeats the process at Step S201 until the unprocessed wafer W is placed on the delivery unit 14.
- Step S201 when the unprocessed wafer W is placed on the delivery unit 14 (Yes in Step S201), the control unit 18 determines whether or not a path from the delivery unit 14 to the processing unit 16 is secured (Step S201). S202). For example, the control unit 18 determines that the path from the delivery unit 14 to the processing unit 16 is secured when the conditions Q3 to Q6 shown in FIG. 7 are satisfied.
- step S202 when it is determined that a route from the delivery unit 14 to the processing unit 16 is secured (step S202, Yes), the control unit 18 performs “carry-in processing” on the second transport device 17. An instruction is given (step S203).
- Step S204 the control unit 18 instructs the second transport device 17 to execute the “retraction operation” (Step S204).
- the “evacuation operation” is a process of carrying the unprocessed wafer W placed on the delivery unit 14 into a predetermined evacuation place filled with an inert gas.
- the evacuation place is provided above or below the delivery unit 14 in the delivery chamber 12b, for example.
- a chamber capable of sealing the inside and a gas supply unit for supplying an inert gas into the chamber are provided at the retreat location.
- the control is performed.
- the unit 18 may cause the operation of taking out the unprocessed wafer W from the delivery unit 14 and carrying it into the empty processing unit 16 as a “retraction operation”. This also makes it possible to shorten the time during which the wafer W is exposed to air.
- control unit 18 predicts that the route securing condition is satisfied, and performs “extraction operation” with respect to the first transport device 13 a predetermined time before the time when the route securing condition is satisfied. May be instructed to execute.
- FIG. 10 is a diagram for describing a modified example of the conveyance control process for the first conveyance device.
- the route securing conditions (conditions Q1 to Q6 shown in FIG. 7) are satisfied when the “carrying-out operation” by the second transfer device 17 is completed.
- the route securing condition that is, after the “unloading operation” by the second transfer device 17 is completed
- the first transfer device 13 is instructed to execute the “take-out operation”.
- the “takeout operation” indicated by the broken line in FIG. 10 the processed wafer W stays in the delivery unit 14 until the “take-out operation” by the first transfer device 13 ends and the “collection operation” is started.
- control unit 18 instructs the transport device 13 to execute the “take-out operation”.
- the first transport device 13 can finish the “unloading operation” at a timing equivalent to the timing at which the “unloading operation” by the second transport device 17 ends, and the second transport device 17 places it on the delivery unit 14.
- the placed processed wafer W can be immediately taken out from the delivery unit 14 and transferred to the carrier C.
- control unit 18 is expected to secure a transfer path of the wafer W from the carrier C to the processing unit 16 after determining that the elapsed time from the start time of the previous extraction operation has reached the threshold value. It is also possible to cause the first transfer device 13 to execute the “extraction operation” only before the time required for the “extraction operation”. Thereby, the residence time of the processed wafer W in the delivery part 14 can be shortened.
- the control unit 18 can calculate the remaining time until the processing by the processing unit 16 is completed based on, for example, the recipe information 19a and the state information 19b. Further, when the processing unit 16 has a function of measuring the remaining time, it can be directly acquired from the processing unit 16. In the modified example, it is assumed that the storage unit 19 (see FIG. 4) stores predetermined times as required times for the “extraction operation” and the “unloading operation”. These pieces of information are acquired from the unit 19.
- the example in which the first transfer device 13 transfers the wafers W one by one using the wafer holding mechanism 13a that can hold one wafer W has been described.
- a plurality of wafers W may be transferred in a batch using a holdable wafer holding mechanism.
- the control unit 18 when the elapsed time from the start time of the previous “extraction operation” reaches the threshold value and the transfer path of the wafer W is secured, the first transfer device 13 is “ It was decided to instruct the execution of the “extraction operation”. However, the control unit 18 does not necessarily need to determine whether or not the transfer path of the wafer W is secured. In other words, the control unit 18 causes the first transfer device 13 to move to the first transfer device 13 when the elapsed time from the start of the previous “extraction operation” reaches a threshold value, regardless of whether the transfer path of the wafer W is secured. On the other hand, execution of the “extraction operation” may be instructed.
- control unit 18 may determine the empty processing units 16 into which the unprocessed wafers W are loaded according to the number of executions of processing by each empty processing unit 16. .
- control unit 18 may carry in the unprocessed wafers W in order from the empty processing unit 16 in which the number of processing executions is small. Thereby, it is possible to prevent a deviation in the number of execution times of processing between the processing units 16.
- the control unit 18 selects one processing unit as the upper transfer unit 14, the second transport device 17, and the plurality of processing units.
- the processing unit 16 may be used, and the other processing unit may be executed using the lower delivery unit 14, the second transport device 17, and the plurality of processing units 16.
- the control unit 18 may execute the other processing unit after one processing unit ends. Good.
- Substrate Processing System 11 Carrier Placement Unit 12 Transport Unit 12a Carry In / Out Chamber 12b Delivery Chamber 13 First Transport Device 14 Delivery Unit 15 Transport Unit 16 Processing Unit 18 Control Unit
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Abstract
Description
ところで、基板処理システム1では、ウェハWに対する上述した基板処理とは別に、様々なイベントが発生する場合がある。イベントとしては、たとえば、処理ユニット16のチャンバ20内を洗浄するチャンバ洗浄処理や、処理流体供給部40が備えるノズルから処理液を吐出するダミーディスペンス処理などがある。
たとえば、第1搬送装置13が未処理ウェハWを受渡部14に載置した後で、空き処理ユニット16に異常が発生してウェハWを処理することができなくなった場合、他の処理ユニット16に空きができるまで、未処理ウェハWが受渡部14に滞留することとなる。
上述した実施形態では、基板処理システム1の現在の状態が、予め決められた経路確保条件を満たしている場合に第1搬送装置13に対して「取出動作」の実行を指示することとした。
上述した実施形態では、第1搬送装置13が1枚のウェハWを保持可能なウェハ保持機構13aを用いてウェハWを1枚ずつ搬送する場合の例について説明したが、複数枚のウェハWを保持可能なウェハ保持機構を用いて複数のウェハWを一括して搬送してもよい。
1 基板処理システム
11 キャリア載置部
12 搬送部
12a 搬入出室
12b 受渡室
13 第1搬送装置
14 受渡部
15 搬送部
16 処理ユニット
18 制御部
Claims (10)
- 複数の基板を収容するキャリアを載置するキャリア載置部と、
複数の前記基板を載置可能な基板載置部と、
前記キャリア載置部に載置された前記キャリアと前記基板載置部との間で前記基板を搬送する第1搬送装置と、
前記基板を処理する複数の処理部と、
前記複数の処理部と前記基板載置部との間で前記基板を搬送する第2搬送装置と、
前記第1搬送装置、前記複数の処理部および前記第2搬送装置を制御する制御部と
を備え、
前記制御部は、
前記第1搬送装置が前記キャリアから前記基板を取り出して前記基板載置部へ載置し且つ前記基板載置部から前記基板を取り出して前記キャリアへ収容するまでの所要時間以上の時間間隔で、前記第1搬送装置に対し、前記キャリアから前記基板を取り出して前記基板載置部へ載置する取出動作を実行させること
を特徴とする基板処理装置。 - 前記制御部は、
前回の前記取出動作からの経過時間が、前記所要時間以上の時間として予め設定された閾値に達したか否を判定し、前記閾値に達したと判定した場合に、前記第1搬送装置に対して前記取出動作を実行させること
を特徴とする請求項1に記載の基板処理装置。 - 前記制御部は、
前記キャリアから前記処理部に至るまでの前記基板の搬送経路が確保されているか否かをさらに判定し、前回の前記取出動作からの経過時間が前記閾値に達しており、且つ、前記搬送経路が確保されていると判定した場合に、前記第1搬送装置に対して前記取出動作を実行させること
を特徴とする請求項2に記載の基板処理装置。 - 前記制御部は、
前記基板載置部に前記基板を収容可能な空きスロットが存在すること、前記第2搬送装置が前記基板を保持していないこと、および、前記複数の処理部のうち前記基板を収容していない空き処理部が存在することを含む経路確保条件が満たされている場合に、前記搬送経路が確保されていると判定すること
を特徴とする請求項3に記載の基板処理装置。 - 前記経路確保条件は、
前記第1搬送装置が前記基板を保持していないことをさらに含むこと
を特徴とする請求項4に記載の基板処理装置。 - 前記経路確保条件は、
前記空き処理部の処理開始準備が整っていることをさらに含むこと
を特徴とする請求項4に記載の基板処理装置。 - 前記制御部は、
前記処理部によって処理された後の前記基板である処理済基板を収容可能な空きスロットが前記基板載置部に存在することを含む経路確保条件が満たされている場合に、前記搬送経路が確保されていると判定すること
を特徴とする請求項3に記載の基板処理装置。 - 前記制御部は、
複数の前記基板を処理対象とする一の処理単位の実行中に、特定のイベントの発生条件が成立した場合に、前記一の処理単位の実行が終了し、他の処理単位の実行が開始される前に、前記イベントを実行すること
を特徴とする請求項1~7のいずれか一つに記載の基板処理装置。 - 前記制御部は、
前回の前記取出動作からの経過時間が前記閾値に達したと判定した後、前記キャリアから前記処理部に至る前記基板の搬送経路が確保されることが予想される時刻よりも前記取出動作に要する時間以下の時間だけ前に、前記第1搬送装置に対して前記取出動作を実行させること
を特徴とする請求項2に記載の基板処理装置。 - 複数の基板を収容可能なキャリアを載置するキャリア載置部に載置された前記キャリアと複数の前記基板を載置可能な基板載置部との間で前記基板を搬送する第1搬送装置を用い、前記キャリアから前記基板を取り出して前記基板載置部へ載置し且つ前記基板載置部から前記基板を取り出して前記キャリアへ収容するまでの所要時間以上の時間間隔で、前記キャリアから前記基板を取り出して前記基板載置部へ載置する取出工程と、
前記基板を処理する複数の処理部と前記基板載置部との間で前記基板を搬送する第2搬送装置を用い、前記基板載置部から前記基板を取り出して前記処理部へ搬入する搬入工程と
を含むことを特徴とする基板搬送方法。
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