WO2010026955A1 - 基板保持部材、基板処理装置、基板処理方法 - Google Patents
基板保持部材、基板処理装置、基板処理方法 Download PDFInfo
- Publication number
- WO2010026955A1 WO2010026955A1 PCT/JP2009/065233 JP2009065233W WO2010026955A1 WO 2010026955 A1 WO2010026955 A1 WO 2010026955A1 JP 2009065233 W JP2009065233 W JP 2009065233W WO 2010026955 A1 WO2010026955 A1 WO 2010026955A1
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- WIPO (PCT)
- Prior art keywords
- tray
- substrate
- mask
- support portion
- outer edge
- Prior art date
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- 239000000758 substrate Substances 0.000 title claims abstract description 109
- 238000012545 processing Methods 0.000 title claims description 53
- 238000003672 processing method Methods 0.000 title claims description 7
- 230000002093 peripheral effect Effects 0.000 claims description 21
- 238000001179 sorption measurement Methods 0.000 claims description 6
- 230000001105 regulatory effect Effects 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 description 83
- 239000010408 film Substances 0.000 description 15
- 238000012546 transfer Methods 0.000 description 12
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- 239000000463 material Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000009191 jumping Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000013077 target material Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge clamping, e.g. clamping ring
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/04—Coating on selected surface areas, e.g. using masks
- C23C14/042—Coating on selected surface areas, e.g. using masks using masks
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/50—Substrate holders
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
Definitions
- the present invention relates to a substrate holding member, a substrate processing apparatus, and a substrate processing method particularly suitable for processing a thin substrate.
- the substrate may be processed while being placed on a tray.
- a ring chuck is further placed on a substrate dropped into a concave portion of a bottomed tray, and in that state, the tray is electrostatically attracted to the electrostatic chuck to perform processing on the substrate. It is disclosed.
- the outer edge of the wafer is easily damaged due to contact between the outer edge of the wafer and the tray.
- the problem here is that if a wafer fragment is placed on the transfer hand or electrostatic chuck, the fragment is sandwiched between the wafer and the wafer, causing damage to the device formation surface of the wafer. If the surface of the electrostatic chuck is made of a flexible material such as polyimide, there is a concern that the debris may bite into the electrostatic chuck electrode and cause a short circuit.
- the present invention has been made in view of the above problems, and provides a substrate holding member, a substrate processing apparatus, and a substrate processing method capable of avoiding problems caused by fragments of the substrate.
- a substrate support portion that supports an outer edge portion of the substrate, and a mask support that is provided on the outer peripheral side of the substrate support portion and protruding above the upper surface of the substrate support portion.
- a ring-shaped tray having a recess, a recess provided between the substrate support and the mask support, and the recess of the tray in a state of being superimposed on the mask support of the tray.
- a substrate holding member comprising: a ring-shaped mask that covers the substrate support portion.
- a substrate support portion that supports an outer edge portion of the substrate, and provided on the outer peripheral side of the substrate support portion and above the upper surface of the substrate support portion.
- a ring-shaped tray having a mask support portion formed thereon, a recess provided between the substrate support portion and the mask support portion, and the tray in a state of being overlapped with the mask support portion of the tray
- a ring-shaped mask that covers the concave portion and the substrate support portion, an electrostatic adsorption surface that can electrostatically adsorb the surface of the substrate that is exposed from the tray and the mask, and an outer circumference than the electrostatic adsorption surface
- a rotary stage having a tray mounting portion provided on a lower side of the electrostatic chucking surface, and the substrate is sucked to the electrostatic chucking surface.
- an outer edge portion of a substrate is supported by a substrate support portion provided on a ring-shaped tray, and is on the outer peripheral side of the substrate support portion and the substrate support portion.
- a ring-shaped mask is overlaid on a mask support portion of the tray provided so as to protrude above the upper surface of the tray, and the substrate is held in a state where an outer edge portion of the substrate is covered with the tray and the mask,
- the tray holding the substrate and the mask are moved toward the rotary stage, and the surface exposed from the tray and the mask in a state where the outer edge portion of the substrate is protruded to the tray mounting portion side is While being attracted to the electrostatic attracting surface of the rotary stage, the tray is placed on a tray placing portion provided on the outer peripheral side of the electrostatic attracting surface and below the electrostatic attracting surface.
- the tray and the mask superimposed on the tray are separated from the outer edge portion of the substrate to cover the outer edge portion, and the substrate is processed while rotating the rotary stage in this state.
- the tray is placed on the tray placing portion and the tray and the mask superimposed on the tray are separated from the outer edge portion of the substrate to cover the outer edge portion.
- a substrate holding member capable of avoiding problems caused by substrate fragments.
- substrate holding member which concerns on embodiment of this invention. 1 is a schematic diagram of a substrate processing apparatus according to an embodiment of the present invention.
- the principal part expansion schematic diagram which shows the state by which the board
- the schematic diagram which shows the other specific example of the tray mounting part in the rotation stage shown to FIG.
- the semiconductor wafer to be processed in the present embodiment is very thin, for example, the thickness is 10 to 100 ⁇ m, more specifically about 50 ⁇ m. In the present embodiment, such a thin semiconductor wafer is carried into and out of the processing chamber while being held by the holding member.
- FIG. 1 is a schematic cross-sectional view of the holding member 10.
- FIG. 1 also shows the semiconductor wafer W held by the holding member 10.
- the holding member 10 is composed of a ring-shaped tray 11 and a ring-shaped mask 21.
- the tray 11 and the mask 21 are carried into the processing chamber together with the semiconductor wafer W, and are exposed to plasma, high temperature, and various gases during the sputter film formation process, and have sufficient heat resistance and mechanical strength to withstand it.
- the semiconductor wafer W can be stably held without being deformed or damaged.
- the material of the tray 11 and the mask 21 can include titanium, a titanium alloy, alumina, and the like.
- the tray 11 is formed in a circular ring shape, and has an outer diameter larger than the diameter of the semiconductor wafer W and an inner diameter smaller than the diameter of the semiconductor wafer W.
- a step is provided on the upper surface side where the semiconductor wafer W is held, and the lower surface on the opposite side is a flat surface.
- a wafer support part (substrate support part) 13 and a mask support part 12 are provided on the upper surface side of the tray 11.
- the mask support portion 12 is provided on the outer peripheral side larger than the diameter of the semiconductor wafer W in the tray 11, and the wafer support portion 13 is provided on the inner peripheral side of the mask support portion 12.
- the upper surface of the wafer support portion 13 is formed in a circular ring shape in accordance with the circular shape of the semiconductor wafer W, and the upper surface of the mask support portion 12 is also formed in a circular ring shape.
- the radial width dimension of the mask support portion 12 is larger than the radial width dimension of the wafer support portion 13, and therefore the area of the upper surface of the mask support portion 12 is larger than the area of the upper surface of the wafer support portion 13.
- the mask support 12 projects upward from the wafer support 13.
- “upward” represents the upper side when the flat back side of the tray 11 is set as the lower side. Therefore, there is a height level difference (step) between the upper surface of the mask support 12 and the upper surface of the wafer support 13, and the upper surface of the mask support 12 is higher than the upper surface of the wafer support 13. Is located.
- a concave portion 14 is provided between the wafer support portion 13 and the mask support portion 12.
- the concave portion 14 is formed in a groove shape continuous over the entire circumferential direction of the ring-shaped tray 11 so as to follow the curvature of the outer edge (edge) of the semiconductor wafer W.
- the bottom of the recess 14 is located below the upper surface of the mask support 12 and the upper surface of the wafer support 13.
- the semiconductor wafer W is supported on the tray 11 by placing the outer edge portion (peripheral edge portion) on the wafer support portion 13 of the tray 11.
- the diameter of the semiconductor wafer W is, for example, 200 mm, and the portion that is supported by being in contact with the wafer support portion 13 is about 2.5 mm on the outer peripheral side.
- the inner diameter of the mask support portion 12 is slightly larger than the diameter of the semiconductor wafer W, and the semiconductor wafer W is accommodated inside the inner peripheral surface 15 of the mask support portion 12. The positional deviation in the radial direction of the semiconductor wafer W is restricted.
- the mask 21 that constitutes the holding member 10 together with the tray 11 described above is formed in a circular ring shape, and has an outer diameter larger than the outer diameter of the tray 11 and an inner diameter smaller than the inner diameter of the tray 11. That is, the radial width dimension of the mask 21 is larger than the radial width dimension of the tray 11, and a part of the lower surface of the mask 21 is placed on the mask support portion 12 of the tray 11 and superimposed on the tray 11.
- the mask 21 covers all of the tray 11. Both the lower surface and upper surface of the mask 21 are flat surfaces, and the lower surface extends radially inward from the tray 11.
- a circular ring-shaped rib 22 projecting downward is provided on the outermost peripheral portion of the mask 21, and the tray 11 is accommodated on the inner peripheral side of the rib 22, so that the tray 11 and the mask 21 can be mutually connected in the radial direction. Misalignment is regulated.
- the deformation of the mask 21 is suppressed by the formation of the circular ring-shaped ribs 22. Since the circular ring-shaped recess 14 is formed in the tray 11, deformation of the tray 11 is suppressed.
- the main function of the concave portion 14 is to retain the fragments when the outer edge portion of the semiconductor wafer W is damaged, so that it does not wrap around the back side of the semiconductor wafer W.
- a metal (not limited to a pure metal but includes an alloy) functioning as an electrode on the second main surface opposite to the first main surface on which an element main part such as a transistor is formed in the semiconductor wafer W.
- a film is formed by sputtering.
- the outer edge portion of the semiconductor wafer W is placed and supported on the wafer support portion 13 of the tray 11 with the second main surface, which is the film formation surface, facing upward.
- the semiconductor wafer W is placed on the wafer support 13 of the tray 11 by its own weight.
- the mask 21 is overlaid on the mask support 12 of the tray 11.
- the mask 21 is placed on the mask support 12 of the tray 11 by its own weight.
- the mask 21 covers all of the tray 11 including the wafer support portion 13, the recess 14, and the mask support portion 12, and the semiconductor wafer W is supported on the tray 11.
- the outer edge of the semiconductor wafer W is covered.
- the upper surface of the wafer support portion 13 is at a position lower than the upper surface of the mask support portion 12, a slight gap is formed between the film formation surface of the semiconductor wafer W and the lower surface of the mask 21. Does not contact the semiconductor wafer W.
- the semiconductor wafer W is loaded into the processing chamber while being held by the tray 11 and the mask 21 as shown in FIG. 1, or unloaded from the processing chamber after the processing.
- a lift mechanism or the like that moves the semiconductor wafer W up and down with respect to the stage in the processing chamber by carrying the thin semiconductor wafer W on the tray 11 having sufficient strength and transporting the tray 11 together with the semiconductor is provided. It is possible to prevent the semiconductor wafer W from being damaged without coming into contact with the wafer W, or to reduce the impact on the semiconductor wafer W to prevent breakage.
- the mask 21 is overlaid on the tray 11 and the outer edge portion of the semiconductor wafer W is covered with the mask 21, so that the semiconductor wafer W can be prevented from jumping or falling off from the tray 11 during conveyance.
- the processing apparatus is a multi-chamber processing apparatus having a plurality of processing chambers so as to be capable of forming a plurality of different types of laminated films on a substrate or a specific type of film formation. For example, sputter film formation processing is performed on the substrate in each processing chamber, but the multi-chamber processing apparatus according to the present embodiment includes a substrate attaching / detaching chamber in addition to the processing chamber.
- a transfer robot 50 shown in FIG. 3 is provided in the substrate attachment / detachment chamber.
- This transfer robot 50 is a horizontal articulated robot in which an arm 52 is moved in the horizontal direction by a drive mechanism 51.
- the unprocessed semiconductor wafer W is taken out from a cassette (not shown) onto a finger (hand) 53 attached to the tip of the arm 52 by the transfer robot 50 in the substrate attachment / detachment chamber.
- the processed semiconductor wafer W is returned from the finger 53 into the cassette.
- the semiconductor wafer W is merely placed on the finger 53 by its own weight, and is not held by suction or the like. Only the frictional force generated by its own weight in the area where the semiconductor wafer W is in contact with the finger 53 becomes the holding force.
- the tray 11 and the mask 21 have a sufficiently large weight as compared with the semiconductor wafer W, and the friction resistance is increased by placing the semiconductor wafer W on the finger 53 and carrying the tray 11 and the mask 21 together.
- the conveyance speed can be increased to reduce the total processing time.
- FIG. 2 schematically shows one processing chamber in the processing apparatus according to the embodiment of the present invention.
- the processing chamber 30 is surrounded by a chamber wall 31.
- a gas introduction system and an exhaust system (not shown) are connected to the inside of the processing chamber 30, and by these controls, it is possible to bring the inside of the processing chamber 30 under a desired reduced pressure with a desired gas.
- a target 34 and a rotary stage 32 are provided facing each other.
- the target 34 is held by a backing plate or the like and provided at the upper part in the processing chamber 30, and the rotary stage 32 is provided at the bottom in the processing chamber 30.
- the rotary stage 32 has an electrostatic chuck mechanism, and an electrode 33 is provided therein, and a dielectric is provided between the electrode 33 and the stage surface (electrostatic attracting surface 32a).
- a voltage is applied to the internal electrode 33 from a power source (not shown)
- an electrostatic force is generated between the electrostatic chucking surface 32a and the semiconductor wafer W placed thereon, and the semiconductor wafer W is applied to the electrostatic chucking surface 32a. Adsorbed and fixed.
- a tray mounting portion 32b is provided at a position that is on the outer peripheral side of the electrostatic attraction surface 32a and is lowered below the electrostatic attraction surface 32a.
- the tray mounting portion 32b is provided in an annular shape so as to surround the periphery of the electrostatic attraction surface 32a.
- the processing apparatus of the present embodiment is a multi-chamber processing apparatus having a plurality of processing chambers as described above.
- the target 34 having a small diameter is used to reduce the number of processing chambers.
- Two, for example, are used to share the processing chamber.
- the sputter film formation is performed while the semiconductor wafer W is rotated by the rotary stage 32.
- the rotary stage 32 is provided so as to be rotatable together with the internal electrode 33 around a central axis indicated by a one-dot chain line in FIG.
- the semiconductor wafer W is loaded into the processing chamber 30 through the loading / unloading port 36 formed in the chamber wall 31 together with the holding member 10 (tray 11 and mask 21) in the state shown in FIG. After this loading, the loading / unloading port 36 is airtightly closed by a gate or the like (not shown). Thereafter, the inside of the processing chamber 30 is set to a desired gas atmosphere having a desired pressure suitable for the sputtering film forming process.
- the carrying-in / out of the holding member 10 to / from the processing chamber 30 through the carry-in / out port 36 is performed using a transfer robot or the like.
- a pin-shaped lift mechanism 37 as shown in FIG. 4 is provided in the processing chamber 30.
- the lower surface of the tray 11 is supported by the lift mechanism 37.
- the lift mechanism 37 is provided to be able to move up and down in a guide hole 38 formed below the tray mounting portion 32 b of the rotary stage 32 and in a space above the guide hole 38.
- the lift mechanism 37 is not limited to the pin shape, and may be a table shape.
- the holding member 10 holding the semiconductor wafer W is carried into a position above the rotary stage 32, and then held by lowering the lift mechanism 37 that supports the lower surface of the holding member 10.
- the member 10 is lowered toward the rotary stage 32.
- the electrostatic attraction surface 32 a is formed in, for example, a circular shape, and the inner diameter of the tray 11 is larger than the diameter of the electrostatic attraction surface 32 a, and the electrostatic attraction surface 32 a can be inserted inside the inner peripheral surface of the tray 11. .
- the semiconductor wafer W supported by the wafer support portion 13 of the tray 11 also descends.
- the semiconductor wafer W is exposed from the tray 11.
- the lower surface is placed on the electrostatic chucking surface 32a and fixed by suction.
- the outer edge portion of the semiconductor wafer W supported by the wafer support portion 13 of the tray 11 protrudes toward the tray mounting portion 32b on the outer peripheral side of the electrostatic chucking surface 32a.
- the tray 11 is placed on the tray placement portion 32b of the rotary stage 32. As shown in FIG. 4, in the state where the tray 11 is placed on the tray placement portion 32b, the upper surface of the wafer support portion 13 is positioned below the electrostatic chucking surface 32a and is located on the outer edge portion of the semiconductor wafer W. On the other hand, it is in a separated state without contact.
- the mask 21 supported by the mask support portion 12 of the tray 11 is also lowered. Since the semiconductor wafer W is placed on the wafer support portion 13 of the tray 11, the inner peripheral portion 21 a of the mask 21 covers the outer edge portion of the semiconductor wafer W. Even if the tray 11 is removed from the support of the semiconductor wafer W and placed on the tray placing portion 32b by appropriately setting the step with the mask supporting portion 12, the inner peripheral side of the mask 21 The portion 21 a can maintain a separated state without contacting the outer edge portion of the semiconductor wafer W.
- the sputter film forming process is performed on the semiconductor wafer W while the rotary stage 32 is rotated. That is, by applying a voltage from the power supply device 35 shown in FIG. 2 to the target 34, a discharge is generated between the target 34 and the rotary stage 32 to generate plasma, and ions generated thereby are generated by an electric field in the processing space. By accelerating toward the target 34 and colliding with the target 34, particles of the target material are knocked out of the target 34 and deposited on the deposition surface of the semiconductor wafer W.
- the concave portion 14 is present below the outer edge of the semiconductor wafer W during the conveyance in which the semiconductor wafer W is held by the holding member 10 and during the processing shown in FIG. Even if the outer edge portion is thin and interferes with the tray 11 to produce fine fragments, the fragments can be dropped and retained in the recess 14. That is, no debris is scattered. Thereby, it is possible to avoid that the fragments of the semiconductor wafer W wrap around the lower surface side of the semiconductor wafer W and sandwich the fragments between the finger 53 of the transfer robot 50 and the electrostatic chucking surface 32a. Therefore, it is possible to prevent problems such as damage to the element forming surface of the semiconductor wafer W and short-circuiting due to the fragments biting into the internal electrode 33 of the rotary stage 32.
- the mask 21 is in a state of covering all of the tray 11 including the concave portion 14 and the wafer support portion 13 during processing, the film adhesion to the tray 11 can be prevented and maintenance can be reduced.
- the voltage application to the internal electrode 33 shown in FIG. 2 is first stopped while the state shown in FIG. 4 is maintained, and the electrostatic adsorption force to the semiconductor wafer W is released.
- the inner peripheral portion 21a of the mask 21 covers the outer edge portion of the semiconductor wafer W, it is possible to prevent the semiconductor wafer W from jumping on the rotary stage 32 and falling from the rotary stage 32.
- the tray 11 is raised from the state shown in FIG. 4 by the lift mechanism 37, and the outer edge of the semiconductor wafer W is placed on the wafer support portion 13 of the tray 11. Is lifted from the electrostatic attraction surface 32a. 2 is opened, and the semiconductor wafer W is carried out of the processing chamber 30 together with the holding member 10 by a transfer mechanism (not shown).
- the semiconductor wafer W is fixed to the electrostatic chucking surface 32a, but the tray 11 is only placed on the tray mounting portion 32b of the rotary stage 32, and the mask. 21 is only placed on the mask support 12 of the tray 11. Therefore, there is a possibility that the tray 11 and the mask 21 may move relative to the semiconductor wafer W due to the inertial force during the rotation of the rotary stage 32. If the tray 11 is fixed to the rotary stage 32 or the tray 11 and the mask 21 are fixed to each other, such a shift movement can be eliminated. However, the structure tends to be complicated due to the mechanism involving rotation. is there.
- the tray 11 and the mask 21 are placed on the rotary stage 32 as shown in FIG. Since none of these parts are in contact with the semiconductor wafer W, the influence of the movement of the tray 11 or the mask 21 is prevented from being transmitted to the semiconductor wafer W. If the semiconductor wafer W is thin, even a slight contact with the tray 11 and the mask 21 is likely to cause damage. However, in the present embodiment, since the tray 11 and the mask 21 are separated from the semiconductor wafer W as described above, a semiconductor is used. Damage to the wafer W can be prevented.
- FIG. 5A shows an example in which a groove 41 that can accommodate the lower surface of the tray 11 is provided. In this case, the movement of the tray 11 in the radial direction can be restricted by the side wall of the groove 41.
- FIG. 5B shows an example in which fine irregularities 42 are provided on the surface of the tray placement portion.
- the surface of the tray placement unit may be roughened. In this case, it is possible to increase the frictional force between the surface of the tray placing portion and the lower surface of the tray placed thereon, and the tray 11 can hardly slide.
- the rear surface of the tray is attracted to the electrostatic attracting surface.
- the semiconductor wafer W is directly attracted to the electrostatic attracting surface 32a.
- the tray is not interposed between the stage and the semiconductor wafer, heat transfer from the stage to the wafer is hindered. Therefore, it is possible to improve the controllability of heating or cooling so that the semiconductor wafer is brought to a desired temperature. Further, the degree of adhesion between the wafer and the suction surface can be made uniform without variation over the entire wafer surface, and the temperature distribution in the wafer surface can be made uniform. From the above, wafer processing quality can be improved. Further, when the tray is electrostatically attracted, the tray is limited to an insulator, but in the present embodiment, the material of the tray is not limited to the insulator and is not restricted by the material selection.
- the substrate to be processed is not limited to a semiconductor wafer, and may be, for example, a mask for pattern transfer in lithography, a disk-shaped recording medium, or the like. Further, the process performed on the substrate is not limited to the sputter film formation, and may be a process such as sputter etching, CDE (chemical dry etching), CVD (chemical vapor deposition), or surface modification.
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Abstract
Description
また、本発明の他の一態様によれば、基板の外縁部を支持する基板支持部と、前記基板支持部よりも外周側であって且つ前記基板支持部の上面よりも上方に突出して設けられたマスク支持部と、前記基板支持部と前記マスク支持部との間に設けられた凹部と、を有するリング状のトレイと、前記トレイの前記マスク支持部に重ね合わされた状態で、前記トレイの前記凹部及び前記基板支持部を覆うリング状のマスクと、前記基板における前記トレイ及び前記マスクから露出している面を静電吸着可能な静電吸着面と、前記静電吸着面よりも外周側であって且つ前記静電吸着面よりも下方に設けられたトレイ載置部と、を有する回転ステージと、を備えた基板処理装置であって、前記基板が前記静電吸着面に吸着された状態で前記基板の外縁部は前記トレイ載置部側に突出し、前記トレイが前記トレイ載置部に載置された状態で、前記トレイ及び前記トレイに重ね合わされた前記マスクは、前記基板の外縁部に対して離間して前記外縁部を覆うことを特徴とする基板処理装置が提供される。
また、本発明のさらに他の一態様によれば、リング状のトレイに設けられた基板支持部に基板の外縁部を支持させ、前記基板支持部よりも外周側であって且つ前記基板支持部の上面よりも上方に突出して設けられた前記トレイのマスク支持部にリング状のマスクを重ね合わせて、前記トレイ及び前記マスクで前記基板の外縁部を覆った状態で前記基板を保持し、前記基板を保持した前記トレイ及び前記マスクを回転ステージに向けて移動させ、前記基板における前記外縁部を前記トレイ載置部側に突出させた状態で前記トレイ及び前記マスクから露出している面を前記回転ステージの静電吸着面に吸着させると共に、前記トレイを、前記静電吸着面よりも外周側であって且つ前記静電吸着面よりも下方に設けられたトレイ載置部に載置させることで、前記トレイ及び前記トレイに重ね合わされた前記マスクが前記基板の外縁部に対して離間して前記外縁部を覆う状態にし、この状態で前記回転ステージを回転させつつ前記基板に対する処理を行い、前記基板の処理の後、前記トレイが前記トレイ載置部に載置されて前記トレイ及び前記トレイに重ね合わされた前記マスクが前記基板の外縁部に対して離間して前記外縁部を覆う状態を保ったまま、前記基板に対する静電吸着力の解除を行うことを特徴とする基板処理方法が提供される。
11 トレイ
12 マスク支持部
13 ウェーハ支持部(基板支持部)
14 凹部
21 マスク
30 処理室
32 回転ステージ
32a 静電吸着面
32b トレイ載置部
34 ターゲット
Claims (5)
- 基板の外縁部を支持する基板支持部と、前記基板支持部よりも外周側であって且つ前記基板支持部の上面よりも上方に突出して設けられたマスク支持部と、前記基板支持部と前記マスク支持部との間に設けられた凹部と、を有するリング状のトレイと、
前記トレイの前記マスク支持部に重ね合わされた状態で、前記トレイの前記凹部及び前記基板支持部を覆うリング状のマスクと、
を備えたことを特徴とする基板保持部材。 - 前記凹部は、前記リング状のトレイの周方向全体にわたって連続して設けられていることを特徴とする請求項1記載の基板保持部材。
- 基板の外縁部を支持する基板支持部と、前記基板支持部よりも外周側であって且つ前記基板支持部の上面よりも上方に突出して設けられたマスク支持部と、前記基板支持部と前記マスク支持部との間に設けられた凹部と、を有するリング状のトレイと、
前記トレイの前記マスク支持部に重ね合わされた状態で、前記トレイの前記凹部及び前記基板支持部を覆うリング状のマスクと、
前記基板における前記トレイ及び前記マスクから露出している面を静電吸着可能な静電吸着面と、前記静電吸着面よりも外周側であって且つ前記静電吸着面よりも下方に設けられたトレイ載置部と、を有する回転ステージと、
を備えた基板処理装置であって、
前記基板が前記静電吸着面に吸着された状態で前記基板の外縁部は前記トレイ載置部側に突出し、
前記トレイが前記トレイ載置部に載置された状態で、前記トレイ及び前記トレイに重ね合わされた前記マスクは、前記基板の外縁部に対して離間して前記外縁部を覆うことを特徴とする基板処理装置。 - 前記トレイ載置部に、前記回転ステージの回転に伴う前記トレイの滑り移動を規制する規制機構が設けられていることを特徴とする請求項3記載の基板処理装置。
- リング状のトレイに設けられた基板支持部に基板の外縁部を支持させ、前記基板支持部よりも外周側であって且つ前記基板支持部の上面よりも上方に突出して設けられた前記トレイのマスク支持部にリング状のマスクを重ね合わせて、前記トレイ及び前記マスクで前記基板の外縁部を覆った状態で前記基板を保持し、
前記基板を保持した前記トレイ及び前記マスクを回転ステージに向けて移動させ、前記基板における前記外縁部を前記トレイ載置部側に突出させた状態で前記トレイ及び前記マスクから露出している面を前記回転ステージの静電吸着面に吸着させると共に、前記トレイを、前記静電吸着面よりも外周側であって且つ前記静電吸着面よりも下方に設けられたトレイ載置部に載置させることで、前記トレイ及び前記トレイに重ね合わされた前記マスクが前記基板の外縁部に対して離間して前記外縁部を覆う状態にし、この状態で前記回転ステージを回転させつつ前記基板に対する処理を行い、
前記基板の処理の後、前記トレイが前記トレイ載置部に載置されて前記トレイ及び前記トレイに重ね合わされた前記マスクが前記基板の外縁部に対して離間して前記外縁部を覆う状態を保ったまま、前記基板に対する静電吸着力の解除を行うことを特徴とする基板処理方法。
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CN110605674A (zh) * | 2019-06-21 | 2019-12-24 | 日月光半导体制造股份有限公司 | 环状件及晶片夹持组件 |
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Publication number | Publication date |
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JP5001432B2 (ja) | 2012-08-15 |
CN102150251A (zh) | 2011-08-10 |
TWI421976B (zh) | 2014-01-01 |
US20110159200A1 (en) | 2011-06-30 |
JPWO2010026955A1 (ja) | 2012-02-02 |
DE112009002156T5 (de) | 2012-01-12 |
TW201021155A (en) | 2010-06-01 |
US9099513B2 (en) | 2015-08-04 |
CN102150251B (zh) | 2013-06-19 |
KR101533138B1 (ko) | 2015-07-01 |
KR20110053383A (ko) | 2011-05-20 |
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