WO2006057410A1 - 表示装置及びその駆動方法 - Google Patents
表示装置及びその駆動方法 Download PDFInfo
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- WO2006057410A1 WO2006057410A1 PCT/JP2005/021904 JP2005021904W WO2006057410A1 WO 2006057410 A1 WO2006057410 A1 WO 2006057410A1 JP 2005021904 W JP2005021904 W JP 2005021904W WO 2006057410 A1 WO2006057410 A1 WO 2006057410A1
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- display
- load factor
- capacitive load
- load
- display device
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
- G09G3/2965—Driving circuits for producing the waveforms applied to the driving electrodes using inductors for energy recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
Definitions
- the present invention relates to a display device and a driving method thereof, and more particularly to a display device having a capacitive load and a driving method thereof.
- a plasma display is a large-sized flat display and has begun to spread as a wall-mounted television for home use. For further diffusion, the same brightness as CRT is required.
- a plasma display is provided with a power recovery circuit.
- the power recovery circuit itself is widely known.
- Japanese Patent Application Laid-Open No. 63-101897 and Japanese Patent Application Laid-Open No. 7-160219 describe the electric power recovery circuit.
- the power recovery circuit is an LC resonance circuit, it takes time to recover the plasma display panel power and to supply the recovered power to the plasma display panel.
- the sustain pulse width for display becomes wider and the number of sustain pulses cannot be increased. For this reason, the total number of sustain pulses in one frame is limited, and the brightness cannot be increased.
- the luminance is basically proportional to the total number of sustain pulses.
- Japanese Patent Application Laid-Open No. 2002-62844 describes a plasma display using a sustain pulse composed of a positive potential and a negative potential.
- Patent Document 1 Japanese Patent Application Laid-Open No. 63-101897
- Patent Document 2 JP-A-7-160219
- Patent Document 3 Japanese Patent Laid-Open No. 2002-62844
- An object of the present invention is to provide a display device capable of increasing luminance in a region where the display load factor is relatively low, and a driving method thereof.
- a capacitive load, a clamp circuit for clamping the potential of the capacitive load to the noise level and the mouth level, and the capacitive load force power are recovered and recovered.
- a display device includes a power recovery circuit including a coil for supplying power to a capacitive load, a display load factor detection unit for detecting a display load factor, and a control unit.
- the control unit controls the potential of the capacitive load by the clamp circuit without using the power recovery circuit when the detected display load ratio is smaller than the first threshold, and the detected display load ratio is the first.
- the potential of the capacitive load is controlled by the power recovery circuit and the clamp circuit.
- FIG. 1 is a diagram showing a basic configuration example of a plasma display (display device) according to a first embodiment of the present invention.
- FIG. 2A is a diagram showing a cross-sectional configuration example of a display cell.
- FIG. 2B is a diagram showing a cross-sectional configuration example of a display cell.
- FIG. 2C is a diagram showing a cross-sectional configuration example of the display cell.
- FIG. 3 is a diagram showing a configuration example of one frame of an image.
- FIG. 4 is a circuit diagram showing a configuration example of a Y electrode drive circuit according to the first embodiment.
- FIG. 5A is a timing chart showing the sustain pulse of the Y electrode when the display load factor is large according to the first embodiment.
- FIG. 5B is a timing chart showing the sustain pulse of the Y electrode when the display load factor is small according to the first embodiment.
- FIG. 6A is a timing chart showing a sustain pulse of the Y electrode when the display load factor is large according to the second embodiment of the present invention.
- FIG. 6B is a timing chart showing the sustain pulse of the Y electrode when the display load factor is small according to the second embodiment.
- FIG. 7 is a graph showing the relationship between the display load factor and the total number of sustain pulses according to the third embodiment of the present invention.
- FIG. 8 is a graph showing the relationship between the display load factor, the total power consumption, and the total number of sustain pulses according to the fourth embodiment of the present invention.
- FIG. 1 is a diagram showing a basic configuration example of a plasma display (display device) according to the first embodiment of the present invention.
- the control circuit unit 101 includes a display load factor detection unit 111 and a sustain pulse control unit 112, and includes an address driver 102, an X sustain circuit 103 for driving the X electrode, a Y sustain circuit 104 for driving the Y electrode, and a scan driver. No 105 is controlled.
- the address driver 102 supplies a predetermined voltage to the address electrodes Al, A2, A3,.
- each of the address electrodes Al, A2, A3,... Or their generic name is referred to as an address electrode Aj, and j represents a subscript.
- the scan driver 105 supplies a predetermined voltage to the Y electrodes Yl, Y2, Y3,... According to the control of the control circuit unit 101 and the Y sustain circuit 104.
- each of the Y electrodes Yl, Y2, Y3,... Or their generic name is referred to as a Y electrode Yi, and i means a subscript.
- the X sustain circuit 103 supplies the same voltage to the X electrodes XI, X2, X3,.
- each of the X electrodes XI, X2, X3,... Or their generic name is called an X electrode Xi, and i means a subscript.
- Each X electrode Xi is interconnected and has the same voltage level.
- the Y electrode Yi and the X electrode Xi form a row extending in parallel in the horizontal direction, and the address electrode Aj forms a column extending in the vertical direction.
- Y electrode Yi and X electrode Xi are alternately arranged in the vertical direction.
- the rib 106 has a stripe structure provided between the address electrodes Aj.
- the Y electrode Yi and the address electrode Aj form a two-dimensional matrix with i rows and j columns.
- the display cell Cij is formed by the intersection of the Y electrode Yi and the address electrode Aj and the corresponding X electrode Xi adjacent thereto.
- the display cell Cij corresponds to a pixel, and the display area 107 can display a two-dimensional image.
- the X electrode Xi and the Y electrode Yi in the display cell Cij have a space between them and constitute a capacitive load.
- the display load factor detection unit 111 receives image data to be displayed in the display area 107 from the outside, and detects the display load factor of one frame image based on the image data.
- the display load factor is detected based on the number of pixels that emit light and the gradation value of the pixels that emit light. For example, if all pixels of a frame image are displayed with the maximum gradation value, the display load factor is 100 %. In addition, when all the pixels of one frame image are displayed with the maximum gradation value of 1Z2, the display load factor is 50%. In addition, when only half (50%) of a frame image is displayed with the maximum gradation value, the display load factor is 50%.
- the display load factor detection unit 111 may detect the display load factor based on the sustain current or the sustain power of the X sustain circuit 103 and the Z or Y sustain circuit 104. In the pixel that emits light, discharge occurs in the display cell Cij corresponding to the pixel, and light is emitted. Therefore, the display load factor can also be detected by measuring the sustain current or the sustain power that is the discharge current.
- the image When the display load factor is large, the image is bright overall, and when the display load factor is small, the image is dark overall. In a dark image, high brightness is required when displaying a bright color such as the flicker of a headlight. Further, in a dark image, a difference between a dark part and a bright part is conspicuous, that is, an improvement in contrast is required.
- the sustain pulse control unit 112 controls the X sustain circuit 103 and the Y sustain circuit 104 in accordance with the display load rate detected by the display load rate detection unit 111. Specifically, when the display load factor is smaller than the first threshold value, a sustain pulse is generated by the clamp circuit without using the power recovery circuit, and when the display load factor is larger than the first threshold value, the power is recovered. A sustain pulse is generated by a recovery circuit and a clamp circuit. Details thereof will be described later with reference to FIGS. 5A and 5B.
- FIG. 2A is a diagram showing a cross-sectional configuration example of the display cell Cij in FIG. X electrode Xi and Y electrode Y i are formed on front glass substrate 211. On top of that, a dielectric layer 212 for insulating against the discharge space 217 is deposited, and further, an MgO (acid magnesium) protective film 213 is deposited thereon.
- MgO acid magnesium
- the address electrode Aj is formed on a rear glass substrate 214 disposed to face the front glass substrate 211, and a dielectric layer 215 is deposited thereon, and further a phosphor is formed thereon. But It is attached. Since the phosphor is not directly involved in the description of the present invention, it is not shown in FIG. 2A and is omitted.
- a discharge space 217 between the MgO protective film 213 and the dielectric layer 215 is filled with Ne + Xe Paying gas or the like.
- FIG. 2B is a diagram for explaining the panel capacitance Cp of the AC drive type plasma display.
- the capacity Ca is the capacity of the discharge space 217 between the X electrode Xi and the Y electrode Yi.
- the capacitance Cb is the capacitance of the dielectric layer 212 between the X electrode Xi and the Y electrode Yi.
- Capacitance Cc is the capacitance of front glass substrate 211 between X electrode Xi and scan electrode Yi. The sum of these capacitances Ca, Cb, and Cc determines the panel capacitance Cp between the electrodes Xi and Yi.
- FIG. 2C is a diagram for explaining light emission of the AC drive type plasma display.
- red, blue, and green phosphors 218 are arranged and applied in stripes for each color, and the phosphor 218 is excited by discharge between the X electrode Xi and the Y electrode Yi. As a result, light 221 is generated.
- FIG. 3 is a diagram illustrating a configuration example of one frame FR of an image.
- the image is formed at 60 frames / second, for example.
- One frame FR is formed of a first subframe SF1, a second subframe SF2,..., An nth subframe SFn. This n is, for example, 10, and corresponds to the number of gradation bits.
- Each of the subframes SF1, SF2, etc., or their generic name is hereinafter referred to as a subframe SF.
- Each subframe SF includes a reset period Tr, an address period Ta, and a sustain (sustain discharge) period Ts.
- the reset period Tr the display cell is initialized.
- the address period Ta light emission or non-light emission of each display cell can be selected by address discharge between the address electrode Aj and the Y electrode Yi.
- the sustain period Ts a sustain discharge is performed between the X electrode Xi and the Y electrode Yi of the selected display cell to emit light.
- the number of times of light emission by the sustain pulse between the X electrode Xi and the Y electrode Yi (the length of the sustain period Ts) is different. Thereby, the gradation value can be determined.
- the sustain pulse in the sustain period Ts is varied according to the display load factor.
- FIG. 4 is a circuit diagram showing a configuration example of the Y electrode drive circuit according to the present embodiment.
- This Y electrode drive circuit corresponds to the Y sustain circuit 104 and the scan driver 105 in FIG. X
- the electrode Xi and the Y electrode Yi constitute a capacitive load (panel capacitance) 420 by sandwiching a space insulator between them.
- the circuit connected to the left of the Y electrode Yi is the Y electrode drive circuit.
- An X electrode drive circuit is connected to the right of the X electrode Xi.
- the Y electrode drive circuit will be described below, but the X electrode drive circuit has the same configuration as the Y electrode drive circuit.
- the X electrode drive circuit corresponds to the X sustain circuit 103 in FIG. 1, and does not include the transistors 403 and 404, the scan operation elements 405, 406, and 421, and the diodes 407 and 408 corresponding to the scan driver 105.
- the Y sustain circuit 104 includes a clamp circuit for clamping and a power recovery circuit for performing LC resonance.
- a MOS field effect transistor FET
- the high level clamp circuit has a transistor CU for clamping the potential of the Y electrode Yi of the capacitive load 420 to a noise level (for example, Vs).
- the low level clamp circuit includes a transistor CD for clamping the potential of the Y electrode Yi of the capacitive load 420 to a low level (eg, ground).
- the power recovery circuit includes a coil 412, a diode 418 and a transistor LD for recovering power also at the Y electrode Y of the capacitive load 420, and a coil for supplying the recovered power to the Y electrode Yi of the capacitive load 420. 411, diode 415, and transistor LU.
- the n-channel transistor 403 has a parasitic diode, the drain is connected to the anode of the diode 408, and the source is connected to the Y electrode Yi.
- the n-channel transistor CD has a parasitic diode, the source is connected to the ground, and the drain is connected to the diode 408 cathode.
- the diode 410 has an anode connected to the drain of the transistor CD and a force sword connected to a positive potential (power supply potential) Vs.
- Coil 412 is connected between the cathode of diode 408 and the anode of diode 418.
- the diode 416 has an anode connected to the anode of the diode 418 and a force sword connected to the positive potential Vs.
- the diode 417 has an anode connected to the ground and a force sword connected to the anode of the diode 418.
- the n-channel transistor LD has a parasitic diode, the source is connected to the capacitor 419, and the drain is connected to the force sword of the diode 418.
- the n-channel transistor 404 has a parasitic diode, and its drain is connected to the Y electrode Yi.
- the source power is connected to the source of the channel transistor 421.
- Coil 411 is connected between the drain of transistor 421 and the power sword of diode 415.
- the n-channel transistor CU has a parasitic diode, the drain is connected to the positive potential Vs, and the source is connected to the drain of the transistor 421.
- the diode 409 has a force sword connected to the source of the transistor CU and an anode connected to the ground.
- the diode 413 has an anode connected to the force sword of the diode 415, and the force sword connected to the positive potential Vs.
- the diode 414 has an anode connected to the ground and a force sword connected to the force sword of the diode 415.
- the p-channel transistor LU has a parasitic diode, the source is connected to the capacitor 419, and the drain is connected to the anode of the diode 415.
- a capacitor 419 is connected between the source of transistor! ⁇ ), LU and ground.
- the p-channel transistor 405 has a parasitic diode, the source is connected to the potential Vsc, and the drain is connected to the anode of the diode 407.
- the force sword of diode 407 is connected to the drain of transistor 403.
- the n-channel transistor 406 includes a parasitic diode, the source is connected to the negative potential ⁇ Vy, and the drain is connected to the source of the transistor 404.
- FIG. 5A is a timing chart showing the sustain pulse of Y electrode Yi when the display load factor is large! /
- FIG. 5B is a timing chart showing the sustain pulse of Y electrode Yi when the display load factor is small. It is.
- the Y sustain circuit 104 in FIG. 1 generates the sustain pulse shown in FIG. 5A when the display load factor is larger than the first threshold value under the control of the sustain pulse control unit 112, and the display load factor is the first threshold value. If it is smaller than that, the sustain pulse shown in Fig. 5B is generated.
- the sustain pulse of FIGS. 5A and 5B is generated by the Y sustain circuit of FIG. 4 during the sustain period Ts of FIG.
- a method of generating a sustain pulse when the display load factor is large will be described with reference to FIG. 5A.
- the transistor LU is turned on.
- the voltage of the capacitor 419 is supplied to the Y electrode Yi through the transistors LU, 421, and 04 by LC resonance.
- the potential of Y electrode Yi rises toward positive potential Vs.
- the transistor CU is turned on.
- the positive potential Vs is the transistor CU, 421 and 404 are supplied to the Y electrode Yi.
- Y electrode Yi is clamped at positive potential Vs.
- the transistor LU is turned off and the transistor CU is turned off.
- the sustain pulse of the force X electrode Xi described above is a pulse having a phase opposite to that of the sustain pulse of the Y electrode Yi. That is, when the sustain pulse of the Y electrode Yi is ground, the sustain pulse of the X electrode Xi becomes a positive potential Vs, and when the sustain pulse of the X electrode Xi is ground, the sustain pulse of the Y electrode Yi becomes a positive potential Vs.
- the potential of the capacitive load 420 is controlled by the power recovery circuit and the clamp circuit as shown in FIG. 5A. Specifically, when the displayed load factor is larger than the first threshold value, the power of the capacitive load 420 is recovered from time t503 to t504, and the potential of the capacitive load 420 is set to a low level (ground) after time t504. The power recovered at time t501 to t502 is supplied to the capacitive load 420, and the potential of the capacitive load 420 is clamped to the noise level Vs after time 502. When the display load factor is large! / When the discharge current is large, the current flowing through the entire X and Y sustain circuits is large. Therefore, it is effective to reduce the power consumption by using the power recovery circuit.
- the transistor CU is turned on.
- the positive potential Vs is supplied to the Y electrode Yi via the transistors CU, 421, and 404.
- Y electrode Yi is clamped at positive potential Vs.
- the transistor CU is turned off.
- the transistor CD is turned on.
- the Y electrode Yi is connected to the ground via the transistors 403 and CD.
- Y electrode Yi is clamped to ground.
- transistor CD is turned off. Thereafter, the operation at the times t511 to t512 is repeated.
- the above description is based on the sustain pulse of the Y electrode Yi, and the sustain pulse of the force X electrode Xi described above is a pulse having a phase opposite to that of the sustain pulse of the Y electrode Yi.
- voltage Vs is applied between X electrode Xi and Y electrode Yi, and a sustain discharge for display occurs between X electrode Xi and Y electrode Yi.
- the potential of the capacitive load 420 is controlled by the clamp circuit without using the power recovery circuit as shown in FIG. 5B. Specifically, when the display load factor is smaller than the first threshold, the potential of the capacitive load 420 is clamped at the high level Vs and the low level (ground) without recovering the power of the capacitive load 420. Generate a pulse.
- the sustain pulse in FIG. 5A rises in two stages by the power recovery circuit and the clamp circuit. Therefore, the power supply to the Y electrode Yi is temporally dispersed during the sustain discharge. Therefore, if the display is always driven with the sustain pulse shown in FIG. 5A regardless of the display load factor, the peak luminance at the maximum gradation value when the display load factor is small is relatively low. On the other hand, the sustain pulse in Fig. 5B without power recovery rises sharply by the clamp circuit. For this reason, during sustain discharge, power supply to the Y electrode Yi is concentrated over time, and the peak luminance at the maximum gradation value when the display load factor is small becomes relatively high.
- the peak luminance at the maximum gradation value can be increased by generating the sustain pulse in FIG. 5B, and the difference between the dark portion and the bright portion is relatively high.
- the contrast is improved and the headlights etc. in dark images can be emphasized.
- the sustain pulse in FIG. 5A is used to recover power from the capacitive load 420.
- the time t503 to t504 and the time t50 l to t502 for supplying the recovered power to the capacitive load 420 are required. Therefore, the sustain pulse widths t501 to t504 are widened, and it is difficult to increase the number of sustain pulses.
- the sustain pulse of FIG. 5B does not use the power recovery circuit, the sustain pulse width t511 to t512 can be narrowed to increase the number of sustain pulses.
- the peak luminance can be increased by increasing the sustain pulse frequency and increasing the number of sustain pulses compared to when the display load factor is larger than the first threshold value.
- a one-frame image of a sustain pulse for display supplied to the capacitive load 420 compared to when the display load factor is larger than the first threshold value increase the average frequency per shot and increase the number of sustain pulses per frame image.
- the power that is effective in improving the peak luminance and the contrast when the display load factor is small.
- the average frequency and Z or the number of pulses of the sustain pulse If a drastic change is made depending on the display load factor, a difference in brightness occurs in units of frames at the time of the change, which makes the viewer feel uncomfortable and adversely affects the image display quality. Therefore, when changing the average frequency of the sustain pulses for display, it is preferable to gradually change the average frequency and the number of pulses during the passage of a plurality of frames. For example, it is preferable to gradually change the average frequency and number of pulses within 60 frames.
- the present embodiment if the display load factor is small, the magnitude of the discharge current flowing through the entire plasma display panel is not so large. In this case, the power recovery circuit is not used and the power Direct drive of By doing this, a relatively steep pulse waveform can be obtained with a gradual voltage increase due to LC resonance, and the pulse width can be narrowed. By narrowing the pulse width, the total number of pulses that can be put in a certain time (for example, within one frame) can be increased, and the flowing current value can be suppressed to a level that does not require the use of a special protection circuit. In addition, since the total power consumption is relatively small, no special heat dissipation measures are required. On the other hand, when the display load factor is large, a large discharge current flows throughout the plasma display panel, so the total power consumption can be reduced using a power recovery circuit. Plan.
- FIGS. 6A and 6B are generated instead of the sustain pulse of FIGS. 5A and 5B in the first embodiment.
- FIG. 6A is a timing chart showing the sustain pulse of the Y electrode Yi when the display load factor is large! /
- FIG. 6B is a timing chart showing the sustain pulse of the Y electrode Yi when the display load factor is small. It is.
- the Y sustain circuit 104 in FIG. 1 generates the sustain pulse shown in FIG. 6A when the display load factor is larger than the first threshold under the control of the sustain pulse control unit 112, and the display load factor is the first threshold. If it is smaller than that, the sustain pulse shown in Fig. 6B is generated.
- the sustain pulse in FIGS. 6A and 6B is generated by the Y sustain circuit in FIG. 4 during the sustain period Ts in FIG.
- FIG. 6A is a sustain pulse when the display load factor is large, and is the same pulse as the sustain pulse of FIG. 5A. Therefore, the sustain pulse of FIG. 6A can be generated by the same method as the sustain pulse generation method of FIG. 5A described above.
- FIG. 6B shows a sustain pulse when the display load factor power S is small.
- the sustain pulse in FIG. 6B is generated by the power recovery circuit and the clamp circuit, similarly to the sustain pulse in FIG. 6A.
- Times t601 to t604 in FIG. 6B correspond to times t501 to t504 in FIG. 6A, respectively.
- the sustain pulse in FIG. 6B is basically the same as the sustain pulse in FIG. 6A. Timing t602 at which the potential of the capacitive load 420 is clamped to the high level Vs and timing to clamp at the low level (ground) t604 Is different. Specifically, the sustain pulse in FIG. 6B when the display load factor is smaller than the first threshold is capacitive load compared to the sustain pulse in FIG. 6A when the display load factor is larger than the first threshold. The timing t602 for clamping the potential of 420 to the high level and the timing t604 for bringing the potential to the low level are advanced.
- the time from time t601 to t602 in FIG. 6B is shorter than the time from time t501 to t502 in FIG. 6A.
- the time from time t603 to t604 in FIG. 6B is from time t503 to t504 in FIG. 6A. It is shorter than f3 ⁇ 4! From t601 force to t602 and t603 force to t604 If the interval is set to 0, the same pulse as the sustain pulse in FIG. 5B is obtained.
- the sustain pulse in Fig. 6B is the same as the sustain pulse in Fig. 6A for maintaining the high level Vs and maintaining the low level (ground).
- the sustain pulse in FIG. 6B can reduce the pulse width compared to the sustain pulse in Fig. 6A. Therefore, it is possible to increase the average frequency per frame image and increase the number of pulses per frame image. it can. Thereby, when the display load factor is small, the peak luminance can be further increased.
- the sustain pulse in FIG. 6B rises more rapidly than the sustain pulse in FIG. 6A, so that the power supply to the Y electrode Yi is concentrated in time during the sustain discharge, and the peak luminance increases.
- the clamp timing when the display load factor is smaller than the first threshold is always constant over the entire region where the display load factor is smaller than the first threshold.
- the display load factor may be gradually increased according to the decrease in the display load factor within a range where the display load factor does not exceed the first threshold.
- the force described in the example in which the timing t602 at which the potential of the capacitive load 420 is clamped to the high level Vs and the timing t604 at which the potential is clamped to the low level is advanced is clamped to the low level. It is not always necessary to make the timing t604 early, but only the timing t602 for clamping to a high level may be made earlier.
- FIG. 7 is a graph showing the relationship between the display load factor and the total number of sustain pulses according to the third embodiment of the present invention.
- the horizontal axis shows the display load factor, and the vertical axis shows the per frame image. Shows the total number of sustain pulses.
- the total number of sustain pulses N1 is the total number of sustain pulses per frame image of the sustain pulse in FIG. 5A or FIG. 6A when the display load factor is large.
- the total number of sustain pulses N2 is the total number of sustain pulses per frame image of the sustain pulse in FIG. 5B or FIG. 6B when the display load factor is small, and is larger than the total number of sustain pulses N1.
- the sustain pulse in FIG. 5A or 6A is generated with the total number of sustain pulses N1, and the display load factor is smaller than the threshold value D2.
- the sustain pulses shown in Fig. 5B or Fig. 6B are generated with the total number of sustain pulses N2.
- the sustain pulse in FIG. 5A or 6A is generated with the total number of sustain pulses N1, and the display load factor is smaller than the threshold value D1.
- the sustain pulses shown in Fig. 5B or Fig. 6B are generated with the total number of sustain pulses N2.
- the threshold value D1 is smaller than the threshold value D2.
- the average frequency and the total number of sustain pulses gradually increase over the course of a plurality of frames. To change.
- threshold values D1 and D2 are set to the same value, if the display load factor frequently repeats slight up and down changes in the vicinity of the threshold value, there is an adverse effect that the total number of sustain pulses also changes frequently. An evil phenomenon such as so-called chattering will occur. Such an adverse effect can be prevented by making the threshold values D1 and D2 different as in the present embodiment.
- FIG. 8 is a graph showing the relationship between the display load factor, the total power consumption, and the total number of sustains according to the fourth embodiment of the present invention.
- the horizontal axis represents the display load factor
- the vertical axis represents the total power consumption or the total number of sustain per frame image.
- the total number of sustain pulses of the capacitive load 420 in one frame image is set. Limit to gradually decrease. As a result, as shown by the solid line in FIG. 8, the total number of sustain pulses decreases even if the number of display cells to be lit increases (that is, even if the display load factor increases), so the total power consumption can be kept at a constant value.
- APC automatic power control
- the first threshold values Dl and D2 are preferably 20% or less, more preferably 5% or less.
- the sustain pulse of FIG. 5A or FIG. 6A is generated when the display load factor is larger than the first threshold value.
- the sustain pulse of FIG. 5B or FIG. 6B is generated, so that the sustain pulse width for display can be narrowed.
- the control circuit unit 101 including the display load factor detection unit 111 and the sustain pulse control unit 112 in Fig. 1 may be configured by hardware.
- the computer program may be executed by a microcomputer or the like.
- the plasma display has been described as an example.
- the present invention is not limited to this and can be applied to a display device having a capacitive load.
- it can be applied to an organic EL (Electro Luminescence) display.
- the voltage value of sustain nors is the force described with Vs and ground as an example.
- a pulse form reciprocating between a positive potential and a negative potential for example, a form described in JP-A-2002-62844.
- the present invention can be applied.
- the potential of the capacitive load is controlled by the clamp circuit without using the power recovery circuit, so that the pulse width for display can be reduced. Thereby, the number of pulses for display can be increased and the luminance can be increased.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of Gas Discharge Display Tubes (AREA)
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/791,792 US20080042600A1 (en) | 2004-11-29 | 2005-11-29 | Display Apparatus and Method for Driving the Same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004344631A JP4287809B2 (ja) | 2004-11-29 | 2004-11-29 | 表示装置及びその駆動方法 |
JP2004-344631 | 2004-11-29 |
Publications (1)
Publication Number | Publication Date |
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WO2006057410A1 true WO2006057410A1 (ja) | 2006-06-01 |
Family
ID=36498143
Family Applications (1)
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PCT/JP2005/021904 WO2006057410A1 (ja) | 2004-11-29 | 2005-11-29 | 表示装置及びその駆動方法 |
Country Status (5)
Country | Link |
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US (1) | US20080042600A1 (ja) |
JP (1) | JP4287809B2 (ja) |
KR (1) | KR100866062B1 (ja) |
CN (1) | CN100492465C (ja) |
WO (1) | WO2006057410A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JP4857620B2 (ja) * | 2005-06-28 | 2012-01-18 | パナソニック株式会社 | プラズマディスプレイ装置 |
JP5130854B2 (ja) * | 2007-10-01 | 2013-01-30 | パナソニック株式会社 | プラズマディスプレイ装置およびプラズマディスプレイパネルの駆動方法 |
JP2009109629A (ja) * | 2007-10-29 | 2009-05-21 | Hitachi Ltd | プラズマディスプレイパネル装置 |
KR100903620B1 (ko) * | 2007-11-14 | 2009-06-18 | 삼성에스디아이 주식회사 | 플라즈마 표시 장치 및 그 구동 방법 |
WO2009069194A1 (ja) * | 2007-11-27 | 2009-06-04 | Hitachi, Ltd. | プラズマディスプレイ装置 |
WO2009069195A1 (ja) * | 2007-11-27 | 2009-06-04 | Hitachi, Ltd. | プラズマディスプレイ装置 |
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-
2005
- 2005-11-29 WO PCT/JP2005/021904 patent/WO2006057410A1/ja not_active Application Discontinuation
- 2005-11-29 US US11/791,792 patent/US20080042600A1/en not_active Abandoned
- 2005-11-29 CN CNB2005800409737A patent/CN100492465C/zh not_active Expired - Fee Related
- 2005-11-29 KR KR1020077010478A patent/KR100866062B1/ko not_active IP Right Cessation
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Also Published As
Publication number | Publication date |
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KR100866062B1 (ko) | 2008-10-31 |
JP4287809B2 (ja) | 2009-07-01 |
CN100492465C (zh) | 2009-05-27 |
US20080042600A1 (en) | 2008-02-21 |
JP2006154287A (ja) | 2006-06-15 |
KR20070084085A (ko) | 2007-08-24 |
CN101069224A (zh) | 2007-11-07 |
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