TWI528522B - 具有中央接觸及改良式接地或功率分佈之增強型堆疊式微電子總成以及系統 - Google Patents

具有中央接觸及改良式接地或功率分佈之增強型堆疊式微電子總成以及系統 Download PDF

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TWI528522B
TWI528522B TW100138380A TW100138380A TWI528522B TW I528522 B TWI528522 B TW I528522B TW 100138380 A TW100138380 A TW 100138380A TW 100138380 A TW100138380 A TW 100138380A TW I528522 B TWI528522 B TW I528522B
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microelectronic
component
assembly
conductive
dielectric
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TW100138380A
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TW201234556A (en
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貝爾格斯姆 哈巴
瓦爾 榮尼
理查 狄威特 柯斯伯
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泰斯拉公司
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
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    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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Description

具有中央接觸及改良式接地或功率分佈之增強型堆疊式微電子總成以及系統
本發明係關於堆疊式微電子總成及製造此等總成之方法，且係關於在此等總成中有用之組件。
本申請案主張2011年9月30日發佈之韓國專利案第10-1061531號之優先權，該案之揭示內容以引用方式併入本文中。
通常提供半導體晶片作為個別、預先封裝單元。一標準晶片具有一平坦、長方形本體，該平坦、長方形本體具有一大前表面，該大前表面具有連接至該晶片之內部電路之接觸件。各個別晶片通常安裝在一封裝中，該封裝繼而安裝在一電路面板(諸如一印刷電路板)上且將該晶片之接觸件連接至該電路面板之導體。在許多習知設計中，該晶片封裝佔有遠大於該晶片自身之面積之該電路面板之一面積。如在本揭示內容中參考具有一前表面之一平坦晶片所使用，「晶片面積」應理解為係指該前表面之面積。在「覆晶」設計中，晶片之前表面面對一封裝基板(即，晶片載體)之表面，且該晶片上之接觸件係藉由焊球或其他連接元件而直接接合至該晶片載體之接觸件。繼而，該晶片載體可透過上覆於該晶片之前表面之端子而接合至一電路面板。「覆晶」設計提供一相對緊湊配置；各晶片佔有等於或稍微大於晶片之前表面之面積之電路面板之一面積，諸如(例如)在共同讓與的美國專利案第5,148,265號、第5,148,266號及第5,679,977號之特定實施例中所揭示，該等案之揭示內容以引用方式併入本文中。
特定發明安裝技術提供接近或等於習知覆晶接合之緊湊性。可在等於或稍微大於一單一晶片之面積之電路面板之一面積中容納該晶片自身之封裝通常稱為「晶片大小的封裝」。
除期望最小化由微電子總成所佔有的電路面板之平面面積之外，亦期望產生存在垂直於該電路面板之平面之一低的總高度或尺寸之一晶片封裝。此等薄微電子封裝允許放置一電路板(該電路板具有安裝於其中之封裝)使之緊鄰於鄰近結構，因此，產生併入電路面板之產品之總大小。已提出各種提議以在一單一封裝或模組中提供複數個晶片。在習知「多晶片模組」中，晶片並排地安裝在一單一封裝基板上，該單一封裝基板繼而可安裝至該電路面板。此做法僅提供晶片所佔有的電路面板之總面積之有限減小。該總面積仍大於模組中之個別晶片之總表面積。
亦已提議在一「堆疊」配置(即，重疊放置複數個晶片之一配置)中封裝複數個晶片。在一堆疊式配置中，若干晶片可安裝在小於晶片之總面積之電路面板之一面積中。例如，在前文提及之美國專利案第5,679,977號、第5,148,265號及美國專利案第5,347,159號之特定實施例中揭示特定堆疊式晶片配置，該等案之揭示內容以引用方式併入本文中。亦以引用方式併入本文中之美國專利案第4,941,033號揭示其中晶片係重疊堆疊且藉由與該等晶片相關聯的所謂的「導線膜」上之導體而彼此互連之一配置。
儘管此項技術中之此等努力，但是在具有實質上位於晶片之中央區域中之接觸件之晶片的多晶片封裝之情況下亦將期望進一步改良。特定半導體晶片(諸如一些記憶體晶片)通常經製造具有實質上沿著晶片之一中央軸定位成一或兩列之接觸件。
本揭示內容係關於微電子總成。在一實施例中，該微電子總成包含：一介電元件，其具有至少一孔隙及其上之導電元件，該等導電元件包含暴露於該介電元件之第二表面處之端子；一第一微電子元件，其具有一後表面及面對該介電元件之一前表面，該第一微電子元件具有暴露於其之該前表面處之複數個接觸件；一第二微電子元件，其具有一後表面及面對該第一微電子元件之該後表面之一前表面，該第二微電子元件具有暴露於該前表面處之複數個接觸件且凸出超出該第一微電子元件之一邊緣；及一導電平面，其附接至該介電元件且至少部分定位於該第一孔隙與該第二孔隙之間，該導電平面與該第一微電子元件或該第二微電子元件之至少一者之該等接觸件之一或多者電連接。該整個導電平面可定位於該第一孔隙與該第二孔隙之間。該導電平面可係一電源平面或一接地平面。導電電位平面之部分可延伸至超出該第一孔隙及該第二孔隙之外邊緣之位置。該導電平面可包含彼此隔開的至少兩個平面部分。該兩個平面部分可包含：一電源平面部分，其電連接至該第一微電子元件或該第二微電子元件之至少一者之至少一些電源接觸件；及一接地平面部分，其電連接至該第一微電子元件或該第二微電子元件之一或多者之接觸件。該導電平面可電耦合至該第一微電子元件之一或多個接觸件。該導電平面可電耦合至該第二微電子元件之一或多個接觸件。
在另一實施例中，該微電子總成包含：一介電元件，其具有面朝相反方向的第一表面與第二表面及延伸在該等表面之間的第一孔隙與第二孔隙，該介電元件在其上進一步具有複數個導電元件；一第一微電子元件，其具有一後表面及面對該介電元件之一前表面，該第一微電子元件具有暴露於其之該前表面處之複數個接觸件；一第二微電子元件，其具有一後表面及面對該第一微電子元件之該後表面之一前表面，該第二微電子元件具有暴露於該前表面處之複數個接觸件且凸出超出該第一微電子元件之一邊緣；及諸信號引線，其等連接至該等微電子元件之一或多者且延伸通過該第一孔隙或該第二孔隙之該一或多者至該介電元件上之該等導電元件之一些；及一或多個跨接引線，該一或多個跨接引線延伸通過該第一孔隙且連接至該第一微電子元件之一接觸件，該一或多個跨接引線跨越該第二孔隙且連接至該介電元件上之一導電元件。
在又一實施例中，微電子總成包含：一介電元件，其具有面朝相反方向的第一表面與第二表面及延伸在該等表面之間的第一孔隙與第二孔隙，該介電元件在其上進一步具有複數個導電元件；一第一微電子元件，其具有一後表面及面對該介電元件之一前表面，該第一微電子元件具有暴露於其之該前表面處之複數個接觸件；一第二微電子元件，其具有一後表面及面對該第一微電子元件之該後表面之一前表面，該第二微電子元件具有暴露於該前表面處之複數個接觸件且凸出超出該第一微電子元件之一邊緣；及諸信號引線，其等連接至該等微電子元件之一或多者且延伸通過該第一孔隙或該第二孔隙之一或多者至該介電元件上之該等導電元件之一些；及一或多個跨接引線，該一或多個跨接引線跨越該第一孔隙或該第二孔隙之至少一者且連接至該介電元件上之一導電元件。該微電子總成可進一步包含一囊封劑，該囊封劑安置於該第一孔隙中且覆蓋該等信號引線及該一或多個跨接引線。該等跨接引線可包含一延伸跨接引線，該延伸跨接引線自該第一孔隙之一側上之一導電元件延伸，跨過該第一孔隙，跨過該第一孔隙與該第二孔隙之間的該第二表面之一部分，且通過該第二孔隙至該等微電子元件之一者。該第一孔隙及該第二孔隙可具有長形形狀且實質上平行於彼此而延伸。該介電元件上之該等導電元件包含可暴露於該介電元件之該第二表面處之端子。
在一進一步實施例中，微電子總成包含：一介電元件，其具有面朝相反方向的第一表面與第二表面及延伸在該等表面之間的一或多個孔隙，該介電元件在其上進一步具有導電元件；一第一微電子元件，其具有一後表面及面對該介電元件之該第一表面之一前表面，該第一微電子元件具有一第一邊緣及暴露於其之該前表面處之複數個接觸件；一第二微電子元件，其具有一後表面及面對該第一微電子元件之該後表面之一前表面，該第二微電子元件之該前表面之一凸出部分延伸超出該第一微電子元件之該第一邊緣，該凸出部分與該介電元件之該第一表面隔開，該第二微電子元件具有暴露於該前表面之該凸出部分處之複數個接觸件；諸引線，其等自該等微電子元件之接觸件延伸通過該至少一孔隙至該等導電元件之至少一些；及一第一被動組件，其安置於該第二微電子元件之該前表面之該凸出部分與該介電元件之該第一表面之間。該微電子總成可進一步包含一第二被動組件，該第二被動組件暴露於該介電總成之該第二表面上且在兩個孔隙之間。該微電子總成可進一步包含一引線，該引線自一第一被動組件延伸至該等微電子元件之一者之一接觸件。該介電元件可包含暴露於該第二表面上之複數個端子，各端子電耦合至一電路板。焊球可將各端子連接至該電路板。銅柱可將各端子連接至該電路板。各端子可連接至該第一微電子元件。各端子可連接至該第一微電子元件及該第二微電子元件。
參考圖1，根據本發明之一實施例之一堆疊式微電子總成10包含一第一微電子元件12及一第二微電子元件14。在一些實施例中，該第一微電子元件12及該第二微電子元件14可係一半導體晶片、一晶圓或類似物。
第一微電子元件12具有：一前表面16；一後表面18，其遠離該前表面16；以及第一邊緣27及第二邊緣29，其等延伸在該前表面與該後表面之間。該第一微電子元件12之該前表面16包含：第一端部區域15及第二端部區域17；以及一中央區域13，其位於該第一端部區域15與該第二端部區域17之間。該第一端部區域15延伸在該中央區域13與該第一邊緣27之間，且該第二端部區域17延伸在該中央區域13與該第二邊緣29之間。電接觸件20暴露於該第一微電子元件12之該前表面16處。如在本揭示內容中所使用，一導電元件「暴露於」一結構之一表面處之一敘述指示該導電元件可用於與在垂直於該表面之一方向上自該結構外部朝向該表面移動之一理論點接觸。因此，暴露於一結構之一表面處之一端子或其他導電元件可自此表面凸出；可與此表面齊平；或可相對於此表面而凹陷且透過該結構中之一孔或凹坑而暴露。該第一微電子元件12之該等接觸件20暴露於該中央區域13內之該前表面16處。例如，可以一或兩個平行列將接觸件20配置成相鄰於第一表面16之中央。
第二微電子元件14具有：一前表面22；與該前表面22遠離之一後表面24；以及第一邊緣35及第二邊緣37，其等延伸在該前表面與該後表面之間。該第二微電子元件14之該前表面22包含：第一端部區域21及第二端部區域23；以及一中央區域19，其位於該第一端部區域21與該第二端部區域23之間。該第一端部區域21延伸在該中央區域19與該第一邊緣35之間，且該第二端部區域23延伸在該中央區域19與該第二邊緣37之間。電接觸件26暴露於該第二微電子元件14之該前表面22處。該第二微電子元件14之該等接觸件26暴露於該中央區域19內的該前表面22處。例如，可以一或兩個平行列將接觸件26配置為相鄰於第一表面22之中央。
如在圖1中所見，第一微電子元件12與第二微電子元件14相對於彼此堆疊。在一些實施例中，該第二微電子元件14之前表面22與該第一微電子元件12之後表面18面對彼此。該第二微電子元件14之第二端部區域23之至少一部分上覆於該第一微電子元件12之第二端部區域17之至少一部分。該第二微電子元件14之中央區域19之至少一部分凸出超出該第一微電子元件12之第二邊緣29。據此，該第二微電子元件14之接觸件26定位於超出該第一微電子元件12之第二邊緣29之一位置中。
微電子總成10進一步包含一介電元件30，該介電元件30具有面朝相反方向的第一表面32與第二表面34。雖然圖1僅展示一介電元件30，但是該微電子總成10可包含一個以上介電元件。一或多個導電元件或端子36暴露於該介電元件30之該第一表面32處。至少一些端子36可相對於該第一微電子元件12及/或該第二微電子元件14而移動。
介電元件30可進一步包含一或多個孔隙。在圖1中所描繪的實施例中，該介電元件30包含：一第一孔隙33，其實質上與第一微電子元件12之中央區域13對準；及一第二孔隙39，其實質上與第二微電子元件14之中央區域19對準，藉此提供對接觸件20及26之接達。
如在圖1中所見，介電元件30可延伸超出第一微電子元件12之第一邊緣27及第二微電子元件14之第一邊緣35。該介電元件30之第二表面34可與該第一微電子元件12之前表面16並置。該介電元件30可部分或全部由任何適合介電材料製成。例如，該介電元件30可包括一層撓性材料，諸如一層聚醯亞胺、BT樹脂或通常用於製造捲帶自動接合(「TAB」)捲帶之其他介電材料。替代地，該介電元件30可包括一相對剛性、板樣材料，諸如一厚的纖維強化環氧樹脂層，諸如Fr-4或Fr-5板。不管所採用的材料，該介電元件30可包含一單一層或多層介電材料。
介電元件30亦可包含暴露於第一表面32上之導電元件40及導電跡線42。該等導電跡線42將該等導電元件40電耦合至端子36。
一間隔層31(諸如一黏合層)可定位於第二微電子元件14之第一端部區域21與介電元件30之一部分之間。若間隔層31包含一黏合劑，則該黏合劑可將該第二微電子元件14附接至該介電材料30。另一間隔層60可定位於該第二微電子元件14之第二端部區域23與第一微電子元件12之第二端部區域17之間。此間隔層60可包含一黏合劑，該黏合劑用於將該第一微電子元件12及該第二微電子元件14黏合在一起。在此情況下，該間隔層60可部分或全部由一晶粒附接黏合劑製成且可由一低彈性模量材料(諸如聚矽氧彈性體)組成。然而，若該兩個微電子元件12及14係由相同材料形成的習知半導體晶片，則該間隔層60可全部或部分由一層薄的高彈性模量黏合劑或焊料製成，此係因為該等微電子元件將趨於回應於溫度變更而一致地膨脹及收縮。不顧所採用的材料，間隔層31及60之各者可包含一單一層或多層。
如在圖1及圖2中所見，電連接件或引線70將第一微電子元件12之接觸件20電連接至一些導電元件40。電連接件70可包含多導線接合件72、74。導線接合件72、74延伸通過第一孔隙33且經定向而實質上彼此平行。該等導線接合件72及74之各者將一接觸件20電耦合至介電元件之一對應元件40。根據此實施例之一多導線接合結構可藉由為電流在所連接接觸件之間流動提供一額外路徑而實質上減小一導線接合連接之電感。
其他電連接件或引線50將第二微電子元件14之接觸件26電耦合至一些元件40。電連接件50可包含多導線接合件52、54。導線接合件52、54延伸通過第二孔隙39且經定向而實質上彼此平行。導線接合件52及54之各者將一接觸件26電耦合至介電元件30之一對應元件40。根據此實施例之一多接合導線結構可藉由為電流在所連接接觸件之間流動提供一額外路徑而實質上減小一導線接合連接之電感。
如在圖2A中所見，在電連接件50中，第一接合導線52可具有：一端部52A，其與晶片接觸件26冶金地連結；另一端部(未展示)，其與導電元件40冶金地連結。例如，接合導線可包含一金屬(諸如金)，可使用超音波能量、熱量或兩者將該金屬焊接至一接觸件以形成一冶金接頭或與該接觸件接合。相比之下，第二接合導線54可具有：一端部54A，其冶金地接合至該第一接合導線52之該端部52A；及一相對端部(未展示)，其冶金地接合至該第一接合導線52之一端部。
第二接合導線54無需觸及第一接合導線52所冶金地接合之導電元件40。替代地，在一特定實施例中，該第二接合導線54之端部54A可依第二接合導線不觸及該第二接合導線之至少一端部處之接觸件且可不觸及任一端部處之接觸件之方式而冶金地接合至該第一接合導線52之端部52A。
各接合導線52、54之端部52A、54A可包含在導線接合製程期間所形成的一球。一導線接合工具通常藉由使一金導線之尖端自一捲軸前進至該工具之一尖端而操作。在處理之一實例中，當該工具係在用於在一第一接觸件(例如，晶片接觸件20)處形成一第一導線接合件之位置中時，該工具可接著將超音波能量、熱量或兩者施加於導線直至該導線之尖端熔化且形成一球為止。該經加熱球接著與接觸件之一表面冶金地接合。接著，當該導線接合工具之尖端自第一接觸件移開時，該球保持接合至該接觸件，同時放出此接觸件與一第二接觸件之間的該接合導線之一長度。該導線接合工具可接著將該導線之一第二端部附接至一第二接觸件，從而與該第二接觸件於該端部處形成一冶金接頭。
接著可依一稍微不同方式重複上文製程以形成第二接合導線。在此情況下，導線接合工具可移入一位置中，且可接著用以加熱導線之尖端以形成一球，該球接著將第二接合導線之一端部54A連結至第一接合導線之端部52A。該導線接合工具可接著將該接合導線之另一端部附接至該第一接合導線之一第二端部，從而與至少該第一接合導線於該端部處形成一冶金接頭。
一些導電元件52、54可載送信號，即，隨時間改變且通常傳達資訊之電壓或電流。例如(不限於)，隨時間改變且表示狀態、變更、一量測、一時脈或時序輸入或者一控制或回饋輸入之電壓或電流係信號之實例。其他導電元件52、54可提供至接地或一電源供應電壓之連接。至接地或一電源供應電壓之一連接通常提供一電壓，該電壓係隨時間在操作電路所關注的頻率範圍內至少相當穩定。當各自接觸件對之間的雙導線接合連接件或多導線接合連接件係至接地或一電壓供應電壓時，該等連接件可尤其有利。在一實例中，雙導線連接件72、74及52、54可將各自微電子元件12、14連接至介電元件30上之接地端子。相似地，雙導線接合連接件72A、74A及52A、54A可將各自微電子元件連接至該介電元件上之電源供應端子(以透過一電路面板(未展示)而進一步互連至一電源供應器)。增加至接地端子或電源端子之此等連接中之導線接合之數目可減小接地電路及電源電路中之電感，此可幫助減小系統中之雜訊。
根據此實施例之一多接合導線結構及方法之另一可能益處係在限制用於將一接合導線附接至一接觸件(諸如一晶片或一基板上之一接合墊)之面積時減小電感。一些晶片具有尤其高接觸件密度及精細間距。此等晶片上之該等接合墊具有非常有限面積。一第二接合導線具有附接至一第一接合導線(但是其自身不接觸接觸件)之一端部之一結構可在無需增大接合墊之大小之情況下達成一雙接合導線結構或多接合導線結構。因此，甚至當形成至依一精細間距配置的接觸件或具有小面積之接觸件之導線接合連接時可達成如關於圖2A所描述的一多接合導線結構。
此外，具有高密度之一些微電子元件亦具有高輸入及輸出速率，即，將信號傳輸至晶片上或自晶片將信號傳輸走之頻率。在足夠高頻率下，可實質上增大一連接之電感。根據此實施例之一多接合導線結構可藉由為電流在所連接接觸件之間流動提供一額外路徑而實質上減小用於接地、電源或信號傳輸之一導線接合連接件之電感。
圖2B圖解說明一第一接合導線51之端部與一第二接合導線53之端部之間的連接。如在圖2B中所見，在接合導線之第一端部處，球51A及53A可冶金地連結在一起，但是依使得該第二導線53之球不觸及接觸件20之方式連結。在接合導線之在第二接觸件40上之第二端部51B、53B處，可在導線之間產生電連接而在第二端部51B、53B處不形成球。在此情況下，該等接觸件20、40之一者可係暴露於晶片之一表面處之一晶片接觸件，且該等接觸件20、40之另一者可係暴露於基板之一表面處之一基板接觸件。如在圖2B中進一步所見，第二導線接合件之該第二端部53B係連結至第一接合導線之51B處而第二接合導線不接觸該接觸件40。
圖2C圖解說明此實施例(圖2B)之一變動，其中第一接合導線55具有連結至一第一接觸件20之一球端部55A。第二接合導線57之一導線端部57B冶金地連結至該第一接觸件20上之第一接合導線之該球端部55A。此外，該第二接合導線57之一球端部57A冶金地連結至第二接觸件40處之第一接合導線55之一導線端部55B。若需要，可使用依此方式冶金地連結至其他接合導線之甚至更大數目個接合導線，以為電流在一對接觸件之間流動提供平行電路徑。
圖2D圖解說明使用一接合帶41來替代一接合導線之一電連接，其中該接合帶41具有冶金地連結至接觸件之一者(例如，接觸件20)之一第一端部43。該接合帶41具有冶金地連結至另一接觸件40之一中間部分45，且具有連結至該接合帶之該第一端部43之一第二端部47。該接合帶之該第一端部43與該第二端部47之間的接頭可使得該第二端部47不觸及該第一端部所連結的該接觸件20。替代地，在一變動(未展示)中，該第二端部47可觸及該第一端部43所連結的該相同接觸件20或直接與該接觸件20連結。該等接觸件之一者(例如，接觸件20、40之一者)可係一基板接觸件，且該等接觸件20、40之一者係一晶片接觸件。替代地，該等接觸件20、40之兩者可係暴露於一基板之一表面處之基板接觸件，或兩個接觸件20、40可係暴露於一晶片之一表面處之晶片接觸件。
如在圖1中進一步所展示，微電子總成10亦可包含一第一囊封劑80及一第二囊封劑82。該第一囊封劑80覆蓋電連接件70及介電元件30之第一孔隙33。該第二囊封劑82覆蓋電連接件50及該介電元件30之第二孔隙39。
微電子總成10可進一步包含複數個連結單元，諸如焊球81。焊球81附接至端子36，且因此電互連至元件40、引線50及70以及接觸件20及26之至少一些。
如在圖3中所見，複數個被動電路元件(即，「被動體」590A)可安置或附接至第一孔隙533與第二孔隙539之間的介電元件530之第一表面532。該等被動體590A可係電容器、電阻器、電感器或類似物。一或多個被動體可與介電元件上之一或多個電連接元件或與一或兩個微電子元件之一或多個接觸件520、526電互連。一或多個被動體可與一微電子元件接觸件520或526及與該介電元件之一接觸件540電互連。替代地或此外，複數個被動體590B可安置於介電元件530之一第二表面534與第二微電子元件514之前表面522之間。此等被動體590B可電互連至微電子元件512、514之任何一者或所有或者電互連至介電元件530(如同在被動體590A之情況下)。在一特定實施例中，該等被動體590A或590B之至少一些係解耦合電容器，在一實例中，其可連接至該等微電子元件512或514、該介電元件530或者兩者之「電源」接觸件，來自一電源供應器之電力係透過「電源」接觸件而輸入至一微電子元件。
圖4至圖6描繪在圖1中所展示的實施例之一變動。在此變動中，介電元件630包含複數個孔隙。雖然圖5展示具有四個孔隙之一介電元件630，但是該介電元件630可包含更多或更少孔隙。在圖5中所展示的特定實施例中，該介電元件630包含兩個孔隙633a及633b，該兩個孔隙633a及633b可實質上在堆疊式微電子總成600之一第一方向662上相對於彼此而對準。該等孔隙633a及633b可具有相似形狀及尺寸或可具有不同尺寸或形狀。例如，在圖13中所描繪的孔隙633a及633b各具有一實質上長方形橫截面及實質上相似尺寸。不管孔隙633a及633b之形狀，第一微電子元件612之接觸件620暴露於該等孔隙633a及633b內。
介電元件630可進一步具有孔隙639a及639b，且第二微電子元件614之接觸件626可暴露於該等孔隙內。孔隙639a及639b亦可實質上相對於彼此而對準。在圖5中所展示的實施例中，孔隙639a大於孔隙639b，且兩個孔隙具有一實質上長方形形狀。
堆疊式微電子總成600包含複數個跡線。在一特定實施例中，一導電跡線642a可沿著孔隙633a與633b之間的介電元件之一表面632在一方向上延伸。在一實施例中，該跡線642a可具有延伸至介電元件630之位置636之一長度，該等位置636係在該跡線之長度之一方向上超出一孔隙633a之邊緣664a、664b。如在圖5中所見，可由跡線642a互連導電結構(諸如該介電元件630之端子636)。另一跡線642b可定位於孔隙639a與639b之間且可具有延伸至超出該等孔隙639a及639b之邊緣668a、668b之位置之一長度。可由跡線642b互連其他導電結構(諸如該介電元件630之端子636)。
堆疊式微電子總成600包含經調適以傳輸一信號之複數個導電元件(例如，信號引線)，該複數個導電元件可係導線接合件或其他適合結構。在圖4中所描繪的實施例中，一信號引線652延伸通過孔隙633a且電耦合第一微電子元件612之一接觸件620與相鄰於孔隙633a的一基板接觸件640。另一信號引線654延伸通過孔隙633a且互連第一微電子元件612之一接觸件620與相鄰於孔隙633a的基板接觸件640。如在圖5中所見，另一信號引線656將該第一微電子元件之一接觸件620電連接至相鄰於孔隙639a的一接觸件626。信號引線656延伸跨過孔隙639a之寬度。
連接至第二微電子元件614之一接觸件626之一信號引線672延伸跨過孔隙633b之寬度且超出孔隙633b之一遠端邊緣而電耦合至一基板接觸件640。另一信號引線674延伸通過孔隙639b且互連第二微電子元件614之一接觸件626與相鄰於孔隙639b之介電元件之一中央部分中之一基板接觸件640。相似地，信號引線676延伸通過孔隙639b且電耦合該第二微電子元件614之一接觸件626與相鄰於孔隙639b之一基板接觸件640。
如在圖5及圖6中所見，堆疊式微電子總成600可進一步包含一信號引線678，該信號引線678延伸跨過孔隙639a之寬度且互連定位於孔隙639之相對側上之兩個基板接觸件640。另一信號引線679延伸跨過孔隙633a或633b之寬度且互連位於此孔隙633a或633b之相對側上之兩個基板接觸件640。一囊封劑可覆蓋所有信號引線以及孔隙633a、633b、639a及639b。
圖7及圖8展示在圖1中所描繪的實施例之一變動。在此變動中，堆疊式微電子總成700包含安置於介電元件730之第一表面732上之一導電接地及/或電源平面790(即，用於連接至一參考電位之一金屬平面)。該導電平面790可替代地安置於該介電元件730之第二表面734上。延伸通過孔隙733之一或多個導線接合件752可電連接第一微電子元件712之接觸件720與該接地及/或電源平面790。一囊封劑780可覆蓋孔隙733。相似地，延伸通過孔隙739之一或多個導線接合件762可電連接第二微電子元件714之接觸件726與該接地及/或電源平面790。一囊封劑782可覆蓋孔隙739。該接地及/或電源平面790可定位於該介電元件730之兩個孔隙733與739之間，且該平面790之至少部分可延伸通過囊封劑780及782。在一實施例中，該導電接地及/或電源平面790可係一單石結構，如在圖8中所見。
微電子總成700可進一步包含電耦合至導電平面790之一被動體792。特定言之，該被動體792可具有安裝至該導電平面790之一電極。該被動體792可係一或多個電容器、電阻器、電感器或類似物。例如，被動體792可係用於有效地維持一恆定輸出電壓之一或多個解耦合電容器。在一特定實施例中，該解耦合電容器可具有安裝至該導電平面790之一電極及遠離該導電平面之一暴露電極。該等解耦合電容器可儲存電能，且在一突然電壓下降之情況下，該解耦合電容器可提供能量給必需電流以維持一恆定輸入電壓。
微電子總成700此外或替代地可包含一被動體793，該被動體793具有連接至導電平面790之一電極及連接至基板上之一導電墊795之另一電極。一跡線797可自該墊795延伸且連接至一端子740。例如，端子740可用於在該導電平面用作為連接至一接地之一接地平面時連接至一電源。替代地，該墊795或該跡線797可連接至一通孔至遠離表面732(其上安置該導電平面)之該介電元件之一表面上之另一金屬層或導電特徵。
如在圖9中所展示，接地及/或電源平面790可係沿著介電材料830之一表面隔開的兩個或兩個以上離散平面部分。可暴露一電源平面部分或一接地平面部分之一或多者以用於互連第一微電子元件或第二微電子元件之一或多個接觸件與該介電材料上之一或多個接觸件，如上文在圖9中所展示。在圖9中所描繪的實施例中，該接地及/或電源平面790包含兩個離散部分790A及790B。該等部分790A及790B之一者可係一電源平面部分，且另一者係一接地平面部分。在另一實例中，兩個部分790A、790B可皆係電源平面部分，(例如)以用於與處於相同或不同電壓之一個以上電源供應輸入連接。在另一實例中，兩個平面部分790A及790B可係接地平面部分。
如在圖9中進一步所展示，雙導線接合件752A及752B可連接在第一微電子元件712或第二微電子元件714之一接觸件720與接地及/或電源平面790之間。可如關於圖2A至圖2D所討論般組態該等雙導線接合件。導線接合件752A及752B可連接在該接地及/或電源平面790之不同位置處。替代地，雙導線接合件751A及751B可連接在該接地及/或電源平面790之一單一位置處。
圖10及圖11展示在圖7及圖8中所描繪的實施例之一變動。在此變動中，堆疊式微電子總成800包含位於介電元件830中央之一導電接地及/或電源平面890(即，電位平面)。該接地及/或電源平面890特定地附接至該介電元件830之第一表面832。接地及/或電源平面890之一中央部分892定位於該介電元件830之孔隙833與839之間。該接地及/或電源平面890亦包含相鄰於該中央部分892之第一端部部分894及第二端部部分896。該接地及/或電源平面之該第一端部部分894及該第二端部部分896延伸超出該等孔隙833及839之邊界。據此，該接地及/或電源平面890可環繞該等孔隙833及839。一或多個導線接合件852可將該接地或電源平面890電連接至第一微電子元件812之一或多個接觸件820。相似地，一或多個導線接合件872可將該接地或電源平面890電連接至第二微電子元件814之一或多個接觸件826。如在圖11中所見，該接地或電源平面890可係一單石結構。
微電子總成800可包含一或多個被動體871及873。被動體871可係一電容器，其具有安裝至導電平面890之一電極及連接至一墊873之另一電極。可如上文關於圖7所描述般進一步電連接該墊。
被動器873可具有電連接至一第一墊883之一電極及電連接至一第二墊885之另一電極。一第一跡線889可導電地連接該第一墊883與導電平面890。一第二跡線891可將該第二墊885連接至介電元件上之一端子、待與微電子元件進一步連接(例如，透過一導線接合件(未展示))之一接觸件或兩者。
接地或電源平面可係沿著介電元件830之表面彼此隔開的離散平面部分，如在圖12中所圖解說明。在圖12中所展示的實施例中，該接地或電源平面890包含彼此隔開的兩個離散平面部分890A及890B，一平面部分係用於連接至一電源之一電源平面，且另一平面部分係用於連接至接地之一接地平面(例如，透過該等平面部分與待連接至總成之一電路面板(未展示)之間的電連接)。在此實施例中，一被動體895可係一電容器。在此情況下，該被動體895可具有安裝至平面部分890A(例如，電源)之一電極及安裝至平面部分890B(例如，接地)之另一電極，使得該等電容器電極電連接在該電源平面與該接地平面之間。
可在相異電子系統之結構中利用上文所描述的微電子總成，如在圖13中所展示。例如，根據本發明之一進一步實施例之一系統1100包含如下文結合其他電子組件1108及1110所描述的一微電子總成1106。在所描繪的實例中，組件1108係一半導體晶片，而組件1110係一顯示螢幕，但是可使用任何其他組件。當然，儘管為了使圖解說明清楚而在圖13中僅描繪兩個額外組件，但是該系統可包含任何數目個此等組件。該微電子總成1106可係上文所描述的任何總成。在一進一步變體中，可使用任何數目個此等微電子總成。微電子總成1106以及組件1108及1110可安裝在虛線中示意描繪的一共同外殼901中，且彼此電互連以必要時形成所期望電路。在所展示的例示性系統中，該系統包含一電路面板1102(諸如一撓性印刷電路板)，且該電路面板包含彼此互連組件之眾多導體1104，在圖13中僅描繪該眾多導體1104之一者。然而，此僅係例示性的；可使用用於產生電連接之任何適合結構。該外殼901係描繪為可在(例如)一蜂巢式電話或個人數位助理中使用的類型之一可攜式外殼，且螢幕1110暴露於該外殼之表面處。在結構1106包含一光敏元件(諸如一成像晶片)之情況下，一透鏡1111或其他光學裝置亦可經提供以用於將光投送至該結構。再者，在圖13中所展示的簡化系統僅係例示性的；可使用上文所討論的結構來產生其他系統，包含通常被視為固定結構之系統，諸如桌上型電腦、路由器及類似物。
如在圖14中所圖解說明，上文所描述的任何微電子總成可電耦合至一電路面板或電路板1200。例如，微電子總成10可包含複數個連結單元，諸如焊球81或銅柱。焊球81將微電子總成10電連接至電路面板1200。雖然圖14僅展示將微電子總成10電連接至電路面板1200之焊球81，但是預想任何導電元件可互連電路面板1200與微電子總成10。一或多個導電元件或端子1202暴露於該電路面板1200之第一表面1204處。該電路面板1200之第一表面1204面對該等焊球81。焊球81附接至端子1202且因此電互連至電路面板1200中之至少一些電路。
儘管已參考特定實施例描述本發明，但是應瞭解此等實施例僅闡釋本發明之原理及應用。因此，應瞭解可對闡釋性實施例做出眾多修改且在不背離如隨附申請專利範圍所定義的本發明之精神及範疇之情況下可想出其他配置。
將明白可依不同於起始請求項中所提出的方式組合本文所陳述的各種附屬請求項及特徵。亦將明白可與其他所述實施例共用結合個別實施例所描述的特徵。
10．．．堆疊式微電子總成
12．．．第一微電子元件
13．．．中央區域
14．．．第二微電子元件
15．．．第一端部區域
16．．．第一微電子元件12之前表面
17．．．第二端部區域
18．．．第一微電子元件12之後表面
19．．．中央區域
20．．．電接觸件/晶片接觸件/接觸件
21．．．第一端部區域
22．．．第二微電子元件14之前表面
23．．．第二端部區域
24．．．第二微電子元件14之後表面
26．．．電接觸件/晶片接觸件/接觸件
27．．．第一微電子元件12之第一邊緣
29．．．第一微電子元件12之第二邊緣
30．．．介電元件
31．．．間隔層
32．．．第一表面
33．．．第一孔隙
34．．．第二表面
35．．．第二微電子元件14之第一邊緣
36．．．導電元件/端部
37．．．第二微電子元件14之第二邊緣
39．．．第二孔隙
40．．．導電元件
41．．．接合帶
42．．．導電跡線
43．．．第一端部
45．．．中間部分
47．．．第二端部
50．．．電連接件或引線
51．．．第一接合導線
51A．．．球
51B．．．第二端部
52．．．多導線接合件/第一接合導線/雙導線連接/導電元件
52A．．．端部/雙導線接合連接
53．．．第二接合導線
53A．．．球
53B．．．第二端部
54．．．多導線接合件/第二接合導線/雙導線連接件/導電元件
54A．．．端部/雙導線接合連接件
55．．．第一接合導線
55A．．．球端部
55B．．．導線端部
57．．．第二接合導線
57A．．．球端部
57B．．．導線端部
60．．．間隔層
70．．．電連接件或引線
72．．．多導線接合件/雙導線連接件
72A．．．雙導線接合連接件
74．．．多導線接合件/雙導線連接件
74A．．．雙導線接合連接件
80．．．第一囊封劑
81．．．焊球
82．．．第二囊封劑
512．．．微電子元件
514．．．第二微電子元件
520．．．微電子元件接觸件
522．．．第二微電子元件514之前表面
526．．．微電子元件接觸件
530．．．介電元件
532．．．介電元件530之第一表面
533．．．第一孔隙
534．．．介電元件530之第二表面
539．．．第二孔隙
540．．．接觸件
590A．．．被動體
590B．．．被動體
600．．．堆疊式微電子總成
612．．．第一微電子元件
614．．．第二微電子元件
620．．．接觸件
626．．．接觸件
630．．．介電元件
632．．．介電元件之表面
633a．．．孔隙
633b．．．孔隙
636．．．位置/端子
639a．．．孔隙
639b．．．孔隙
640．．．基板接觸件
642a．．．導電跡線
642b．．．跡線
652．．．信號引線
654．．．信號引線
656．．．信號引線
662．．．第一方向
664a．．．邊緣
664b．．．邊緣
668a．．．邊緣
668b．．．邊緣
672．．．信號引線
674．．．信號引線
676．．．信號引線
678．．．信號引線
679．．．信號引線
700．．．堆疊式微電子總成
712．．．第一微電子元件
714．．．第二微電子元件
720．．．接觸件
726．．．接觸件
730．．．介電元件
732．．．介電元件730之第一表面
733．．．孔隙
734．．．介電元件730之第二表面
739．．．孔隙
740．．．端子
751A．．．雙導線接合件/導線接合件
751B．．．雙導線接合件/導線接合件
752A．．．雙導線接合件/導線接合件
752B．．．雙導線接合件/導線接合件
752．．．導線接合件
762．．．導線接合件
780．．．囊封劑
782．．．囊封劑
790．．．接地及/或電源平面
790A．．．離散部分
790B．．．離散部分
792．．．被動體
793．．．被動體
795．．．導電墊
797．．．跡線
800．．．堆疊式微電子總成
812．．．第一微電子元件
814．．．第二微電子元件
820．．．接觸件
826．．．接觸件
830．．．介電材料/介電元件
832．．．介電元件830之第一表面
833．．．孔隙
839．．．孔隙
852．．．導線接合件
871．．．被動體
872．．．導線接合件
873．．．被動體/墊
883．．．第一墊
885．．．第二墊
889．．．第一跡線
890．．．接地及/或電源平面/導電平面
890A．．．離散平面部分
890B．．．離散平面部分
892．．．中央部分
894．．．第一端部部分
895．．．被動體
896．．．第二端部部分
1100．．．系統
1102．．．電路板/電路面板
1104．．．導體
1106．．．微電子總成/結構
1108．．．電子組件
1110．．．電子組件/螢幕
1200．．．電路面板或電路板
1202．．．導電元件或端子
1204．．．電路面板1200之第一表面
圖1係根據本發明之一實施例之一堆疊式微電子總成之一圖解截面正視圖；
圖2係圖1之該堆疊式總成之一仰視圖；
圖2A係圖解說明本文之一實施例中之一微電子總成之一變動中之在接合元件之間的一連接之一片段部分截面圖；
圖2B係圖解說明本文之一實施例中之一微電子總成之一變動中之接合元件之間的一連接之一片段部分截面圖；
圖2C係圖解說明本文之一實施例中之一微電子總成之一變動中之在接合元件之間的一連接之一片段部分截面圖；
圖2D係圖解說明本文之一實施例中之一微電子總成之一變動中之在接合元件之間的一連接之一片段部分截面圖；
圖3係根據本發明之另一實施例之一堆疊式微電子總成之一圖解截面正視圖；
圖4係根據本發明之另一實施例之一堆疊式微電子總成之一圖解截面正視圖；
圖5係圖4之該堆疊式總成之一仰視圖；
圖6係該堆疊式微電子總成之另一實施例之一圖解截面圖；
圖7係該堆疊式微電子總成之又一實施例之一圖解截面圖；
圖8係圖7之該堆疊式微電子總成之一仰視圖；
圖9係根據本發明之另一實施例之一堆疊式微電子總成之一仰視圖；
圖10係該堆疊式微電子總成之另一實施例之一圖解截面圖；
圖11係圖10之該堆疊式微電子總成之一仰視圖；
圖12係根據本發明之另一實施例之一堆疊式微電子總成之一仰視圖；
圖13係根據本發明之一實施例之一系統之一示意描繪；及
圖14係電耦合至一電路板之該堆疊式微電子總成之一實施例之一圖解截面圖。
10．．．堆疊式微電子總成
12．．．第一微電子元件
13．．．中央區域
14．．．第二微電子元件
15．．．第一端部區域
16．．．第一微電子元件12之前表面
17．．．第二端部區域
18．．．第一微電子元件12之後表面
19．．．中央區域
20．．．電接觸件/晶片接觸件/接觸件
21．．．第一端部區域
22．．．第二微電子元件14之前表面
23．．．第二端部區域
24．．．第二微電子元件14之後表面
26．．．電接觸件晶片接觸件/接觸件
27．．．第一微電子元件12之第一邊緣
29．．．第一微電子元件12之第二邊緣
30．．．介電元件
31．．．間隔層
32．．．第一表面
33．．．第一孔隙
34．．．第二表面
35．．．第二微電子元件14之第一邊緣
36．．．導電元件/端部
37．．．第二微電子元件14之第二邊緣
39．．．第二孔隙
40．．．導電元件
42．．．導電跡線
50．．．電連接件或引線
52．．．多導線接合件/第一接合導線/雙導線連接/導電元件
54．．．多導線接合件/第二接合導線/雙導線連接件/導電元件
60．．．間隔層
70．．．電連接件或引線
72．．．導線接合件
74．．．導線接合件
80．．．第一囊封劑
81．．．焊球
82．．．第二囊封劑

Claims (23)

  1. 一種微電子總成，其包括：一介電元件，其具有面朝相反方向的第一表面與第二表面以及延伸在該等表面之間的第一孔隙與第二孔隙，該介電元件在其上進一步具有複數個導電元件；一囊封劑，其覆蓋至少部分的該第一孔隙與第二孔隙；一第一微電子元件，其具有一後表面及面對該介電元件之一前表面，該第一微電子元件具有暴露於其之該前表面處之複數個接觸件；一第二微電子元件，其具有一後表面及面對該第一微電子元件之該後表面之一前表面，該第二微電子元件具有暴露於該前表面處之複數個接觸件且凸出超出該第一微電子元件之一邊緣；若干信號引線，其等連接至該等微電子元件之一或多者且延伸通過該第一孔隙至該介電元件上之該等導電元件之一些；及一導電的單石接地平面，其附接至該介電元件且至少部分定位於該第一孔隙與該第二孔隙之間，至少一部分的該單石接地平面延伸穿過覆蓋該第一孔隙與第二孔隙的囊封劑，該導電的單石接地平面與該第一微電子元件或該第二微電子元件之至少一者之該等接觸件之一或多者電連接。
  2. 如請求項1之微電子總成，其中該整個導電的單石接地 平面定位於該第一孔隙與該第二孔隙之間。
  3. 如請求項1之微電子總成，其中該導電的單石接地平面係一電源平面。
  4. 如請求項1之微電子總成，其中該導電的單石接地平面之部分延伸至超出該第一孔隙及該第二孔隙之外邊緣之位置。
  5. 如請求項1之微電子總成，其中該導電的單石接地平面包含彼此隔開的至少兩個平面部分。
  6. 如請求項5之微電子總成，其中該至少兩個平面部分包含：一電源平面部分，其電連接至該第一微電子元件或該第二微電子元件之至少一者之至少一些電源接觸件。
  7. 如請求項1之微電子總成，其中該單石接地平面電耦合至該第一微電子元件之一或多個接觸件。
  8. 如請求項1之微電子總成，其中該單石接地平面電耦合至該第二微電子元件之一或多個接觸件。
  9. 如請求項1之微電子總成，其進一步包括雙導線接合件，該等雙導線接合件連接在該導電平面與該第一微電子元件或該第二微電子元件之至少一者之一接觸件之間。
  10. 如請求項1之微電子總成，其進一步包括：至少一被動組件，其暴露於該介電總成之該第二表面處且在該第一孔隙與該第二孔隙之間。
  11. 如請求項10之微電子總成，其中該至少一被動組件電連接至該第一微電子元件。
  12. 如請求項11之微電子總成，其中該至少一被動組件電連接至該第一微電子元件及該第二微電子元件。
  13. 如請求項10之微電子總成，其中該至少一被動組件具有安裝至且電耦合至該單石接地平面之一電極。
  14. 如請求項13之微電子總成，其中該至少一被動組件係一電容器，其具有遠離該單石接地平面之一第二電極。
  15. 如請求項10之微電子總成，其中該至少一被動組件包含至少一電容器，該至少一電容器具有連接至一導電端子以連接至電源或接地之一電極。
  16. 如請求項10之微電子總成，其中該單石接地平面係一第一接地平面，該微電子總成進一步包括上覆於該介電元件之該第二表面用於分別連接至電源及接地之一第二導電平面，且該至少一被動組件具有分別電連接至該第一導電平面及該第二導電平面之第一電極及第二電極。
  17. 如請求項16之微電子總成，其中該至少一被動組件係一電容器。
  18. 如請求項1之微電子總成，其中該等信號引線係導線接合件。
  19. 如請求項10之微電子總成，其中該等信號引線係引線接合件。
  20. 一種包含如申請專利範圍第1項之一總成的系統，其包括電連接至該總成之一或多個其他電子組件。
  21. 一種包含如申請專利範圍第10項之一總成的系統，其包括電連接至該總成之一或多個其他電子組件。
  22. 如請求項20之系統，其進一步包括一外殼，該總成及該等其他電子組件安裝至該外殼。
  23. 如請求項21之系統，其進一步包括一外殼，該總成及該等其他電子組件安裝至該外殼。
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US20150043181A1 (en) 2015-02-12
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