TWI442325B - Semiconductor memory device and manufacturing method thereof - Google Patents

Semiconductor memory device and manufacturing method thereof Download PDF

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Publication number
TWI442325B
TWI442325B TW100107016A TW100107016A TWI442325B TW I442325 B TWI442325 B TW I442325B TW 100107016 A TW100107016 A TW 100107016A TW 100107016 A TW100107016 A TW 100107016A TW I442325 B TWI442325 B TW I442325B
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Taiwan
Prior art keywords
semiconductor memory
organic substrate
memory device
internal wiring
lead frame
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TW100107016A
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English (en)
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TW201203128A (en
Inventor
Hitoshi Ishii
Naohisa Okumura
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Toshiba Kk
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Publication of TW201203128A publication Critical patent/TW201203128A/zh
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Publication of TWI442325B publication Critical patent/TWI442325B/zh

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Description

半導體記憶裝置及其製造方法
本發明之實施形態一般而言係關於半導體記憶裝置及其製造方法者。
本專利申請案主張2010年3月26日申請之日本專利申請案2010-72921之優先權，該申請案之全部揭示內容以引用文的方式併入本文中。
近年來，作為行動電話或個人電腦等之電子機器之記憶裝置，普遍使用利用NAND型快閃記憶體等之記憶元件之半導體記憶裝置。作為在電子機器中所使用之半導體記憶裝置，可示例記憶卡(半導體記憶卡)。
在半導體記憶裝置中，半導體記憶晶片或控制器晶片等之半導體晶片係搭載於形成有外部端子之配線基板上。半導體晶片之電極應用導線接合而與配線基板之連接墊電性連接，進而以覆蓋半導體晶片整體的方式予以樹脂密封。
在如此之半導體記憶裝置之使用普及中，半導體記憶裝置之製造成本之抑制亦隨之進展。例如，已揭示一種技術，其中配線基板使用以相對較高價之材料構成之有機基板，將該有機基板之形狀設為俯視時成L字狀，藉此抑制有機基板之使用量，從而抑制半導體記憶裝置之製造成本。
然而，在半導體記憶裝置中，佔據相對較大之區域之半導體記憶晶片之載置區域係由有機基板構成。因此，容易使製造成本之抑制效果受限。
本發明之實施形態係提供一種能夠抑制有機基板之使用量，從而謀求製造成本之抑制之半導體記憶裝置及其製造方法。
根據實施形態，提供一種具備於一面設置有外部連接端子之有機基板、及半導體記憶晶片之半導體記憶裝置。半導體記憶裝置進一步具備接著於有機基板之另一面之接著部，及具有載置半導體記憶晶片之載置部之導線架。又，進一步具備使外部連接端子露出，將有機基板、導線架、及半導體記憶晶片密封，且於俯視時呈大致方形形狀之樹脂塑模部。有機基板在接著於接著部的狀態下，被切片成俯視時幾乎不與載置部重疊之形狀。於導線架中，以從載置部及接著部之至少一者向樹脂塑模部之至少2個以上之邊延伸的方式，形成有複數個延伸部。
根據本發明之實施形態之半導體記憶裝置及其製造方法，可抑制有機基板之使用量，從而謀求製造成本之抑制。
以下，參照添附圖式，詳細地說明實施形態之半導體記憶裝置及其製造方法。再者，本發明並不受限於該實施形態。
圖1係顯示第1實施形態之半導體記憶裝置之外觀之平面圖。圖2係顯示圖1所示之半導體記憶裝置之外觀之仰視圖。圖3係模式性顯示圖1所示之半導體記憶裝置之內部構成之圖。圖4係顯示沿著圖1所示之半導體記憶裝置之A-A線之剖面構造的橫剖面圖。半導體記憶裝置10係例如Micro SD卡(註冊商標)。
半導體記憶裝置10具備有機基板11、導線架13、半導體記憶晶片15、控制器晶片16、電子零件17、樹脂塑模部18。如圖1、2所示，半導體記憶裝置10係在使外部連接端子19於底面側露出的狀態下，由樹脂塑模部18覆蓋其外周。半導體記憶裝置10由樹脂塑模部18覆蓋之下，於俯視時呈大致方形形狀。
有機基板11係例如於絕緣性樹脂基板之內部或表面設置有配線網者，兼用作元件載置基板與端子形成基板。作為如此之有機基板11，使用有使用玻璃環氧樹脂或BT樹脂(雙馬來醯亞胺‧三嗪樹脂)等之印刷配線板。有機基板11為多層構造(省略詳細之圖式)，有時會有各層所使用之材料不同之情形。
圖5係有機基板11之仰視圖。於有機基板11之底面(其中一面)11a設置包含金屬層之外部連接端子19。外部連接端子19為半導體記憶裝置10之輸入/出端子。在俯視半導體記憶裝置10之內部構成之情形時，有機基板11被切片成幾乎不會與後述之導線架13之記憶晶片載置部(載置部)21重疊之形狀(亦可參照圖9)。換而言之，可謂在俯視時，有機基板11與載置部21未重疊之部分大於有機基板11與載置部21重疊之部分。
有機基板11之上表面11b(另一面)為搭載控制器晶片16或電子零件17之載置面。因此，有機基板11之上表面11b之面積大於俯視觀察控制器晶片16或電子零件17時之面積。於有機基板11之上表面11b形成有複數個連接墊(未圖示)。連接墊與外部連接端子19之間，或連接墊彼此之間係經由有機基板11之內部配線(通孔等)電性連接。將半導體記憶晶片15或控制器晶片16之電極墊(未圖示)與連接墊電性連接，藉此使半導體記憶晶片15、控制器晶片16、外部連接端子19等之各要素電性連接。
此處，複數個連接墊中連接於半導體記憶晶片15之連接墊係與外部端子排列之方向大致平行地配置。又，複數個連接墊中連接於控制器晶片16之連接墊配置於控制器晶片16之電極墊附近。其結果，可以金屬導線28直接連接半導體記憶晶片15之電極墊，與配置於有機基板11之上表面11b之連接墊。又，可以金屬導線27直接連接控制器晶片16之電極墊、與配置於有機基板11之上表面11b之連接墊。又，將連接於半導體記憶晶片15之連接墊及連接於控制器晶片16之連接墊，配置於半導體記憶晶片15之電極墊與控制器晶片16之電極墊之間，藉此可縮短連接於半導體記憶晶片15之連接墊與控制器晶片16之距離。其結果，可以低電阻連接半導體記憶晶片15與控制器晶片16。再者，有機基板11之連接墊之配置不受限於上述之情形。例如，使控制器晶片16從圖3所示之配置旋轉180度之情形，連接於控制器晶片16之連接墊係以相對於連接於半導體記憶晶片15之連接墊夾著控制器晶片16的方式配置。
又，複數個連接墊中電性連接於半導體記憶晶片15之連接墊之間距為大致80~150 μm左右，電性連接於控制器晶片16之連接墊之間距為大致50~120 μm左右。即，使電性連接於控制器晶片16之連接墊之間距小於電性連接於半導體記憶晶片15之連接墊之間距。
圖6係導線架13之平面圖。導線架13使用較有機基板11所使用之材料相對低價之通用材料，例如42 Alloy合金或銅。導線架13具有載置部21、基板接著部22、連結部23。
載置部21係用於載置半導體記憶晶片15之區域。於載置部21之周圍，以從載置部21延伸的方式形成有基板接著部22、及連結部23。基板接著部22係使用接著劑接著於有機基板11之上表面11b之區域。將基板接著部22接著於有機基板11之上表面11b，藉此使載置部21定位於俯視時幾乎不會與有機基板11重疊之位置。
又，載置部21與有機基板11俯視時雖幾乎不會重疊，但仍有在一部分之區域相互重疊之部分。載置部21與有機基板11在該重疊之部分相接合。藉由將載置部21接合於有機基板11，而使有機基板11與導線架13之接觸面積增大。因此，相較於僅在基板接著部22處與有機基板11接著之情形，可強化有機基板11與導線架13之接著力。再者，亦可使用接著劑接著載置部21與有機基板11重疊之部分。其結果，可進一步強化有機基板11與導線架13之接著力。
連結部23係以從載置部21或基板接著部22向半導體記憶裝置10之外部、即後述之樹脂塑模部18之外部延伸的方式形成。如圖6所示，於導線架13上形成有複數個連結部23。連結部23係在半導體記憶裝置之製造階段使複數個導線架13彼此連結。如此，藉由使複數個導線架13連結，可一次製造複數個半導體記憶裝置10。在圖6中，以雙點虛線表示半導體記憶裝置之外形。在本實施形態中，係以朝向俯視時呈大致方形形狀之半導體記憶裝置10之所有4邊延伸的方式，形成複數個連結部23。
又，在俯視時之半導體記憶裝置10之4邊中至少1邊，以向該1邊延設的方式設置有2個以上之連結部23。再者，在本實施形態中，在半導體記憶裝置10之所有4邊，以向該1邊延伸的方式，設置有2個以上連結部23。
連結部23係包含殘餘部13a與延伸部13b而構成。殘餘部13a為從半導體記憶裝置10之外形突出之部分，且最終會被切斷除去。延伸部13b未從半導體記憶裝置10之最終之外徑突出，構成半導體記憶裝置10之一部分。連結部23係形成為，其與半導體記憶裝置10之外部之交界部分在俯視時較載置部21或基板接著部22側之根部為細。尤其在本實施形態中，係以在與半導體記憶裝置10之外部之交界部分之附近變細的方式形成。
半導體記憶晶片15為NAND型快閃記憶體等之記憶元件。半導體記憶晶片15其1邊具有複數個電極墊。半導體記憶晶片15之電極墊之間距為大致80 μm以上，有機基板11複數個連接墊中電性連接於半導體記憶晶片15之連接墊係配合半導體記憶晶片而形成為大致80~150 μm。於載置部21上積層複數個半導體記憶晶片15。在複數個半導體記憶晶片15中，最下層之半導體記憶晶片15係藉由接著材料25對載置部21接著。作為接著材料25，使用例如一般之以聚醯亞胺樹脂、環氧樹脂、丙烯酸樹脂等為主成份之熱硬化性或光硬化性之晶片黏著薄膜(接著劑薄膜)或液狀材料。
於接著於載置部21之最下層之半導體記憶晶片15上，成階梯狀接著另外之半導體記憶晶片15，藉此積層複數個半導體記憶晶片15。藉由成階梯狀積層半導體記憶晶片15，可使設置於半導體記憶晶片15之一邊側之電極墊露出。又，以使各個配置有半導體記憶晶片15之電極墊之邊與有機基板11對向的方式積層。該露出之電極墊係以Au導線等之金屬導線27而與有機基板11之連接墊電性連接(導線接合)。
控制器晶片16係搭載於有機基板11之上表面11b。控制器晶片16係從複數個半導體記憶晶片15中，選擇要進行資料之寫入或讀取之半導體記憶晶片15。控制器晶片16係對所選之半導體記憶晶片15進行資料之寫入，或對記憶於所選之半導體記憶晶片15中之資料進行讀取等。於控制器晶片16之上表面形成有電極墊(未圖示)。又，控制器晶片16之複數個電極墊係配置於控制器晶片16之周邊。控制器晶片16所具有之電極墊數，多於半導體記憶晶片15所具有之電極墊數。又，控制器晶片16所具有之電極墊之間距為大致30~100 μm左右，較有機基板11之複數個連接墊中電性連接於控制器晶片16之連接墊之間距窄。控制器晶片16之電極墊與有機基板11之連接墊係以金屬導線28予以導線接合。
電子零件17係搭載於有機基板11之上表面11b。電子零件17為例如晶片電容器、電阻或電感器。此處，將電子零件17配置於有機基板11上，藉此無需以金屬導線連接，而經由有機基板之內部配線，與半導體記憶晶片15或控制器晶片16電性連接。其結果，可降低半導體記憶裝置10之寄生電容、寄生電阻。
樹脂塑模部18係藉由以樹脂系材料密封有機基板11之上表面11b及導線架13之兩面而形成。藉由以樹脂材料密封有機基板11之上表面11b，使外部連接端子露出於外部。樹脂塑模部18係構成半導體記憶裝置10之外殼。樹脂塑模部18係以覆蓋半導體記憶晶片15或控制器晶片16之高度形成。樹脂塑模部18係藉由以模具覆蓋安裝有半導體記憶晶片15等之安裝零件之有機基板11及導線架13，且將經軟化之樹脂系材料注入該模具內而形成。
其次，就半導體記憶裝置10之製造步驟進行說明。圖7係用於說明半導體記憶裝置10之製造步驟之流程圖。圖8~圖13係用於說明半導體記憶裝置10之製造步驟之圖。
首先，將有機基板11切片(步驟S1)。由於有機基板11之切片係藉由使用例如切割刀片(未圖示)之一般之步驟進行，故省略詳細之說明。其次，於導線架13之基板接著部22塗布接著劑30(步驟S2，亦參照圖8)。作為接著劑30，使用例如以一般之聚醯亞胺樹脂、環氧樹脂、丙烯酸樹脂等為主成份之熱硬化性或光硬化性之晶片黏著薄膜(接著劑薄膜)或液狀材料。再者，亦於載置部21與有機基板11重疊之部分塗布接著劑30。此處，可省略塗布於載置部21與有機基板11重疊之部分之接著劑30。
其次，使有機基板11之上表面11b接著於塗布有接著劑30之基板接著部22(步驟S3，亦參照圖9)。其次，於有機基板11之上表面11b安裝控制器晶片16與電子零件17(步驟S4，亦參照圖10)。其次，使半導體記憶晶片15介隔接著材料25接著於載置部21，於其上進而接著半導體記憶晶片15，從而使半導體記憶晶片15積層(步驟S5，亦參照圖11)。
其次，以金屬導線27、28，將半導體記憶晶片15之電極墊與有機基板11之連接墊，及控制器晶片16之電極墊與有機基板11之連接墊進行導線接合(步驟S6，亦參照圖12)。其次，以樹脂系材料密封有機基板11之上表面11b及導線架13之兩面，形成樹脂塑模部18，並切除殘餘部13a(步驟S7，亦參照圖13)。再者，在圖13中，為便於說明，亦顯示有因被樹脂塑模部18覆蓋故實際無法視認之內部構成(半導體記憶晶片15等)。藉由上述一系列之步驟，製造半導體記憶裝置10。
圖14係模式性顯示作為比較例之半導體記憶裝置100之內部構成之圖。圖15係顯示圖14所示之半導體記憶裝置100之剖面構造之橫剖面圖。如圖14、圖15所示，在比較例之半導體記憶裝置100中，將半導體記憶晶片115積層於有機基板111上。因此，有機基板111係以具備用於載置半導體記憶晶片115之區域之大小形成。
另一方面，在本實施形態之半導體記憶裝置10中，在俯視觀察半導體記憶裝置10之內部構成之情形時，由於有機基板11被切片成幾乎不與載置部21重疊之形狀，故相較於比較例，有機基板11較小型，從而可大幅抑制有機基板11之使用量。藉此，可謀求半導體記憶裝置10之製造成本之抑制。再者，將有機基板11切片成與設置外部連接端子19之區域S(參照圖5)大致相同之平面形狀，藉此亦可謀求有機基板11之進一步之小型化。
又，以向俯視時呈大致方形形狀之半導體記憶裝置10之4邊延伸的方式，形成有複數個連結部23。即，連結部23從導線架13向4個方向延伸。在形成樹脂塑模部18之步驟中，由模具夾持向4方向延伸之連結部23，藉此保持導線架13。連結部23由於以向4個方向延伸之連結部23予以保持，故利用模具之導線架13之保持力增強。
尤其是使記憶晶片載置部31在模具內保持於適當之位置變得容易。於模具注入樹脂系材料之際，若導線架13因其注入壓力而移動，則會導致半導體體記憶晶片15從樹脂塑模部18露出等之情形，但若抑制如此之問題之產生，則可謀求良品率之提高。再者，連結部23亦可不向所有之俯視時之半導體記憶裝置10之4邊延伸。只要以至少向俯視時之半導體記憶裝置10之2條以上之邊延伸的方式設置複數個連結部23即可。
又，由於在俯視時之半導體記憶裝置10之4邊中至少1邊處，以向其1邊延伸的方式設置有2個以上之連結部23，故可進一步提高利用上述之模具之導線架13之保持力。
又，連結部23係以亦從基板接著部22延伸的方式形成。因此，藉由與上述相同之理由，使在形成樹脂塑模部18之步驟中之利用模具之基板接著部22之保持力增強。此處，在半導體記憶裝置10中，使有機基板11之底面11a露出。因此，必須在形成樹脂塑模部18之步驟中，使有機基板11之底面11a與模具密著，藉此防止樹脂侵入至底面11a與模具之間隙。
例如，若導線架13、尤其是基板接著部22在有機基板11與模具脫離之方向變形，則於有機基板11之底面11a與模具之間會產生間隙，從而導致樹脂容易侵入。若因侵入至底面11a與模具之間隙之樹脂而覆蓋住外部連接端子19，則有引起與外部機器之接觸不良、或產生切除毛邊之多餘之工夫等之問題。另一方面，在本實施形態中，由於可藉由從基板接著部22延伸之連結部23(延伸部13b)而提高利用模具之基板接著部22之保持力，故可抑制導線架13之變形，尤其是基板接著部22之變形，從而使有機基板11容易確實地密著於模具。藉此，可抑制樹脂侵入基板11之底面11a與模具之間隙，從而謀求良品率之提高或製造成本之抑制。又，使2個連結部23(延伸部13b)從基板接著部22向樹脂塑模部之2邊延伸。其結果，可有效地抑制樹脂侵入至基板11之底面11a與模具之間隙。
又，由於連結部23係以使俯視時與半導體記憶裝置10之外部之交界部分較載置部21或基板接著部22側之根部為細的方式形成，故在切除殘餘部23a之際，可使連結部23之切斷面積縮小。因此，可抑制切斷連結部23之工具之磨損，謀求工具之長壽命化。又，由於連結部23之根部較與半導體記憶裝置10之外部之交界部分為粗，故可抑制連結部23之強度降低。藉此，可抑制上述之利用模具之導線架13之保持力降低。
又，使導線架13接觸於有機基板11，藉此決定有機基板11與載置部21之相對之位置關係。藉由使導線架13接觸於有機基板11，可減少半導體記憶晶片15與有機基板11之位置偏移，抑制在導線接合步驟中之施工不良，從而抑制良品率之降低。再者，由於有機基板11與導線架13最終由樹脂塑模部18密封，故有機基板11與導線架13之接著無需要求高可靠度，只要在樹脂塑模部18之形成步驟之前維持兩者之接著即可。即，可於載置部21與基板接著部22塗布接著劑30，而省略塗布於載置部21與有機基板11重疊部分之接著劑30。例如，在載置部21與有機基板11重疊之部分較少之情形等，可防止接著劑30從載置部21與有機基板11重疊之部分溢出。
又，位於導線架13之大致中央部，並從載置部21與有機基板11重疊之部分向樹脂塑模部18之外部延伸之連結部23-1亦與有機基板11重疊。其結果，可增加導線架13與有機基板11接觸之面積。因此，可減少半導體記憶晶片15與有機基板11之位置偏移，抑制在導線接合步驟中之施工不良，從而抑制良品率之降低。
控制器晶片16相較於半導體記憶晶片15，所要形成之電極墊之數容易較多。又，控制器晶片16相較於半導體記憶晶片15，俯視觀察之平面形狀容易較小地形成。因此，用於將控制器晶片16導線接合之電極墊或連接墊，相較於用於將半導體記憶晶片15導線接合之電極墊或連接墊更密集形成。在本實施形態中，由於並非將控制器晶片16安裝於導線架13上而是安裝於有機基板11上，故即使在電極墊或連接墊密集形成之條件下，亦可確實地進行導線接合。另一方面，用於進行半導體記憶晶片15之導線接合之電極墊或連接墊其間隔相對較寬。因此，半導體記憶晶片15之導線接合相對較容易，且將半導體記憶晶片15安裝於導線架13上，即使相互之距離略微遠離，亦可進行導線接合。
又，由於將控制器晶片16及電子零件17等安裝於有機基板11之上表面11b，故可使有機基板11之底面11a側、即形成有外部連接端子19之側大致平坦。藉此，可有助於半導體記憶裝置10之小型化。又，由於減少半導體記憶裝置10之外周面之凹凸，可有助於實現半導體記憶裝置10對電子機器之順利***、拔取。
又，外部連接端子、半導體記憶晶片15、控制器晶片16及電子零件17係經由有機基板11之內部配線連接。即，半導體記憶晶片15、控制器晶片16及電子零件17無需經由引線零件電性連接。藉此，使殘餘部13a之切除部分於樹脂塑模部18之外側面露出，可省去於該部分進行絕緣處理等之工夫，從而可進一步抑制半導體記憶裝置10之製造成本。
又，將有機基板11之平面形狀小型化，藉此可抑制在電子零件17之安裝步驟等中對有機基板11施加之熱所導致之有機基板11的變形。如上所述，有機基板11為多層構造，會有在各層所使用之材料不同之情形。各層之材料不同，則各層之線膨脹係數亦不同，故容易因熱經歷而產生變形。此處，使有機基板11之平面形狀小型化，藉此可使有機基板11於半導體記憶裝置10整體中所占之比例減少，從而難以產生半導體記憶裝置10整體之變形。
再者，載置部21與有機基板11之相對位置關係之決定不受限於藉由導線架13進行之情形。例如，亦可將有機基板11與導線架13分別固定在用於形成樹脂塑模部18之模具。藉由將有機基板11與導線架13固定於模具，而決定相互之相對位置關係。
再者，在本實施形態中，雖以將複數個半導體記憶晶片15積層於載置部21上為例進行說明，但本發明並不限定於此，亦可僅使1片半導體記憶晶片15接著於載置部21上而構成半導體記憶裝置10。
又，半導體記憶裝置10之製造步驟並不限定於圖7之流程圖所示之情形。例如，亦可在將有機基板11接著於導線架13之前，將控制器晶片16與電子零件安裝於有機基板11。又，亦可在將有機基板11切片之前，將控制器晶片16與電子零件安裝於有機基板11。
又，在本實施形態中，作為半導體記憶裝置10，以Micro SD卡為例進行說明，但並不限定於此，亦可將本實施形態應用於具備半導體記憶晶片而構成之各種記憶裝置。
本發明可由當業者容簡單地衍生出更進一步之效果或變形例。因此，本發明之更廣泛之態樣並不限定於如上所表明且記述的特定之細節及代表性之實施形態。因此，在不脫離附加之申請專利範圍及其均等物所定義之概括性之發明概念的精神或範圍內，得進行各種之變更。
10．．．半導體記憶裝置
11．．．有機基板
11a．．．底面
11b．．．上表面
13．．．導線架
13a．．．殘餘部
13b．．．延伸部
15．．．半導體記憶晶片
16．．．控制器晶片
17．．．電子零件
18．．．樹脂塑模部
19．．．外部連接端子
21．．．載置部
22．．．基板接著部
23．．．連結部
23-1．．．連接部
25．．．接著材料
27．．．金屬導線
28．．．金屬導線
30．．．接著劑
100．．．半導體記憶裝置
111．．．有機基板
115．．．半導體記憶晶片
圖1係顯示實施形態之半導體記憶裝置之外觀之平面圖。
圖2係顯示圖1所示之半導體記憶裝置之外觀之仰視圖。
圖3係模式性顯示圖1所示之半導體記憶裝置之內部構成之圖。
圖4係顯示沿著圖1所示之半導體記憶裝置之A-A線之剖面構造的橫剖面圖。
圖5係有機基板之仰視圖。
圖6係導線架之平面圖。
圖7係用於說明半導體記憶裝置之製造步驟之流程圖。
圖8係用於說明半導體記憶裝置之製造步驟之圖。
圖9係用於說明半導體記憶裝置之製造步驟之圖。
圖10係用於說明半導體記憶裝置之製造步驟之圖。
圖11係用於說明半導體記憶裝置之製造步驟之圖。
圖12係用於說明半導體記憶裝置之製造步驟之圖。
圖13係用於說明半導體記憶裝置之製造步驟之圖。
圖14係模式性顯示作為比較例之半導體記憶裝置之內部構成之圖。
圖15係顯示圖14所示之半導體記憶裝置之剖面構造之橫剖面圖。
10．．．半導體記憶裝置
11．．．有機基板
11b．．．上表面
13．．．導線架
15．．．半導體記憶晶片
16．．．控制器晶片
17．．．電子零件
18．．．樹脂塑模部
23．．．連結部
27．．．金屬導線
28．．．金屬導線

Claims (16)

  1. 一種半導體記憶裝置，其更包含：於一面設置有外部連接端子之有機基板；具有接著於上述有機基板之另一面之接著部、及載置部之導線架；載置於上述載置部之半導體記憶晶片；及使上述外部連接端子露出，將上述有機基板、上述導線架、及上述半導體記憶晶片密封，且於俯視時呈大致方形形狀之樹脂塑模部；且上述有機基板在接著於上述接著部之狀態下，被切片成於俯視時上述有機基板與上述載置部未重疊之部分大於上述有機基板與上述載置部重疊之部分的形狀，於上述導線架中，以從上述載置部及上述接著部之至少一者向上述樹脂塑模部之至少2條以上之邊延伸的方式，形成有複數個延伸部。
  2. 如請求項1之半導體記憶裝置，其中上述延伸部其在俯視時與上述樹脂塑模部之外部之交界部，較上述載置部或上述接著部側之根部為細。
  3. 如請求項1之半導體記憶裝置，其於上述導線架中，以向上述樹脂塑模部之至少1邊延伸的方式形成有複數個上述延伸部。
  4. 如請求項1之半導體記憶裝置，其中上述有機基板之一部分與上述延伸部之一部分於俯視時重疊。
  5. 如請求項1之半導體記憶裝置，其中2個上述延伸部從上述接著部向上述樹脂塑模部之2邊延伸。
  6. 如請求項1之半導體記憶裝置，其進一步包含搭載於上述有機基板之另一面之控制器晶片。
  7. 如請求項6之半導體記憶裝置，其於上述有機基板上形成內部配線，且上述內部配線與上述半導體記憶晶片之間、及上述內部配線與上述控制器晶片之間係以接合導線連接，而上述控制器晶片與上述半導體記憶晶片係經由上述內部配線電性連接。
  8. 如請求項7之半導體記憶裝置，其於上述有機基板上形成內部配線，且上述控制器晶片與上述外部連接端子係經由上述內部配線電性連接。
  9. 如請求項1之半導體記憶裝置，其進一步包含搭載於上述有機基板之另一面之電子零件。
  10. 如請求項1之半導體記憶裝置，其中上述半導體記憶晶片為NAND型快閃記憶體。
  11. 一種半導體記憶裝置之製造方法，其係將於一面形成有外部連接端子之有機基板，切片成上述有機基板與上述載置部未重疊之部分大於形成於導線架之載置半導體記憶晶片之載置部重疊之部分的形狀；上述導線架具有從上述載置部延伸之接著部，並將上述接著部接著於上述有機基板之另一面；形成使上述外部連接端子露出、且密封上述有機基板、上述導線架、及上述半導體記憶晶片之樹脂塑模部；於上述導線架中，以從上述載置部及上述接著部之至少一者向上述樹脂塑模部之至少2個以上之邊延伸的方式，形成複數個延伸部。
  12. 如請求項11之半導體記憶裝置之製造方法，其於上述有機基板之另一面安裝控制器晶片。
  13. 如請求項12之半導體記憶裝置之製造方法，其於上述有機基板上形成內部配線，且以接合導線連接上述內部配線與控制器晶片，以接合導線連接上述內部配線與上述半導體晶片，並經由上述內部配線而電性連接上述控制器晶片與上述半導體記憶晶片。
  14. 如請求項12之半導體記憶裝置之製造方法，其於上述有機基板上形成與上述外部連接端子電性連接之內部配線，且以接合導線連接上述控制器晶片與上述內部配線，並經由上述內部配線而電性連接上述外部連接端子與上述內部配線。
  15. 如請求項11之半導體記憶裝置之製造方法，其於上述有機基板之另一面安裝電子零件。
  16. 如請求項11之半導體記憶裝置之製造方法，其中上述半導體記憶晶片為NAND型快閃記憶體。
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