TW200618305A - Method of manufacturing thin film semiconductor device and thin film semiconductor device - Google Patents

Method of manufacturing thin film semiconductor device and thin film semiconductor device

Info

Publication number
TW200618305A
TW200618305A TW094126431A TW94126431A TW200618305A TW 200618305 A TW200618305 A TW 200618305A TW 094126431 A TW094126431 A TW 094126431A TW 94126431 A TW94126431 A TW 94126431A TW 200618305 A TW200618305 A TW 200618305A
Authority
TW
Taiwan
Prior art keywords
thin film
semiconductor device
film semiconductor
interlayer insulating
insulating film
Prior art date
Application number
TW094126431A
Other languages
English (en)
Other versions
TWI312577B (zh
Inventor
Masafumi Kunii
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of TW200618305A publication Critical patent/TW200618305A/zh
Application granted granted Critical
Publication of TWI312577B publication Critical patent/TWI312577B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Recrystallisation Techniques (AREA)
TW094126431A 2004-08-04 2005-08-03 Method of manufacturing thin film semiconductor device and thin film semiconductor device TW200618305A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004227470A JP4729881B2 (ja) 2004-08-04 2004-08-04 薄膜半導体装置の製造方法および薄膜半導体装置

Publications (2)

Publication Number Publication Date
TW200618305A true TW200618305A (en) 2006-06-01
TWI312577B TWI312577B (zh) 2009-07-21

Family

ID=35996783

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094126431A TW200618305A (en) 2004-08-04 2005-08-03 Method of manufacturing thin film semiconductor device and thin film semiconductor device

Country Status (4)

Country Link
US (2) US20060051903A1 (zh)
JP (1) JP4729881B2 (zh)
KR (1) KR20060049275A (zh)
TW (1) TW200618305A (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3917698B2 (ja) * 1996-12-12 2007-05-23 株式会社半導体エネルギー研究所 レーザーアニール方法およびレーザーアニール装置
JP2008078166A (ja) * 2006-09-19 2008-04-03 Sony Corp 薄膜半導体装置の製造方法および薄膜半導体装置
KR100810639B1 (ko) * 2006-12-06 2008-03-07 삼성에스디아이 주식회사 박막트랜지스터와 그 제조방법 및 이를 구비한유기전계발광표시장치
KR100810638B1 (ko) * 2006-12-06 2008-03-07 삼성에스디아이 주식회사 박막트랜지스터와 그 제조방법 및 이를 구비한유기전계발광표시장치
TWI345836B (en) 2007-06-12 2011-07-21 Au Optronics Corp Dielectric layer and thin film transistor,display planel,and electro-optical apparatus
KR101015847B1 (ko) 2008-01-18 2011-02-23 삼성모바일디스플레이주식회사 박막트랜지스터와 그 제조방법 및 이를 구비한유기전계발광표시장치
KR101340098B1 (ko) 2009-09-17 2014-01-02 가부시끼가이샤 도시바 반도체 장치의 제조 방법
JP6489942B2 (ja) * 2015-05-29 2019-03-27 東芝メモリ株式会社 半導体デバイスの製造方法
US9627484B1 (en) * 2015-10-12 2017-04-18 International Business Machines Corporation Devices with multiple threshold voltages formed on a single wafer using strain in the high-K layer
CN108630605B (zh) * 2017-03-22 2020-12-18 中芯国际集成电路制造(上海)有限公司 半导体装置及其制造方法
CN109523912B (zh) * 2018-12-13 2021-03-16 厦门天马微电子有限公司 显示面板和显示装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2814009B2 (ja) * 1990-06-05 1998-10-22 三菱電機株式会社 半導体装置の製造方法
JPH0714849A (ja) * 1993-06-18 1995-01-17 Fujitsu Ltd 薄膜トランジスタの製造方法
JP3417072B2 (ja) * 1994-08-15 2003-06-16 ソニー株式会社 半導体装置の製法
US6136728A (en) * 1996-01-05 2000-10-24 Yale University Water vapor annealing process
US5815226A (en) * 1996-02-29 1998-09-29 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of fabricating same
TW333671B (en) * 1996-03-25 1998-06-11 Sanyo Electric Co The semiconductor device and its producing method
TW332320B (en) * 1997-01-03 1998-05-21 Nat Science Council A low temperature deposited hydrogenated amorphous silicon nitride and amorphous silicon hydrogen composite passivation layer, the deposition method and the semiconductor
US6274887B1 (en) * 1998-11-02 2001-08-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method therefor
US6346730B1 (en) * 1999-04-06 2002-02-12 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device having a pixel TFT formed in a display region and a drive circuit formed in the periphery of the display region on the same substrate
JP2001006090A (ja) * 1999-06-21 2001-01-12 Matsushita Electric Ind Co Ltd 交通流量管理方法
JP3437843B2 (ja) * 2001-07-06 2003-08-18 沖電気工業株式会社 絶縁膜の形成方法及び集積回路の製造方法

Also Published As

Publication number Publication date
TWI312577B (zh) 2009-07-21
US20060051903A1 (en) 2006-03-09
US20090142912A1 (en) 2009-06-04
JP4729881B2 (ja) 2011-07-20
JP2006049535A (ja) 2006-02-16
KR20060049275A (ko) 2006-05-18

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees