KR850003611A - 반도체 기억장치의 메모리 셀(cell) 캐패시터 전압인가회로 - Google Patents

반도체 기억장치의 메모리 셀(cell) 캐패시터 전압인가회로 Download PDF

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Publication number
KR850003611A
KR850003611A KR1019840006770A KR840006770A KR850003611A KR 850003611 A KR850003611 A KR 850003611A KR 1019840006770 A KR1019840006770 A KR 1019840006770A KR 840006770 A KR840006770 A KR 840006770A KR 850003611 A KR850003611 A KR 850003611A
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KR
South Korea
Prior art keywords
memory cell
memory device
semiconductor memory
voltage application
application circuit
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Application number
KR1019840006770A
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English (en)
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KR890004408B1 (ko
Inventor
미쯔기 오꾸라 (외 1)
Original Assignee
사바 쇼오이찌
가부시끼 가이샤 도오시바
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Publication of KR850003611A publication Critical patent/KR850003611A/ko
Application granted granted Critical
Publication of KR890004408B1 publication Critical patent/KR890004408B1/ko

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)

Abstract

내용 없음

Description

반도체 기억장치의 메모리 셀(cell) 캐패시터 전압인가회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 관한 반도체 기억장치의 메모리 셀 캐패시터 전압인가 회로의 일실시예를 나타내는 회로도, 제2도는 제1도의 메모리 셀의 1개를 꺼내어 나타내는 구조 설명도, 제3도 및 제4도는 각각 제1도의 제어신호 ψ,ψ를 발생하는 회로의 상이한 예를 나타내는 회로도이다.

Claims (1)

  1. 각 기기억용 MOS 캐패시터가 사용된 메모리 셀굴을 갖는 반도체기억장치에 있어서, 상기 각 MOS 캐패시터의 일측 전극공통접속점에다 MOS 캐패시터에 통상동작용 갖은 전압 또는 그 전압보다 높은 스크리닝용 전압을 선택적으로 인가시키는 절환회로를 구비시킨 것을 특징으로 하는 반도체기억장치의 메모리 셀 캐패시터 전압인가회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019840006770A 1983-11-09 1984-10-30 반도체기억장치의 메모리 셀(cell) 캐패시터 전압인가회로 KR890004408B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP58210099A JPS60103587A (ja) 1983-11-09 1983-11-09 半導体記憶装置のメモリセルキヤパシタ電圧印加回路
JP58-210099 1983-11-19

Publications (2)

Publication Number Publication Date
KR850003611A true KR850003611A (ko) 1985-06-20
KR890004408B1 KR890004408B1 (ko) 1989-11-03

Family

ID=16583795

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019840006770A KR890004408B1 (ko) 1983-11-09 1984-10-30 반도체기억장치의 메모리 셀(cell) 캐패시터 전압인가회로

Country Status (4)

Country Link
US (1) US4725985A (ko)
EP (1) EP0144710A3 (ko)
JP (1) JPS60103587A (ko)
KR (1) KR890004408B1 (ko)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613390A (ja) * 1984-06-15 1986-01-09 Hitachi Ltd 記憶装置
US5157629A (en) * 1985-11-22 1992-10-20 Hitachi, Ltd. Selective application of voltages for testing storage cells in semiconductor memory arrangements
US5187685A (en) * 1985-11-22 1993-02-16 Hitachi, Ltd. Complementary MISFET voltage generating circuit for a semiconductor memory
JPH0789433B2 (ja) * 1985-11-22 1995-09-27 株式会社日立製作所 ダイナミツク型ｒａｍ
FR2594589A1 (fr) * 1986-02-18 1987-08-21 Eurotechnique Sa Memoire dynamique a ecriture monocycle d'un champ d'etats logiques
JPS62192998A (ja) * 1986-02-19 1987-08-24 Mitsubishi Electric Corp 半導体記憶装置
FR2600809B1 (fr) * 1986-06-24 1988-08-19 Eurotechnique Sa Dispositif de detection du fonctionnement du systeme de lecture d'une cellule-memoire eprom ou eeprom
US5223792A (en) * 1986-09-19 1993-06-29 Actel Corporation Testability architecture and techniques for programmable interconnect architecture
JPS63181196A (ja) * 1987-01-22 1988-07-26 Oki Electric Ind Co Ltd 半導体集積回路装置
JP2904276B2 (ja) * 1987-02-24 1999-06-14 沖電気工業株式会社 半導体集積回路装置
US5051995A (en) * 1988-03-14 1991-09-24 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having a test mode setting circuit
JP2688976B2 (ja) * 1989-03-08 1997-12-10 三菱電機株式会社 半導体集積回路装置
JP3384409B2 (ja) * 1989-11-08 2003-03-10 富士通株式会社 書換え可能な不揮発性半導体記憶装置及びその制御方法
KR0164814B1 (ko) * 1995-01-23 1999-02-01 김광호 반도체 메모리장치의 전압 구동회로
KR0154755B1 (ko) * 1995-07-07 1998-12-01 김광호 가변플레이트전압 발생회로를 구비하는 반도체 메모리장치
DE19631361A1 (de) * 1996-08-02 1998-02-05 Siemens Ag Verfahren zur Herstellung von integrierten kapazitiven Strukturen
US5909049A (en) * 1997-02-11 1999-06-01 Actel Corporation Antifuse programmed PROM cell
JP2004079843A (ja) * 2002-08-20 2004-03-11 Renesas Technology Corp 半導体記憶装置
JP2004233526A (ja) 2003-01-29 2004-08-19 Mitsubishi Electric Corp 液晶表示装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4225945A (en) * 1976-01-12 1980-09-30 Texas Instruments Incorporated Random access MOS memory cell using double level polysilicon
EP0059184A1 (en) * 1980-09-08 1982-09-08 Mostek Corporation Go/no go margin test circuit for semiconductor memory
US4418403A (en) * 1981-02-02 1983-11-29 Mostek Corporation Semiconductor memory cell margin test circuit
US4380803A (en) * 1981-02-10 1983-04-19 Burroughs Corporation Read-only/read-write memory
JPS5891594A (ja) * 1981-11-27 1983-05-31 Fujitsu Ltd ダイナミツク型半導体記憶装置
US4465973A (en) * 1982-05-17 1984-08-14 Motorola, Inc. Pad for accelerated memory test
JPS59121691A (ja) * 1982-12-01 1984-07-13 Fujitsu Ltd ダイナミツク型半導体記憶装置

Also Published As

Publication number Publication date
KR890004408B1 (ko) 1989-11-03
JPS60103587A (ja) 1985-06-07
EP0144710A3 (en) 1987-01-21
EP0144710A2 (en) 1985-06-19
US4725985A (en) 1988-02-16

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