KR19990068074A - 반도체 집적회로 장치 및 그 제조방법 - Google Patents
반도체 집적회로 장치 및 그 제조방법 Download PDFInfo
- Publication number
- KR19990068074A KR19990068074A KR1019990001957A KR19990001957A KR19990068074A KR 19990068074 A KR19990068074 A KR 19990068074A KR 1019990001957 A KR1019990001957 A KR 1019990001957A KR 19990001957 A KR19990001957 A KR 19990001957A KR 19990068074 A KR19990068074 A KR 19990068074A
- Authority
- KR
- South Korea
- Prior art keywords
- film
- insulating film
- misfet
- contact hole
- forming
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 127
- 238000004519 manufacturing process Methods 0.000 title claims description 23
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 118
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 118
- 230000002093 peripheral effect Effects 0.000 claims abstract description 104
- 239000003990 capacitor Substances 0.000 claims abstract description 88
- 238000003860 storage Methods 0.000 claims abstract description 56
- 238000010438 heat treatment Methods 0.000 claims abstract description 45
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910001936 tantalum oxide Inorganic materials 0.000 claims abstract description 10
- 239000010936 titanium Substances 0.000 claims description 84
- 229910052751 metal Inorganic materials 0.000 claims description 75
- 239000002184 metal Substances 0.000 claims description 75
- 238000000034 method Methods 0.000 claims description 62
- 239000000758 substrate Substances 0.000 claims description 50
- 230000008018 melting Effects 0.000 claims description 46
- 238000002844 melting Methods 0.000 claims description 46
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 44
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 26
- 229910052719 titanium Inorganic materials 0.000 claims description 26
- 230000004888 barrier function Effects 0.000 claims description 24
- 238000000151 deposition Methods 0.000 claims description 22
- 239000012535 impurity Substances 0.000 claims description 21
- 229910021332 silicide Inorganic materials 0.000 claims description 17
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 17
- 150000004767 nitrides Chemical class 0.000 claims description 16
- 239000010941 cobalt Substances 0.000 claims description 15
- 229910017052 cobalt Inorganic materials 0.000 claims description 15
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 15
- 238000005229 chemical vapour deposition Methods 0.000 claims description 14
- 229910052721 tungsten Inorganic materials 0.000 claims description 14
- 239000010937 tungsten Substances 0.000 claims description 12
- 238000000059 patterning Methods 0.000 claims description 10
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 10
- 229910044991 metal oxide Inorganic materials 0.000 claims description 7
- 150000004706 metal oxides Chemical class 0.000 claims description 7
- 229910021341 titanium silicide Inorganic materials 0.000 claims description 6
- 239000011521 glass Substances 0.000 claims description 3
- 238000002425 crystallisation Methods 0.000 claims description 2
- 230000008025 crystallization Effects 0.000 claims description 2
- 238000013500 data storage Methods 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 239000003989 dielectric material Substances 0.000 abstract description 7
- 230000015572 biosynthetic process Effects 0.000 abstract description 4
- 239000010408 film Substances 0.000 description 656
- 239000010410 layer Substances 0.000 description 93
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 48
- 229910052581 Si3N4 Inorganic materials 0.000 description 31
- 239000011229 interlayer Substances 0.000 description 31
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 31
- 238000005530 etching Methods 0.000 description 29
- 229920002120 photoresistant polymer Polymers 0.000 description 24
- 230000008569 process Effects 0.000 description 21
- 238000002955 isolation Methods 0.000 description 16
- 238000001312 dry etching Methods 0.000 description 13
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 12
- 229910052698 phosphorus Inorganic materials 0.000 description 12
- 239000011574 phosphorus Substances 0.000 description 12
- 125000006850 spacer group Chemical group 0.000 description 11
- 239000012298 atmosphere Substances 0.000 description 10
- 229910008484 TiSi Inorganic materials 0.000 description 9
- 238000004544 sputter deposition Methods 0.000 description 9
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 8
- 230000007547 defect Effects 0.000 description 8
- 239000000463 material Substances 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- 239000004020 conductor Substances 0.000 description 6
- 238000003754 machining Methods 0.000 description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 5
- 238000005498 polishing Methods 0.000 description 5
- 229910010421 TiNx Inorganic materials 0.000 description 4
- 229910052454 barium strontium titanate Inorganic materials 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 229910001873 dinitrogen Inorganic materials 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- 239000012299 nitrogen atmosphere Substances 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910019001 CoSi Inorganic materials 0.000 description 2
- 230000002378 acidificating effect Effects 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- HTXDPTMKBJXEOW-UHFFFAOYSA-N dioxoiridium Chemical compound O=[Ir]=O HTXDPTMKBJXEOW-UHFFFAOYSA-N 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910000457 iridium oxide Inorganic materials 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000005546 reactive sputtering Methods 0.000 description 2
- 230000008439 repair process Effects 0.000 description 2
- 229910052707 ruthenium Inorganic materials 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- NXHILIPIEUBEPD-UHFFFAOYSA-H tungsten hexafluoride Chemical compound F[W](F)(F)(F)(F)F NXHILIPIEUBEPD-UHFFFAOYSA-H 0.000 description 2
- -1 tungsten nitride Chemical class 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- 229910015900 BF3 Inorganic materials 0.000 description 1
- 241000293849 Cordylanthus Species 0.000 description 1
- 229910016006 MoSi Inorganic materials 0.000 description 1
- 229910020684 PbZr Inorganic materials 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910002367 SrTiO Inorganic materials 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 229910011208 Ti—N Inorganic materials 0.000 description 1
- PWKWDCOTNGQLID-UHFFFAOYSA-N [N].[Ar] Chemical compound [N].[Ar] PWKWDCOTNGQLID-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052788 barium Inorganic materials 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- YXTPWUNVHCYOSP-UHFFFAOYSA-N bis($l^{2}-silanylidene)molybdenum Chemical compound [Si]=[Mo]=[Si] YXTPWUNVHCYOSP-UHFFFAOYSA-N 0.000 description 1
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- NKZSPGSOXYXWQA-UHFFFAOYSA-N dioxido(oxo)titanium;lead(2+) Chemical compound [Pb+2].[O-][Ti]([O-])=O NKZSPGSOXYXWQA-UHFFFAOYSA-N 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007687 exposure technique Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910021344 molybdenum silicide Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910017464 nitrogen compound Inorganic materials 0.000 description 1
- 150000002830 nitrogen compounds Chemical class 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229920001709 polysilazane Polymers 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 229910052712 strontium Inorganic materials 0.000 description 1
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- HSXKFDGTKKAEHL-UHFFFAOYSA-N tantalum(v) ethoxide Chemical compound [Ta+5].CC[O-].CC[O-].CC[O-].CC[O-].CC[O-] HSXKFDGTKKAEHL-UHFFFAOYSA-N 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/7687—Thin films associated with contacts of capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02359—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the surface groups of the insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
- H10B12/482—Bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
시료번호 | 방 법 | 계면상황 | 비 고 |
1 | W/TiN/Ti | 박리 발생 | |
2 | W/TiN/TiNx | 박리 발생 | X=10% |
3 | W/TiN/TiNx | 박리 발생 | X=15% |
4 | W/TiN/TiNx | 박리 발생 | X=20% |
5 | W/TiN | 박리 없음 | |
6 | W | 박리 없음 |
Claims (19)
- 반도체 기판의 주면 상에 형성된 산화 실리콘계의 제1 절연막의 상부에, 적어도 그 일부가 상기 제1 절연막과 접하도록 연장하여 있는 배선이 형성되고, 상기 배선의 상부에 형성된 제2 절연막의 상부에 적어도 그 일부가 고유전체막으로 구성된 용량절연막을 가지는 용량소자가 형성된 반도체 집적회로장치로서, 상기 배선을 구성하는 도전막은 상기 제1 절연막 상에서 상기 제1 절연막과 접하는 부분이 티탄을 제외한 고융점 금속, 또는 고융점 금속의 질화물로 이루어지는 것을 특징으로 하는 반도체 집적회로장치.
- 반도체 기판의 주면 상의 제1 영역에, 워드선과 일체로 구성된 게이트 전극을 구비한 메모리셀 선택용 MISFET이 형성되고, 상기 메모리셀 선택용 MISFET을 피복하는 산화 실리콘계의 제1 절연막의 상부에 상기 메모리셀 선택용 MISFET의 소스, 드레인의 한쪽과 전기적으로 접속되며, 또한 상기 제1 절연막과 접하도록 연장하여 있는 비트선이 형성되고, 상기 비트선의 상부에 형성된 제2 절연막의 상부에 상기 메모리셀 선택용 MISFET의 소스, 드레인의 다른 쪽과 전기적으로 접속되며, 또한 적어도 그 일부가 고유전체막으로 구성된 용량절연막을 가지는 정보축적용 용량소자가 형성된 DRAM을 가지는 반도체 집적회로장치로서, 상기 비트선을 구성하는 도전막은 상기 제1 절연막 상에서 상기 제1 절연막과 접하는 부분이 티탄을 제외한 고융점 금속, 또는 고융점 금속의 질화물로 이루어지는 것을 특징으로 하는 반도체 집적회로장치.
- 제 2항에 있어서,상기 고유전체막은, 결정화를 위한 열처리를 행한 산화 탄탈막인 것을 특징으로 하는 반도체 집적회로장치.
- 제 2항에 있어서,상기 메모리셀 선택용 MISFET의 게이트 전극을 구성하는 도전막은, 적어도 그 일부가 금속막으로 구성되어 있는 것을 특징으로 하는 반도체 집적회로장치.
- 제 2항에 있어서,상기 반도체 기판의 주면 상의 제2 영역에 상기 DRAM의 주변회로의 MISFET이 형성되고, 상기 주변회로의 MISFET을 덮는 상기 산화 실리콘계의 제1 절연막의 상부에 상기 주변회로의 MISFET의 게이트 전극, 소스 또는 드레인 중 어느 하나와 전기적으로 접속되고, 또한 상기 제1 절연막과 접하도록 연장하여 있는 제1층째의 배선이 형성되며, 상기 제1층째의 배선을 구성하는 도전막은 상기 제1 절연막 상에서 상기 제1 절연막과 계면을 접하는 부분이 티탄을 제외한 고융점 금속, 또는 고융점 금속의 질화물로 이루어지는 것을 특징으로 하는 반도체 집적회로장치.
- 제 5항에 있어서,상기 제1 절연막에 개공(開孔)되고, 상기 제1층째의 배선과 상기 주변회로의 MISFET의 소스 또는 드레인을 전기적으로 접속하는 콘택트홀의 저부에는 티탄실리사이드층이 형성되어 있는 것을 특징으로 하는 반도체 집적회로장치.
- 제 5항에 있어서,상기 비트선 및 상기 제1층째의 배선의 각각을 구성하는 상기 도전막은, 텅스텐막인 것을 특징으로 하는 반도체 집적회로장치.
- 제 5항에 있어서,상기 제1층째의 배선은 상기 콘택트홀의 내부에 형성되고, 티탄막과 장벽 금속막의 적층막, 또는 티탄막과 장벽금속막과 텅스텐막의 적층막으로 구성된 플러그를 통하여 상기 주변회로의 MISFET의 소스 또는 드레인과 전기적으로 접속되어 있는 것을 특징으로 하는 반도체 집적회로장치.
- 제 5항에 있어서,상기 주변회로의 MISFET의 게이트전극은, 금속막으로 구성되어 있는 것을 특징으로 하는 반도체 집적회로장치.
- 제 5항에 있어서,상기 제1 절연막은 스핀·온·글래스(spin-on-glass)막 또는 CVD 법으로 퇴적한 산화 실리콘막인 것을 특징으로 하는 반도체 집적회로장치.
- 제 5항에 있어서,상기 정보축적용 용량소자의 상부에 형성된 산화 실리콘계의 제3 절연막의 상부에, 상기 제1층째의 배선과 전기적으로 접속된 제2층째의 배선이 형성되고, 상기 제2층째의 배선을 구성하는 도전막은 적어도 상기 제3 절연막과 접하는 부분이 티탄막인 것을 특징으로 하는 반도체 집적회로장치.
- (a)반도체 기판의 주면 상에 산화 실리콘계의 제1 절연막을 형성한 후, 상기 제1 절연막의 상부에 상기 제1 절연막 상에서 상기 제1 절연막과 접하는 부분이 티탄을 제외한 고융점 금속, 또는 티탄을 포함하는 고융점 금속의 질화물로 이루어지는 도전막을 퇴적하는 공정,(b)상기 도전막을 패터닝함으로써 적어도 그 일부가 상기 제1 절연막과 접하도록 연장하여 있는 배선을 형성한 후, 상기 배선의 상부에 제2 절연막을 형성하는 공정,(c) 상기 제2 절연막의 상부에 제1 전극, 유전체막, 제2 전극으로 구성된 용량소자를 형성하는 공정을 가지며,상기 용량소자의 형성공정은 상기 유전체의 막질을 개선하기 위한 열처리공정을 포함하는 것을 특징으로 하는 반도체 집적회로장치의 제조방법.
- (a)반도체 기판의 주면 상의 제1 영역에 DRAM의 메모리셀을 구성하는 메모리셀 선택용 MISFET을 형성하고, 상기 반도체 기판의 주면 상의 제2 영역에 상기 DRAM의 주변회로를 구성하는 MISFET을 형성하는 공정,(b)상기 메모리셀 선택용 MISFET 및 상기 주변회로의 MISFET의 각각의 상부에 산화 실리콘계의 제1 절연막을 형성하는 공정,(c)상기 메모리셀 선택용 MISFET의 소스, 드레인의 적어도 한쪽의 상부의 상기 제1 절연막에 제1 콘택트홀을 형성하고, 상기 주변회로의 MISFET의 소스 및 드레인의 각각의 상부의 상기 제1 절연막에 제2 콘택트홀을 형성하며, 상기 주변회로의 MISFET의 게이트 전극의 상부의 상기 제1 절연막에 제3 콘택트홀을 형성하는 공정,(d)상기 제2 콘택트홀 및 상기 제3 콘택트홀의 각각의 내부 및 상기 제1 절연막의 상부에 티탄막을 퇴적한 후, 상기 반도체 기판을 열처리함으로써, 상기 제2 콘택트홀의 저부에 노출한 상기 주변회로의 MISFET의 소스 및 드레인의 각각의 표면에 티탄실리사이드층을 형성하는 공정,(e)상기 제2 콘택트홀 및 상기 제3 콘택트홀의 각각의 내부를 포함하는 상기 티탄막의 상부에 장벽 금속막, 또는 상기 장벽 금속막과 티탄을 제외한 고융점 금속막의 적층막을 퇴적한 후, 상기 제1 절연막의 상부의 상기 장벽 금속막 또는 상기 적층막을 상기 티탄막과 함께 제거하는 것에 의해, 상기 제2 콘택트홀 및 상기 제3 콘택트홀의 각각의 내부에 플러그를 형성하는 공정,(f)상기 제1 절연막의 상부에, 적어도 상기 제1 절연막과 접하는 부분이 티탄을 제외한 고융점 금속, 또는 고융점 금속의 질화물로 이루어지는 도전막을 퇴적하는 공정,(g)상기 도전막을 패터닝하는 것에 의해 상기 제1 콘택트홀을 통하여 상기 메모리셀 선택용 MISFET의 소스, 드레인의 한쪽과 전기적으로 접속되는 비트선을 형성하고, 상기 제2 콘택트홀 또는 상기 제3 콘택트홀을 통하여 상기 주변회로의 MISFET과 전기적으로 접속되는 주변회로의 제1층째의 배선을 형성하는 공정,(h)상기 제2 절연막의 상부에 제1 전극, 유전체막, 제2 전극으로 구성된 정보축적용 용량소자를 형성하는 공정을 가지고,상기 용량소자의 형성공정은 상기 유전체막의 막질을 개선하기 위한 열처리공정을 포함하는 것을 특징으로 하는 반도체 집적회로장치의 제조방법.
- 제 13항에 있어서,상기 메모리셀 선택용 MISFET의 게이트 전극 및 상기 주변회로의 MISFET의 게이트 전극의 각각을 구성하는 도전막은, 불순물이 도핑된 저저항 다결정 실리콘막과 장벽 금속막과 텅스텐막의 적층막인 것을 특징으로 하는 반도체 집적회로장치의 제조방법.
- 제 13항에 있어서,상기 비트선 및 상기 주변회로의 제1층째의 배선은, 텅스텐막인 것을 특징으로 하는 반도체 집적회로장치의 제조방법.
- 제 13항에 있어서,상기 유전체막은 금속 산화물로 이루어지는 것을 특징으로 하는 반도체 집적회로장치의 제조방법.
- 제 16항에 있어서,상기 금속 산화물은 산화 탄탈인 것을 특징으로 하는 반도체 집적회로장치의 제조방법.
- 제 13 항에 있어서,상기 유전체막의 막질을 개선하기 위한 열처리온도가 750℃ 이상인 것을 특징으로 하는 반도체 집적회로장치의 제조방법.
- (a)반도체 기판의 주면상의 제1 영역에 DRAM의 메모리셀을 구성하는 메모리셀 선택용 MISFET을 형성하고, 상기 반도체 기판의 주면상의 제2 영역에 상기 DRAM의 주변회로를 구성하는 MISFET을 형성하는 공정,(b)상기 메모리셀 선택용 MISFET 및 상기 주변회로의 MISFET의 각각의 상부에 산화 실리콘계의 제1 절연막을 형성하는 공정,(c)상기 메모리셀 선택용 MISFET의 소스, 드레인의 적어도 한쪽의 상부의 상기 제1 절연막에 제1 콘택트홀을 형성하고, 상기 주변회로의 MISFET의 소스 및 드레인의 각각의 상부의 상기 제1 절연막에 제2 콘택트홀을 형성하며, 상기 주변회로의 MISFET의 게이트 전극의 상부의 상기 제1 절연막에 제3 콘택트홀을 형성하는 공정,(d)상기 제2 콘택트홀 및 상기 제3 콘택트홀의 각각의 내부 및 상기 제1 절연막의 상부에 코발트막을 퇴적한 후, 상기 반도체 기판을 열처리함으로써, 상기 제2 콘택트홀의 저부에 노출한 상기 주변회로의 MISFET의 소스 및 드레인의 각각의 표면에 코발트실리사이드층을 형성하는 공정,(e)상기 제2 콘택트홀 및 상기 제3 콘택트홀의 각각의 내부를 포함하는 상기 코발트막의 상부에 장벽 금속막, 또는 상기 장벽 금속막과 코발트를 제외한 고융점 금속막의 적층막을 퇴적한 후, 상기 제1 절연막의 상부의 상기 장벽 금속막 또는 상기 적층막을 상기 코발트막과 함께 제거함으로써, 상기 제2 콘택트홀 및 상기 제3 콘택트홀의 각각의 내부에 플러그를 형성하는 공정,(f)상기 제1 절연막의 상부에 적어도 상기 제1 절연막과 접하는 부분이 코발트를 제외한 고융점 금속, 또는 고융점 금속의 질화물로 이루어지는 도전막을 퇴적하는 공정,(g)상기 도전막을 패터닝함으로써, 상기 제1 콘택트홀을 통하여 상기 메모리셀 선택용 MISFET의 소스, 드레인의 한쪽과 전기적으로 접속되는 비트선을 형성하고, 상기 제2 콘택트홀 또는 상기 제3 콘택트홀을 통하여 상기 주변회로의 MISFET과 전기적으로 접속되는 주변회로의 제1층째의 배선을 형성하는 공정,(h)상기 제2 절연막의 상부에 제1 전극, 유전체막, 제2 전극으로 구성된 정보축적용 용량소자를 형성하는 공정을 가지며,상기 용량소자의 형성공정은 상기 유전체막의 막질을 개선하기 위한 열처리공정을 포함하는 것을 특징으로 하는 반도체 집적회로장치의 제조방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP98-012614 | 1998-01-26 | ||
JP01261498A JP3686248B2 (ja) | 1998-01-26 | 1998-01-26 | 半導体集積回路装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR19990068074A true KR19990068074A (ko) | 1999-08-25 |
KR100699335B1 KR100699335B1 (ko) | 2007-03-26 |
Family
ID=11810265
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019990001957A KR100699335B1 (ko) | 1998-01-26 | 1999-01-22 | 반도체 집적회로 장치 및 그 제조방법 |
Country Status (4)
Country | Link |
---|---|
US (3) | US6215144B1 (ko) |
JP (1) | JP3686248B2 (ko) |
KR (1) | KR100699335B1 (ko) |
TW (1) | TW508798B (ko) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100504550B1 (ko) * | 2000-12-19 | 2005-08-04 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
US7053005B2 (en) | 2000-05-02 | 2006-05-30 | Samsung Electronics Co., Ltd. | Method of forming a silicon oxide layer in a semiconductor manufacturing process |
US7179537B2 (en) | 2000-05-02 | 2007-02-20 | Samsung Electronics Co., Ltd. | Spin-on glass composition and method of forming silicon oxide layer in semiconductor manufacturing process using the same |
Families Citing this family (67)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6016390A (en) * | 1998-01-29 | 2000-01-18 | Artisan Components, Inc. | Method and apparatus for eliminating bitline voltage offsets in memory devices |
JP2000156480A (ja) * | 1998-09-03 | 2000-06-06 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2000307084A (ja) * | 1999-04-23 | 2000-11-02 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2000332216A (ja) * | 1999-05-18 | 2000-11-30 | Sony Corp | 半導体装置及びその製造方法 |
KR100309077B1 (ko) * | 1999-07-26 | 2001-11-01 | 윤종용 | 삼중 금속 배선 일 트랜지스터/일 커패시터 및 그 제조 방법 |
US6159818A (en) * | 1999-09-02 | 2000-12-12 | Micron Technology, Inc. | Method of forming a container capacitor structure |
US6337274B1 (en) * | 1999-12-06 | 2002-01-08 | Micron Technology, Inc. | Methods of forming buried bit line memory circuitry |
JP2001185552A (ja) * | 1999-12-27 | 2001-07-06 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
US20070114631A1 (en) * | 2000-01-20 | 2007-05-24 | Hidenori Sato | Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device |
JP2001203263A (ja) | 2000-01-20 | 2001-07-27 | Hitachi Ltd | 半導体集積回路装置の製造方法および半導体集積回路装置 |
JP4142228B2 (ja) * | 2000-02-01 | 2008-09-03 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
JP2001223268A (ja) * | 2000-02-07 | 2001-08-17 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP5020425B2 (ja) * | 2000-04-25 | 2012-09-05 | Azエレクトロニックマテリアルズ株式会社 | 微細溝をシリカ質材料で埋封する方法 |
KR100331568B1 (ko) * | 2000-05-26 | 2002-04-06 | 윤종용 | 반도체 메모리 소자 및 그 제조방법 |
KR100338781B1 (ko) * | 2000-09-20 | 2002-06-01 | 윤종용 | 반도체 메모리 소자 및 그의 제조방법 |
JP2002134715A (ja) * | 2000-10-23 | 2002-05-10 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2002319636A (ja) | 2001-02-19 | 2002-10-31 | Nec Corp | 半導体記憶装置及びその製造方法 |
US6511896B2 (en) * | 2001-04-06 | 2003-01-28 | Micron Technology, Inc. | Method of etching a substantially amorphous TA2O5 comprising layer |
US6780766B2 (en) * | 2001-04-06 | 2004-08-24 | Micron Technology, Inc. | Methods of forming regions of differing composition over a substrate |
JP2003051501A (ja) * | 2001-05-30 | 2003-02-21 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP4011870B2 (ja) * | 2001-08-09 | 2007-11-21 | 株式会社ルネサステクノロジ | 半導体集積回路装置の製造方法 |
KR100390919B1 (ko) * | 2001-09-05 | 2003-07-12 | 주식회사 하이닉스반도체 | 반도체소자의 제조방법 |
JP4012382B2 (ja) * | 2001-09-19 | 2007-11-21 | 株式会社ルネサステクノロジ | 半導体集積回路装置およびその製造方法 |
JP2003179157A (ja) * | 2001-12-10 | 2003-06-27 | Nec Corp | Mos型半導体装置 |
US6894341B2 (en) * | 2001-12-25 | 2005-05-17 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method |
KR100416608B1 (ko) * | 2002-01-16 | 2004-02-05 | 삼성전자주식회사 | 반도체 메모리 장치 및 그의 제조방법 |
FR2839581B1 (fr) * | 2002-05-07 | 2005-07-01 | St Microelectronics Sa | Circuit electronique comprenant un condensateur et au moins un composant semiconducteur, et procede de conception d'un tel circuit |
JP2003347423A (ja) * | 2002-05-28 | 2003-12-05 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
JP2004111414A (ja) * | 2002-09-13 | 2004-04-08 | Renesas Technology Corp | 半導体装置の製造方法 |
US7153776B2 (en) * | 2002-11-27 | 2006-12-26 | International Business Machines Corporation | Method for reducing amine based contaminants |
TWI225671B (en) * | 2003-04-07 | 2004-12-21 | Nanya Technology Corp | Method of forming bit line contact via |
TW584923B (en) * | 2003-04-10 | 2004-04-21 | Nanya Technology Corp | Bit line contact and method for forming the same |
JP2005116546A (ja) * | 2003-10-02 | 2005-04-28 | Toshiba Corp | 半導体装置およびその製造方法 |
US7309742B2 (en) * | 2003-11-14 | 2007-12-18 | Fina Technology, Inc. | Impact copolymer with optimized melt flow, stiffness, and low-temperature impact resistance |
KR100582356B1 (ko) * | 2003-12-29 | 2006-05-22 | 주식회사 하이닉스반도체 | 반도체소자의 메탈콘택 제조 방법 |
US7037840B2 (en) * | 2004-01-26 | 2006-05-02 | Micron Technology, Inc. | Methods of forming planarized surfaces over semiconductor substrates |
KR100626378B1 (ko) * | 2004-06-25 | 2006-09-20 | 삼성전자주식회사 | 반도체 장치의 배선 구조체 및 그 형성 방법 |
US7772108B2 (en) * | 2004-06-25 | 2010-08-10 | Samsung Electronics Co., Ltd. | Interconnection structures for semiconductor devices and methods of forming the same |
US20050287793A1 (en) * | 2004-06-29 | 2005-12-29 | Micron Technology, Inc. | Diffusion barrier process for routing polysilicon contacts to a metallization layer |
US20060157776A1 (en) * | 2005-01-20 | 2006-07-20 | Cheng-Hung Chang | System and method for contact module processing |
JP2006245113A (ja) * | 2005-03-01 | 2006-09-14 | Elpida Memory Inc | 半導体記憶装置の製造方法 |
JP2006302987A (ja) * | 2005-04-18 | 2006-11-02 | Nec Electronics Corp | 半導体装置およびその製造方法 |
KR100634251B1 (ko) * | 2005-06-13 | 2006-10-13 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
US7473637B2 (en) | 2005-07-20 | 2009-01-06 | Micron Technology, Inc. | ALD formed titanium nitride films |
US7482221B2 (en) * | 2005-08-15 | 2009-01-27 | Infineon Technologies Ag | Memory device and method of manufacturing a memory device |
KR100689712B1 (ko) * | 2006-03-23 | 2007-03-08 | 삼성전자주식회사 | 반도체 메모리 소자의 제조방법 및 그 구조 |
US7435648B2 (en) * | 2006-07-26 | 2008-10-14 | Macronix International Co., Ltd. | Methods of trench and contact formation in memory cells |
JP4362785B2 (ja) * | 2006-09-28 | 2009-11-11 | エルピーダメモリ株式会社 | 半導体装置の製造方法 |
JP5204964B2 (ja) * | 2006-10-17 | 2013-06-05 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
EP2142682B1 (en) * | 2007-04-09 | 2014-12-03 | President and Fellows of Harvard College | Cobalt nitride layers for copper interconnects and methods for forming them |
JP2008311457A (ja) * | 2007-06-15 | 2008-12-25 | Renesas Technology Corp | 半導体装置の製造方法 |
US8067803B2 (en) * | 2008-10-16 | 2011-11-29 | Micron Technology, Inc. | Memory devices, transistor devices and related methods |
KR101525499B1 (ko) * | 2009-02-27 | 2015-06-03 | 삼성전자주식회사 | 캐패시터 언더 비트라인 구조를 갖는 반도체 소자의 제조방법 |
KR101095699B1 (ko) * | 2009-11-24 | 2011-12-20 | 주식회사 하이닉스반도체 | 반도체 소자의 레저부아 캐패시터 및 그 제조 방법 |
EP2513966B1 (en) | 2009-12-18 | 2020-09-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US8222103B1 (en) * | 2011-02-15 | 2012-07-17 | Globalfoundries Inc. | Semiconductor device with embedded low-K metallization |
JP2012221965A (ja) * | 2011-04-04 | 2012-11-12 | Elpida Memory Inc | 半導体記憶装置及びその製造方法 |
US9972624B2 (en) * | 2013-08-23 | 2018-05-15 | Qualcomm Incorporated | Layout construction for addressing electromigration |
JP2015103708A (ja) * | 2013-11-26 | 2015-06-04 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置およびその製造方法 |
US20160020270A1 (en) * | 2014-02-11 | 2016-01-21 | SK Hynix Inc. | Metal-insulator-metal capacitor, electronic device including the same, and method of fabricating the same |
CN106374039B (zh) * | 2015-07-22 | 2019-03-12 | 旺宏电子股份有限公司 | 存储器装置与其制造方法 |
US9583536B2 (en) * | 2015-07-23 | 2017-02-28 | Macronix International Co., Ltd. | Memory device and method for manufacturing the same |
US10157780B2 (en) * | 2016-11-29 | 2018-12-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a device having a doping layer and device formed |
US10431494B2 (en) * | 2018-01-29 | 2019-10-01 | International Business Machines Corporation | BEOL self-aligned interconnect structure |
CN114050156A (zh) * | 2020-01-21 | 2022-02-15 | 福建省晋华集成电路有限公司 | 存储器 |
US11342332B2 (en) * | 2020-06-23 | 2022-05-24 | Winbond Electronics Corp. | Memory structure and manufacturing method therefor |
KR20230107027A (ko) | 2022-01-07 | 2023-07-14 | 삼성전자주식회사 | 반도체 소자 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01222469A (ja) | 1988-03-01 | 1989-09-05 | Fujitsu Ltd | 半導体記憶装置とその製造方法 |
US5739579A (en) * | 1992-06-29 | 1998-04-14 | Intel Corporation | Method for forming interconnections for semiconductor fabrication and semiconductor device having such interconnections |
JPH0629240A (ja) | 1992-07-07 | 1994-02-04 | Seiko Epson Corp | 半導体装置並びにその製造方法 |
JP3196399B2 (ja) * | 1993-02-09 | 2001-08-06 | ソニー株式会社 | 層間絶縁膜の形成方法 |
US5383088A (en) * | 1993-08-09 | 1995-01-17 | International Business Machines Corporation | Storage capacitor with a conducting oxide electrode for metal-oxide dielectrics |
JPH07161934A (ja) * | 1993-12-06 | 1995-06-23 | Hitachi Ltd | 半導体装置およびその製造方法 |
JPH08181212A (ja) | 1994-12-26 | 1996-07-12 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
KR100193100B1 (ko) * | 1995-02-02 | 1999-06-15 | 모리시다 요이치 | 반도체장치 및 그 제조방법 |
US5654589A (en) * | 1995-06-06 | 1997-08-05 | Advanced Micro Devices, Incorporated | Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application |
JP3630334B2 (ja) * | 1995-07-31 | 2005-03-16 | 松下電器産業株式会社 | 半導体装置の製造方法 |
JP3241242B2 (ja) | 1995-09-22 | 2001-12-25 | 株式会社東芝 | 半導体記憶装置の製造方法 |
SG54456A1 (en) * | 1996-01-12 | 1998-11-16 | Hitachi Ltd | Semconductor integrated circuit device and method for manufacturing the same |
US6004839A (en) * | 1996-01-17 | 1999-12-21 | Nec Corporation | Semiconductor device with conductive plugs |
JPH09321242A (ja) * | 1996-05-30 | 1997-12-12 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
US5764563A (en) * | 1996-09-30 | 1998-06-09 | Vlsi Technology, Inc. | Thin film load structure |
KR100243272B1 (ko) * | 1996-12-20 | 2000-03-02 | 윤종용 | 반도체 소자의 콘택 플러그 형성방법 |
JP3697044B2 (ja) * | 1997-12-19 | 2005-09-21 | 株式会社ルネサステクノロジ | 半導体集積回路装置およびその製造方法 |
-
1998
- 1998-01-26 JP JP01261498A patent/JP3686248B2/ja not_active Expired - Lifetime
-
1999
- 1999-01-18 TW TW088100718A patent/TW508798B/zh not_active IP Right Cessation
- 1999-01-22 KR KR1019990001957A patent/KR100699335B1/ko not_active IP Right Cessation
- 1999-01-25 US US09/236,223 patent/US6215144B1/en not_active Expired - Lifetime
-
2001
- 2001-04-09 US US09/828,201 patent/US6399438B2/en not_active Expired - Lifetime
-
2002
- 2002-05-31 US US10/157,977 patent/US6638811B2/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7053005B2 (en) | 2000-05-02 | 2006-05-30 | Samsung Electronics Co., Ltd. | Method of forming a silicon oxide layer in a semiconductor manufacturing process |
US7179537B2 (en) | 2000-05-02 | 2007-02-20 | Samsung Electronics Co., Ltd. | Spin-on glass composition and method of forming silicon oxide layer in semiconductor manufacturing process using the same |
KR100504550B1 (ko) * | 2000-12-19 | 2005-08-04 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
Also Published As
Publication number | Publication date |
---|---|
US6399438B2 (en) | 2002-06-04 |
TW508798B (en) | 2002-11-01 |
JPH11214644A (ja) | 1999-08-06 |
US20020182798A1 (en) | 2002-12-05 |
US6215144B1 (en) | 2001-04-10 |
US6638811B2 (en) | 2003-10-28 |
JP3686248B2 (ja) | 2005-08-24 |
KR100699335B1 (ko) | 2007-03-26 |
US20010023099A1 (en) | 2001-09-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100699335B1 (ko) | 반도체 집적회로 장치 및 그 제조방법 | |
KR100681851B1 (ko) | 반도체집적회로장치 및 그 제조방법 | |
KR100661425B1 (ko) | 반도체 집적 회로 장치 및 그 제조 방법 | |
JPH1117124A (ja) | 半導体装置およびその製造方法 | |
JP2003188281A (ja) | 半導体装置及びその製造方法 | |
KR20000017559A (ko) | 반도체 집적회로장치의 제조방법 | |
US20030015742A1 (en) | Semiconductor memory and method for fabricating the same | |
KR20000023044A (ko) | 반도체집적회로장치의 제조방법 | |
US6762445B2 (en) | DRAM memory cell with dummy lower electrode for connection between upper electrode and upper layer interconnect | |
KR100399072B1 (ko) | 강유전체 메모리 소자의 제조 방법 | |
JP3943294B2 (ja) | 半導体集積回路装置 | |
JP3269528B2 (ja) | 容量素子を有する半導体装置及びその製造方法 | |
US6184079B1 (en) | Method for fabricating a semiconductor device | |
US6180970B1 (en) | Microelectronic devices including ferroelectric capacitors with lower electrodes extending into contact holes | |
US7141471B2 (en) | Method of producing semiconductor integrated circuit device and semiconductor integrated circuit device | |
KR100345631B1 (ko) | 반도체 장치 및 그 제조 방법 | |
JP3645463B2 (ja) | 半導体集積回路装置 | |
KR20010014841A (ko) | 반도체 집적회로장치 및 그 제조방법 | |
US6723612B2 (en) | Semiconductor integrated circuit device and method of manufacturing the same | |
KR100450684B1 (ko) | 비아식각저지막을 이용하는 강유전체 메모리 소자 및 그제조방법 | |
JPH11297951A (ja) | 半導体集積回路装置およびその製造方法 | |
JPH11186522A (ja) | 半導体集積回路装置およびその製造方法 | |
JP2001217407A (ja) | 半導体集積回路装置およびその製造方法 | |
JP2006203255A (ja) | 半導体集積回路装置の製造方法 | |
KR20040059750A (ko) | 반도체 장치의 캐패시터 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20130227 Year of fee payment: 7 |
|
FPAY | Annual fee payment |
Payment date: 20140220 Year of fee payment: 8 |
|
FPAY | Annual fee payment |
Payment date: 20150224 Year of fee payment: 9 |
|
FPAY | Annual fee payment |
Payment date: 20160317 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20170310 Year of fee payment: 11 |
|
FPAY | Annual fee payment |
Payment date: 20180309 Year of fee payment: 12 |
|
EXPY | Expiration of term |