JP6449821B2 - 広禁止帯幅半導体装置 - Google Patents
広禁止帯幅半導体装置 Download PDFInfo
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- JP6449821B2 JP6449821B2 JP2016154508A JP2016154508A JP6449821B2 JP 6449821 B2 JP6449821 B2 JP 6449821B2 JP 2016154508 A JP2016154508 A JP 2016154508A JP 2016154508 A JP2016154508 A JP 2016154508A JP 6449821 B2 JP6449821 B2 JP 6449821B2
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- 239000004065 semiconductor Substances 0.000 title claims description 174
- 239000012212 insulator Substances 0.000 claims description 55
- 239000002019 doping agent Substances 0.000 claims description 33
- 239000000463 material Substances 0.000 claims description 14
- 229910052710 silicon Inorganic materials 0.000 claims description 12
- 239000010703 silicon Substances 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 230000000295 complement effect Effects 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 210000000746 body region Anatomy 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 2
- 230000005684 electric field Effects 0.000 description 22
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 238000001465 metallisation Methods 0.000 description 9
- 238000000034 method Methods 0.000 description 8
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 6
- 230000007704 transition Effects 0.000 description 5
- 230000000903 blocking effect Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 229910010271 silicon carbide Inorganic materials 0.000 description 4
- 239000013598 vector Substances 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 238000010304 firing Methods 0.000 description 3
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 2
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 2
- 239000002800 charge carrier Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
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Description
が適用され得る。ここで、ε1(x)/d1は第1の距離に沿って有効な第1の誘電率であり、ε2(x)/d2は第2の距離に沿って有効な第2の誘電率である。
1−1 活性領域
1−2 縁部領域
10 半導体ボディ
11 第1の負荷端子
12 第2の負荷端子
13 制御端子
14 トレンチ
14−1 底部領域
14−2 頂部領域
14−3 トレンチ角領域
15 導電経路
16 ガード区域
101 ドリフト区域
101−1 メサ部
101−10 基準点
102 ソース区域
103 隣接区域
103−1 ボディ区域
103−2 シールド区域
103−20 第1の点
111 金属化部
113 制御端子
121 金属化部
131 第1の電極
131−1 下端
131−10 第2の点
132 第2の電極
132−1 下端
141 絶縁体
142 底部
151 半導体領域
161 ガードリング
162 ガードリング
t1 第1の厚さ
t2 第2の厚さ
t3 第3の厚さ
t4 第4の厚さ
X 第1の横方向
Y 第2の横方向
Z 垂直方向
Claims (7)
- 第1の負荷端子(11)と、第2の負荷端子(12)と、制御端子(13)と、ドリフト区域(101)を有する半導体ボディ(10)とを含む半導体装置(1)であって、前記半導体ボディ(10)はシリコンの禁止帯幅より大きい禁止帯幅を有する半導体材料により形成され、かつ前記第1の負荷端子(11)と前記第2の負荷端子(12)との間に負荷電流を導くように構成され、前記半導体装置(1)は、
− 前記半導体ボディ(10)内に配置され、かつ前記第1の負荷端子(11)へ電気的に接続されるソース区域(102)と、
− 前記半導体ボディ(10)内に配置され、かつ前記ドリフト区域(101)から前記ソース区域(102)を絶縁する隣接区域(103)であって、ボディ区域(103−1)とシールド区域(103−2)とにより形成され、前記シールド区域(103−2)は、前記第1の負荷端子(11)へ電気的に接続される、隣接区域(103)と、
− 垂直方向(Z)に沿って前記半導体ボディ(10)中に延びるトレンチ(14)であって、前記制御端子(13)へ電気的に接続される第1の電極(131)と、前記隣接区域(103)に接触し、前記半導体ボディ(10)から前記第1の電極(131)を絶縁する絶縁体(141)とを含むトレンチ(14)と
を含み、
− 前記絶縁体(141)は、前記トレンチ(14)の底部領域(14−1)において垂直方向(Z)に沿った第1の厚さ(t1)と、前記トレンチ(14)の頂部領域(14−2)において第1の横方向(X)に沿った第2の厚さ(t2)とを呈示し、前記第1の厚さ(t1)は前記第2の厚さ(t2)より少なくとも1.5倍大きく、および
− 前記隣接区域(103)は、前記絶縁体(141)に接触して配置され、かつ前記垂直方向(Z)に沿って前記トレンチ(14)より遠くまで延び、前記トレンチ(14)の前記底部領域(14−1)および前記隣接区域(103)は、前記シールド区域(103−2)の下部が前記トレンチ(14)の前記底部領域(14−1)の底面の一部と接するように前記第1の横方向(X)に沿って重なりを呈示し、
前記シールド区域(103−2)の上部のドーパント濃度は、前記ボディ区域(103−1)のドーパント濃度より高く、前記シールド区域(103−2)の前記下部のドーパント濃度は、前記ボディ区域(103−1)のドーパント濃度未満である半導体装置(1)。 - 前記第2の厚さ(t2)は、少なくとも30nmになる、請求項1に記載の半導体装置(1)。
- 前記底部領域(14−1)および前記シールド区域(103−2)は、前記重なりを呈示する、請求項1または2に記載の半導体装置(1)。
- 前記ドリフト区域(101)およびソース区域(102)は、それぞれ第1の導電型のドーパントを含み、前記隣接区域(103)は、前記第1の導電型と相補的な第2の導電型のドーパントを含む、請求項1〜3のいずれか一項に記載の半導体装置(1)。
- 前記第1の電極(131)は、前記制御端子(13)から制御信号を受信するように構成され、前記半導体装置(1)は、前記制御信号に基づいて導電状態と遮断状態とのうちの1つに設定されるように構成され、前記遮断状態では、前記隣接区域(103)と前記ドリフト区域(101)とにより形成される空乏領域は、前記第1の負荷端子(11)と前記第2の負荷端子(12)との間の電圧を遮断するように構成される、請求項1〜4のいずれか一項に記載の半導体装置(1)。
- 前記トレンチ(14)の前記絶縁体(141)は、前記ドリフト区域(101)、前記ソース区域(102)および前記隣接区域(103)のそれぞれに接触する、請求項1〜5のいずれか一項に記載の半導体装置(1)。
- 前記絶縁体(141)は、二酸化シリコン、窒化シリコンおよび低k誘電体のうちの少なくとも1つを含む、請求項1〜6のいずれか一項に記載の半導体装置(1)。
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