JP6417432B2 - ショットキー・ダイオード - Google Patents
ショットキー・ダイオード Download PDFInfo
- Publication number
- JP6417432B2 JP6417432B2 JP2017017499A JP2017017499A JP6417432B2 JP 6417432 B2 JP6417432 B2 JP 6417432B2 JP 2017017499 A JP2017017499 A JP 2017017499A JP 2017017499 A JP2017017499 A JP 2017017499A JP 6417432 B2 JP6417432 B2 JP 6417432B2
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- JP
- Japan
- Prior art keywords
- semiconductor device
- layer
- schottky
- drift layer
- schottky diode
- Prior art date
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- 230000004888 barrier function Effects 0.000 claims description 58
- 239000004065 semiconductor Substances 0.000 claims description 49
- 230000002441 reversible effect Effects 0.000 claims description 43
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- 229910052751 metal Inorganic materials 0.000 claims description 29
- 239000002184 metal Substances 0.000 claims description 29
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 13
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 12
- 229910052715 tantalum Inorganic materials 0.000 claims description 10
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 10
- 239000010936 titanium Substances 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000011651 chromium Substances 0.000 claims description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052804 chromium Inorganic materials 0.000 claims description 2
- 238000000034 method Methods 0.000 description 25
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- 229910052581 Si3N4 Inorganic materials 0.000 description 2
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- 229910000907 nickel aluminide Inorganic materials 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- HZEWFHLRYVTOIW-UHFFFAOYSA-N [Ti].[Ni] Chemical compound [Ti].[Ni] HZEWFHLRYVTOIW-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
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- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- PEUPIGGLJVUNEU-UHFFFAOYSA-N nickel silicon Chemical compound [Si].[Ni] PEUPIGGLJVUNEU-UHFFFAOYSA-N 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
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- 238000002161 passivation Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
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Description
[0001] 本願は、本願と同時に提出され「EDGE TERMINATION STRUCTURE EMPLOYING RECESSES FOR EDGE TERMINATION ELEMENT(エッジ終端エレメントのための凹部を用いるエッジ終端構造)」と題された米国ユーティリティー・パテント出願第 号と、本願と同時に提出され「SCHOTTKY DIODE EMPLOYING RECESSES FOR ELEMENTS OF JUNCTION BARRIER ARRAY(接合障壁・アレイのエレメントのための凹部を用いるショットキー・ダイオード)」と題された米国ユーティリティー・パテント出願第 号とに関連し、この参照により、これらの開示の全体をここに組み込む。
[0002] 本開示は、半導体デバイスに関連する。
[0003] ショットキー・ダイオードは半導体金属接合を利用するが、これは、ショットキー障壁を提供するものであり、金属層とドープされた半導体層との間に生成される。N型半導体層を持つショットキー・ダイオードに関して、金属層はアノードとして働き、N型半導体層はカソードとして働く。一般に、ショットキー・ダイオードは、伝統的なp−nダイオードのように働き、順方向バイアスの方向において電流を容易に通過させ、逆方向バイアスの方向において電流を阻止する。半導体金属接合において提供されるショットキー障壁は、p−nダイオードに勝る2つの独特の利点を提供する。第1に、ショットキー障壁は、低い障壁高さと関連し、これは、低い順方向電圧低下と相関する。従って、デバイスのターン・オンに必要なのは小さい順方向電圧であり、電流が順方向バイアスの方向に流れることを可能にする。第2に、ショットキー障壁は、一般的に、同等のp−nダイオードよりもキャパシタンスが低い。キャパシタンスが低いことで、p−nダイオードよりも切り換え速度が速くなる。ショットキー・ダイオードは、多数キャリア・デバイスであり、切り換えにおける損失を生じさせる少数キャリアの挙動を示さない。
[0005] 本開示は、一般に、基板と、基板の上に設けられるドリフト層と、ドリフト層のアクティブ領域の上に設けられるショットキー層とを有するショットキー・ダイオードに関連する。ショットキー層のための金属と、ドリフト層のための半導体材料とは、ドリフト層とショットキー層との間に低い障壁高さのショットキー接合を提供するように、選択される。
[0011] この明細書に組み込まれ且つ一部を形成する添付の図面は、本開示の幾つかの構成を例示し、説明と共に本開示の原理を説明するために用いられる。
[0022] 以下で説明する実施形態は、ここで開示されたものを当業者が実施できるようにするために必要な情報であり、開示されたものを実施する際の最適の実施形態を例示する。当業者であれば、添付の図面を参照して以下の説明を読むことにより、ここで開示するものの概念を理解し、それらの概念の、ここでは特定的に説明しない応用についても認識するであろう。それらの概念および応用は、ここでの開示および特許請求の範囲の範囲内にあることを理解すべきである。
面から凹部ウェル34内へ延びる。
ある。第2のJB接合J3は、島型JBエレメント30”とドリフト層22との間での任意のp−n接合である。この実施形態では、ストライプ型JBエレメント30’は、P型材料により、島型JBエレメント30”と同じ又はそれより低い濃度にドープされると想定する。
アクティブ領域14の全表面範囲に対しての、低濃度にドープされたJBエレメント30’および高濃度にドープされたJBエレメント30”に占有されるアクティブ領域14の表面範囲の比率は、約2%ないし40%である。
定される。十分に大きい逆方向電圧がショットキー・ダイオード10へ印加されたとき、低濃度にドープされたJBエレメント30’の空乏層領域は、ドリフト層22と関連する空乏層領域へパンチスルーする。その結果として、大きい逆方向電流がショットキー・ダイオード10を通して流れることを可能とされる。低濃度にドープされたJBエレメント30’がアクティブ領域14にわたって分散されているので、この逆方向ブレークダウンは、ショットキー・ダイオード10を損傷させないように、均一に分散させること及び制御することができる。本質において、ショットキー・ダイオード10のブレークダウンは、低濃度にドープされたJBエレメント30’のパンチスルーに対して局所化され、それにより、ブレークダウン電流はアクティブ領域14にわたって均一に分散される。その結果、ショットキー・ダイオード10のブレークダウンの特徴は、ショットキー・ダイオード10を損傷または破壊することなく大きい逆方向電流が放散されるように、制御することができる。幾つかの実施形態では、低濃度にドープされたJBエレメント30’のドーピングは、パンチスルー電圧が、ショットキー・ダイオード10のエッジ終端によりサポートされ得る最大逆方向電圧よりも僅かに低くなるように、選択することができる。
レメント30、ガード・リング36、およびメサ・ガード・リング38は、ドリフト層22に形成され、ドリフト層22の上面にエッチングされた対応する凹部のところにある。アクティブ領域14において、複数のJBエレメント凹部40とメサ・ガード・リング38とは、ドリフト層22にエッチングされている。エッジ終端領域16では、エッジ終端凹部32がドリフト層22にエッチングされ、次に、ガード・リング凹部42が、エッジ終端凹部32の底面においてドリフト層22にエッチングされている。望まれる場合、凹部ウェル34は、エッジ終端凹部32を選択的にドープすることにより、形成することができる。JBエレメント凹部40、ガード・リング凹部42、メサ・ガード・リング凹部44、およびエッジ終端凹部32が形成されると、凹部の横側に沿った又は底部の範囲は選択的にドープされて、カップ型またはトラフ型のJBエレメント30、ガード・リング36、およびメサ・ガード・リング38が形成される。ドリフト層22に凹部をエッチングすることにより、JBエレメント30、ガード・リング36、およびメサ・ガード・リング38の個々のものを、より深いものとしてドリフト層22に形成することができる。述べたように、これはSiCデバイスには特に有益である。様々なJBエレメント凹部40、ガード・リング凹部42、およびメサ・ガード・リング凹部44の深さおよび幅は、同じである場合も異なる場合もある。特定の凹部の幅を説明するとき、幅とは、幅と長さと深さとを持つ凹部の狭い横方向の寸法を言う。1つの実施形態では、任意の凹部の深さが少なくとも0.1ミクロンであり、任意の凹部の幅が少なくとも0.5ミクロンである。別の実施形態では、凹部の深さが少なくとも1.0ミクロンであり、任意の凹部の幅が少なくとも3.0ミクロンである。
れたとき、ショットキー層24においての正電圧の印加は、ネイティブ・ポテンシャル障壁を有効に低減し、電子が半導体から半導体金属接合を通って流れるようにする。ネイティブ・ポテンシャル障壁の大きさ、従って、障壁高さは、ネイティブ・ポテンシャル障壁を克服して電子が半導体層から金属層へ流れるようにするために必要な電圧の量と関連する。実際、ポテンシャル障壁は、ショットキー・ダイオードが順方向バイアスされたとしきに低減される。ショットキー・ダイオード10が逆方向バイアスされたとき、ポテンシャル障壁は大きく増加して、電子の流れを阻止するように働く。
、0.5ないし5ミクロンの範囲とすることができる。
、隣接するJBエレメント30間の間隔、メサ・ガード・リング38とJBエレメント30との間の間隔、および隣接するガード・リング36間の間隔とは、望まれるデバイスの特性に応じて異なる。例えば、これらのエレメントの深さは、0.2ミクロンから1.5ミクロンより大きい範囲とすることができ、個々のエレメントは、互いに約1ないし4ミクロンの間の間隔をとることができる。
比較的厚く、金属から作られ、ショットキー・ダイオード10のアノードのためのボンド・パッドとして働く。アノード接点26は、アルミニウム(Al)、金(Au)、銀(Ag)などから形成することができる。
されたときに、決定される。
Claims (24)
- 半導体デバイスであって、
アクティブ領域の第1面と複数の接合障壁エレメント凹部とを有するドリフト層であって、前記ドリフト層は、第1導電型のドーピング材料によりドープされ、前記アクティブ領域と実質的に横方向で隣接するエッジ終端領域と関連し、前記エッジ終端領域は複数のガード・リングを含む、ドリフト層と、
前記第1面のアクティブ領域の上にあり、ショットキー接合を形成するショットキー層と、
前記複数の接合障壁エレメント凹部の対応するものの辺りで前記ドリフト層の中に延びる複数の第1のドープされた領域であって、前記複数の第1のドープされた領域は、第1の導電型とは反対の第2の導電型のドーピング材料でドープされ、前記ショットキー層の下で前記ドリフト層に接合障壁エレメントのアレイを形成する、複数の第1のドープされた領域と、
前記エッジ終端領域内のドリフト層の中に完全に形成されるウェルであって、前記ウェルは前記複数のガード・リングを有し、前記第2の導電型のドーピング材料でドープされ、前記複数のガード・リングは前記ウェルの中に完全に形成され、前記ガード・リングは前記接合障壁エレメント凹部と同じ平面上にある、ウェルと
を備える、半導体デバイス。 - 請求項1に記載の半導体デバイスであって、前記複数の接合障壁エレメント凹部の各々は、少なくとも1つの側面と底部とを有し、前記複数の第1のドープされた領域の各々は、前記複数の接合障壁エレメント凹部の対応する1つの少なくとも1つの側面及び前記底部の辺りで前記ドリフト層の中に延びている、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記接合障壁エレメントのアレイの接合障壁エレメントは前記ドリフト層内で互いに分離されている、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記複数の接合障壁エレメント凹部の少なくとも1つは、少なくとも0.1ミクロンの深さを有する、半導体デバイス。
- 請求項4に記載の半導体デバイスであって、前記複数の接合障壁エレメント凹部の少なくとも1つは、少なくとも0.5ミクロンの幅を有する、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記複数の接合障壁エレメント凹部の少なくとも1つは、少なくとも0.5ミクロンの幅を有する、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記複数のガード・リングの少なくともいくつかは、前記ドリフト層の中に延びる第2のドープされた領域であり、前記第2のドープされた領域は前記第2の導電型の前記ドーピング材料でドープされる、半導体デバイス。
- 請求項7に記載の半導体デバイスであって、前記複数のガード・リングのガード・リングは、前記ドリフト層内で互いに分離されている、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記ショットキー層は、障壁の高さを低くできる金属で形成されている、半導体デバイス。
- 請求項9に記載の半導体デバイスであって、前記ショットキー層の障壁の高さを低くできる金属はタンタルを含む、半導体デバイス。
- 請求項9に記載の半導体デバイスであって、前記ショットキー層の障壁の高さを低くできる金属は、チタニウムとクロミウムとアルミニウムとからなるグループのうちの少なくとも1つを含む、半導体デバイス。
- 請求項9に記載の半導体デバイスであって、前記ショットキー層の障壁の高さを低くできる金属は、本質的にタンタルからなる、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記ショットキー接合は、0.9電子ボルト未満の障壁高さを有する、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記ドリフト層は、薄くされた基板の上に形成され、前記基板は、前記ドリフト層が形成された後に薄くされたものであり、カソード接点は、前記薄くされた基板の底面の上に形成される、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記ドリフト層は、主に前記第1導電型のドーピング材料を用いて段階的様式でドープされ、前記ドリフト層は、前記第1面の近くでは低いドーピング濃度を有し、前記第1面とは実質的に反対の側にある前記ドリフト層の第2面の近くでは意図的に高くしたドーピング濃度を有する、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記ドリフト層は炭化けい素を含む、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記ドリフト層及び前記ショットキー層は、ショットキー・ダイオードの一部である、半導体デバイス。
- 請求項17に記載の半導体デバイスであって、順方向バイアスされたときに、少なくとも440アンペア/センチメートル2のDC電流密度をサポートする、半導体デバイス。
- 請求項17に記載の半導体デバイスであって、順方向バイアスされたときに、少なくとも500アンペア/センチメートル2のDC電流密度をサポートする、半導体デバイス。
- 請求項17に記載の半導体デバイスであって、逆方向バイアス・アノード−カソード・キャパシタンスに対するDC順方向バイアス電流密度の比率は、少なくとも0.275アンペア/ピコファラッド(A/pF)であり、逆方向バイアス・アノード−カソード電圧は、前記アクティブ領域が本質的に完全に枯渇させられる点へと前記ショットキー・ダイオードが逆方向バイアスされたときに決定される、半導体デバイス。
- 請求項17に記載の半導体デバイスであって、逆方向バイアス・アノード−カソード・キャパシタンスに対するDC順方向バイアス電流密度の比率は、少なくとも0.3アンペア/ピコファラッド(A/pF)であり、逆方向バイアス・アノード−カソード電圧は、前記アクティブ領域が本質的に完全に枯渇させられる点へと前記ショットキー・ダイオードが逆方向バイアスされたときに決定される、半導体デバイス。
- 請求項17に記載の半導体デバイスであって、逆方向バイアス・アノード−カソード・キャパシタンスに対するDC順方向バイアス電流密度の比率は、少なくとも0.35アンペア/ピコファラッド(A/pF)であり、逆方向バイアス・アノード−カソード電圧は、前記アクティブ領域が本質的に完全に枯渇させられる点へと前記ショットキー・ダイオードが逆方向バイアスされたときに決定される、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記ドリフト層および前記ショットキー層は、炭化けい素のショットキー・ダイオードの一部である、半導体デバイス。
- 請求項1に記載の半導体デバイスであって、前記ショットキー層は、前記複数の接合障壁エレメント凹部の少なくとも1つの凹部の中に配置される、半導体デバイス。
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US9865750B2 (en) | 2018-01-09 |
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