JP4349988B2 - 改善された半田ボールランドの構造を有する半導体パッケージ - Google Patents
改善された半田ボールランドの構造を有する半導体パッケージ Download PDFInfo
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- JP4349988B2 JP4349988B2 JP2004213368A JP2004213368A JP4349988B2 JP 4349988 B2 JP4349988 B2 JP 4349988B2 JP 2004213368 A JP2004213368 A JP 2004213368A JP 2004213368 A JP2004213368 A JP 2004213368A JP 4349988 B2 JP4349988 B2 JP 4349988B2
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- 229910000679 solder Inorganic materials 0.000 title claims description 153
- 239000004065 semiconductor Substances 0.000 title claims description 44
- 239000000758 substrate Substances 0.000 claims description 33
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 description 21
- 238000000926 separation method Methods 0.000 description 6
- 230000004927 fusion Effects 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 206010047700 Vomiting Diseases 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000004100 electronic packaging Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09663—Divided layout, i.e. conductors divided in two or more parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09809—Coaxial layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/099—Coating over pads, e.g. solder resist partly over pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
図2は、本発明の一実施形態によるBGA半導体パッケージの半田ボールランドを示す平面図である。
図3は、本発明の一実施形態によるBGA半導体パッケージの半田ボールランドを示す平面図である。
図4A及び図4Bは、各々、本発明の一参考例によるBGA半導体パッケージの半田ボールランドを示す平面図である。図4A及び図4Bに示すように、BGA半導体パッケージ用(図示せず)基板の半田ボール実装面2の上に、半田ボールランド30が形成される。半田ボール実装面2の上に半田マスク36が塗布され、半田マスク36の塗布されていない領域には半田ボールランド30を露出させるマスク開口領域37が設けられる。
図5は、本発明の一参考例によるBGA半導体パッケージの半田ボール実装面を示す平面図である。
図6は、本発明の一参考例によるBGA半導体パッケージの半田ボールランドを示す平面図である。
本発明によるBGA半導体パッケージは、SMD型とNSMD型とを混合した半田ボールランド構造を採用にすることによって、半田ボールの脱落、パターンクラック(pattern crack)、並びに半田ボールランドの分離等の現象を防止することができ、且つ、基板に対する半田ボールの高い融着力によりBGA半導体パッケージの信頼性を高めることができる。
A1 第1周縁部
A2 第2周縁部
2C 半田ボール実装面の中心
30 半田ボールランド
30b ランド端
30c ランドセンター
34 パターン連結部
36 半田マスク
37 開口領域
37a 第1開口端
37b 第2開口端
40 半田ボールランド
40a ランド端
40b ランド端
40c ランドセンター
44 パターン連結部
47 開口領域
50 半田ボールランド
50c ランドセンター
54 パターン連結部
57 開口領域
58 円弧状の溝
59 直線状の溝
60 半田ボールランド
60cランドセンター
68 円弧状の溝
69 直線状の溝
Claims (4)
- 基板と、
前記基板の上に形成され、
円弧状の溝と、
前記円弧状の溝の外縁に沿って前記円弧状の溝の円周中心から放射方向に配置され半田ボールランドのランド端と開口領域の開口端との間の領域にまで延長され前記円弧状の溝に通じる複数の直線状の溝と、を有する複数の半田ボールランドと、
前記複数のボールランドに形成される複数の接続ボールと、
前記半田ボールランドを露出させる、前記半田ボールランドの半径より小さい半径を有する複数の開口領域を限定し、前記基板の上を塗布するマスク層と、を備える半導体パッケージにおいて、
前記円弧状の溝の外縁と内縁の真ん中を通過する前記円弧状の溝の半径が前記開口領域の半径より小さいことを特徴とする、半導体パッケージ。 - 前記基板の表面の中心から前記半田ボールランドの中心を通して延長される仮想の線上に前記円弧状の溝の円周中心が通り、前記円弧状の溝の前記円弧の角は60°〜180°間であることを特徴とする、請求項1に記載の半導体パッケージ。
- 前記円弧状の溝の前記円弧の角は150°であることを特徴とする、請求項2に記載の半導体パッケージ。
- 前記基板は、印刷回路基板、シリコン基板、並びにフレキシブル回路テープを備えることを特徴とする、請求項1に記載の半導体パッケージ。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2003-0052328A KR100523330B1 (ko) | 2003-07-29 | 2003-07-29 | Smd 및 nsmd 복합형 솔더볼 랜드 구조를 가지는bga 반도체 패키지 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009016637A Division JP5090385B2 (ja) | 2003-07-29 | 2009-01-28 | 改善された半田ボールランドの構造を有する半導体パッケージ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005051240A JP2005051240A (ja) | 2005-02-24 |
JP4349988B2 true JP4349988B2 (ja) | 2009-10-21 |
Family
ID=34101753
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004213368A Expired - Lifetime JP4349988B2 (ja) | 2003-07-29 | 2004-07-21 | 改善された半田ボールランドの構造を有する半導体パッケージ |
JP2009016637A Expired - Fee Related JP5090385B2 (ja) | 2003-07-29 | 2009-01-28 | 改善された半田ボールランドの構造を有する半導体パッケージ |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009016637A Expired - Fee Related JP5090385B2 (ja) | 2003-07-29 | 2009-01-28 | 改善された半田ボールランドの構造を有する半導体パッケージ |
Country Status (3)
Country | Link |
---|---|
US (1) | US7064435B2 (ja) |
JP (2) | JP4349988B2 (ja) |
KR (1) | KR100523330B1 (ja) |
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2004
- 2004-06-25 US US10/877,733 patent/US7064435B2/en not_active Expired - Lifetime
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KR100523330B1 (ko) | 2005-10-24 |
KR20050013773A (ko) | 2005-02-05 |
JP2009117862A (ja) | 2009-05-28 |
US20050023683A1 (en) | 2005-02-03 |
JP5090385B2 (ja) | 2012-12-05 |
JP2005051240A (ja) | 2005-02-24 |
US7064435B2 (en) | 2006-06-20 |
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