DE69838453D1 - Leistungsbauelement mit MOS-Gate für hohe Spannungen und diesbezügliches Herstellungsverfahren - Google Patents
Leistungsbauelement mit MOS-Gate für hohe Spannungen und diesbezügliches HerstellungsverfahrenInfo
- Publication number
- DE69838453D1 DE69838453D1 DE69838453T DE69838453T DE69838453D1 DE 69838453 D1 DE69838453 D1 DE 69838453D1 DE 69838453 T DE69838453 T DE 69838453T DE 69838453 T DE69838453 T DE 69838453T DE 69838453 D1 DE69838453 D1 DE 69838453D1
- Authority
- DE
- Germany
- Prior art keywords
- mos
- gate
- manufacturing process
- power component
- high voltages
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP98830737A EP1009036B1 (de) | 1998-12-09 | 1998-12-09 | Leistungsbauelement mit MOS-Gate für hohe Spannungen und diesbezügliches Herstellungsverfahren |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69838453D1 true DE69838453D1 (de) | 2007-10-31 |
Family
ID=8236909
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69838453T Expired - Lifetime DE69838453D1 (de) | 1998-12-09 | 1998-12-09 | Leistungsbauelement mit MOS-Gate für hohe Spannungen und diesbezügliches Herstellungsverfahren |
Country Status (4)
Country | Link |
---|---|
US (2) | US6586798B1 (de) |
EP (1) | EP1009036B1 (de) |
JP (1) | JP4861544B2 (de) |
DE (1) | DE69838453D1 (de) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3895110B2 (ja) * | 1999-03-04 | 2007-03-22 | インフィネオン テクノロジース アクチエンゲゼルシャフト | 固有スイッチオン抵抗の低減されたヴァーティカルmosトランジスタ装置のボディ領域の製造方法 |
DE10052170C2 (de) * | 2000-10-20 | 2002-10-31 | Infineon Technologies Ag | Mittels Feldeffekt steuerbares Halbleiterbauelement |
EP1267415A3 (de) * | 2001-06-11 | 2009-04-15 | Kabushiki Kaisha Toshiba | Leistungshalbleiterbauelement mit RESURF-Schicht |
DE10132136C1 (de) * | 2001-07-03 | 2003-02-13 | Infineon Technologies Ag | Halbleiterbauelement mit Ladungskompensationsstruktur sowie zugehöriges Herstellungsverfahren |
CN1331238C (zh) | 2001-09-19 | 2007-08-08 | 株式会社东芝 | 半导体装置及其制造方法 |
US6521954B1 (en) | 2001-12-21 | 2003-02-18 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method thereof |
US6969657B2 (en) * | 2003-03-25 | 2005-11-29 | International Rectifier Corporation | Superjunction device and method of manufacture therefor |
EP1696490A1 (de) * | 2005-02-25 | 2006-08-30 | STMicroelectronics S.r.l. | Ladungskompensationshalbleiterbauelement und dazugehoriges Herstellungsverfahren |
EP1710843B1 (de) * | 2005-04-04 | 2012-09-19 | STMicroelectronics Srl | Integriertes Leistungsbauelement |
JP2007012858A (ja) * | 2005-06-30 | 2007-01-18 | Toshiba Corp | 半導体素子及びその製造方法 |
EP1742249A1 (de) * | 2005-07-08 | 2007-01-10 | STMicroelectronics S.r.l. | Leistungsfeldeffekttransistor und Verfahren zu seiner Herstellung |
EP1742259A1 (de) * | 2005-07-08 | 2007-01-10 | STMicroelectronics S.r.l. | Halbleiter-Leistungsbauelement mit Mehrfach-Drain-Struktur und entsprechendes Herstellungsverfahren |
WO2007116420A1 (en) | 2006-04-11 | 2007-10-18 | Stmicroelectronics S.R.L. | Process for manufacturing a semiconductor power device and respective device |
WO2007122646A1 (en) | 2006-04-21 | 2007-11-01 | Stmicroelectronics S.R.L. | Process for manufacturing a power semiconductor device and corresponding power semiconductor device |
US7944035B2 (en) * | 2006-05-22 | 2011-05-17 | International Rectifier Corporation | Double sided semiconduction device with edge contact and package therefor |
EP1873837B1 (de) | 2006-06-28 | 2013-03-27 | STMicroelectronics Srl | Leistungs-Halbleiterbauelement mit einer Randabschlussstruktur und Verfahren zu seiner Herstellung |
US8581345B2 (en) * | 2007-06-05 | 2013-11-12 | Stmicroelectronics S.R.L. | Charge-balance power device comprising columnar structures and having reduced resistance, and method and system of same |
ITTO20070392A1 (it) * | 2007-06-05 | 2008-12-06 | St Microelectronics Srl | Dispositivo di potenza a bilanciamento di carica comprendente strutture colonnari e avente resistenza ridotta |
US7666751B2 (en) * | 2007-09-21 | 2010-02-23 | Semiconductor Components Industries, Llc | Method of forming a high capacitance diode and structure therefor |
IT1397574B1 (it) * | 2008-12-29 | 2013-01-16 | St Microelectronics Rousset | Dispositivo a semiconduttore di potenza di tipo multi-drain e relativa struttura di terminazione di bordo |
JP5484741B2 (ja) * | 2009-01-23 | 2014-05-07 | 株式会社東芝 | 半導体装置 |
US20110049638A1 (en) | 2009-09-01 | 2011-03-03 | Stmicroelectronics S.R.L. | Structure for high voltage device and corresponding integration process |
US8901652B2 (en) * | 2009-09-01 | 2014-12-02 | Stmicroelectronics S.R.L. | Power MOSFET comprising a plurality of columnar structures defining the charge balancing region |
TWI404205B (zh) * | 2009-10-06 | 2013-08-01 | Anpec Electronics Corp | 絕緣閘雙極電晶體與快速逆向恢復時間整流器之整合結構及其製作方法 |
EP2599107B1 (de) | 2010-07-26 | 2016-12-21 | STMicroelectronics Srl | Verfahren zum füllen tiefer gräben in einem halbleitermaterialkörper |
WO2014083771A1 (ja) * | 2012-11-28 | 2014-06-05 | パナソニック株式会社 | 半導体素子及びその製造方法 |
KR101454470B1 (ko) | 2013-03-22 | 2014-10-23 | 파워큐브세미 (주) | 슈퍼정션 반도체 및 제조방법 |
ITTO20130410A1 (it) | 2013-05-22 | 2014-11-23 | St Microelectronics Srl | Dispositivo di potenza a supergiunzione e relativo procedimento di fabbricazione |
CN105869989B (zh) * | 2015-01-21 | 2019-04-05 | 北大方正集团有限公司 | 功率器件的制备方法和功率器件 |
WO2017081935A1 (ja) * | 2015-11-12 | 2017-05-18 | 三菱電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
US9899508B1 (en) | 2016-10-10 | 2018-02-20 | Stmicroelectronics S.R.L. | Super junction semiconductor device for RF applications, linear region operation and related manufacturing process |
IT201700113926A1 (it) | 2017-10-10 | 2019-04-10 | St Microelectronics Srl | Dispositivo mosfet di potenza e relativo procedimento di fabbricazione |
IT201800006323A1 (it) | 2018-06-14 | 2019-12-14 | Dispositivo a semiconduttore del tipo a bilanciamento di carica, in particolare per applicazioni rf ad elevata efficienza, e relativo procedimento di fabbricazione |
Family Cites Families (22)
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US3600645A (en) * | 1969-06-11 | 1971-08-17 | Westinghouse Electric Corp | Silicon carbide semiconductor device |
JPS52132684A (en) * | 1976-04-29 | 1977-11-07 | Sony Corp | Insulating gate type field effect transistor |
JPS62200766A (ja) * | 1986-02-28 | 1987-09-04 | Oki Electric Ind Co Ltd | 高耐圧dsamosfet素子の製造方法 |
JPH0685441B2 (ja) | 1986-06-18 | 1994-10-26 | 日産自動車株式会社 | 半導体装置 |
US5132235A (en) * | 1987-08-07 | 1992-07-21 | Siliconix Incorporated | Method for fabricating a high voltage MOS transistor |
JPS6449273A (en) | 1987-08-19 | 1989-02-23 | Mitsubishi Electric Corp | Semiconductor device and its manufacture |
US5156989A (en) * | 1988-11-08 | 1992-10-20 | Siliconix, Incorporated | Complementary, isolated DMOS IC technology |
EP0397014A3 (de) * | 1989-05-10 | 1991-02-06 | National Semiconductor Corporation | Aluminium-/Bor-dotierte P-Wanne |
US5070382A (en) * | 1989-08-18 | 1991-12-03 | Motorola, Inc. | Semiconductor structure for high power integrated circuits |
DE69029942T2 (de) * | 1990-10-16 | 1997-08-28 | Sgs Thomson Microelectronics | Verfahren zur Herstellung von MOS-Leistungstransistoren mit vertikalem Strom |
CN1019720B (zh) * | 1991-03-19 | 1992-12-30 | 电子科技大学 | 半导体功率器件 |
DE4309764C2 (de) | 1993-03-25 | 1997-01-30 | Siemens Ag | Leistungs-MOSFET |
US5349225A (en) * | 1993-04-12 | 1994-09-20 | Texas Instruments Incorporated | Field effect transistor with a lightly doped drain |
EP0696054B1 (de) * | 1994-07-04 | 2002-02-20 | STMicroelectronics S.r.l. | Verfahren zur Herstellung von Leistungsbauteilen hoher Dichte in MOS-Technologie |
JPH09213939A (ja) * | 1996-01-30 | 1997-08-15 | Nec Corp | 半導体装置 |
JP2834058B2 (ja) * | 1996-01-30 | 1998-12-09 | 山形日本電気株式会社 | 半導体装置の製造方法 |
WO1997029518A1 (de) * | 1996-02-05 | 1997-08-14 | Siemens Aktiengesellschaft | Durch feldeffekt steuerbares halbleiterbauelement |
US6071768A (en) * | 1996-05-17 | 2000-06-06 | Texas Instruments Incorporated | Method of making an efficient NPN turn-on in a high voltage DENMOS transistor for ESD protection |
US5923065A (en) * | 1996-06-12 | 1999-07-13 | Megamos Corporation | Power MOSFET device manufactured with simplified fabrication processes to achieve improved ruggedness and product cost savings |
US6172398B1 (en) * | 1997-08-11 | 2001-01-09 | Magepower Semiconductor Corp. | Trenched DMOS device provided with body-dopant redistribution-compensation region for preventing punch through and adjusting threshold voltage |
US6239463B1 (en) * | 1997-08-28 | 2001-05-29 | Siliconix Incorporated | Low resistance power MOSFET or other device containing silicon-germanium layer |
US6165821A (en) * | 1998-02-09 | 2000-12-26 | International Rectifier Corp. | P channel radhard device with boron diffused P-type polysilicon gate |
-
1998
- 1998-12-09 DE DE69838453T patent/DE69838453D1/de not_active Expired - Lifetime
- 1998-12-09 EP EP98830737A patent/EP1009036B1/de not_active Expired - Lifetime
-
1999
- 1999-12-07 US US09/457,122 patent/US6586798B1/en not_active Expired - Lifetime
- 1999-12-09 JP JP34999899A patent/JP4861544B2/ja not_active Expired - Lifetime
-
2003
- 2003-05-06 US US10/430,771 patent/US7084034B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US20030201503A1 (en) | 2003-10-30 |
JP2000183348A (ja) | 2000-06-30 |
JP4861544B2 (ja) | 2012-01-25 |
EP1009036B1 (de) | 2007-09-19 |
US7084034B2 (en) | 2006-08-01 |
EP1009036A1 (de) | 2000-06-14 |
US6586798B1 (en) | 2003-07-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |