DE69433337D1 - Halbleiterbauelement und dessen Herstellungsverfahren - Google Patents

Halbleiterbauelement und dessen Herstellungsverfahren

Info

Publication number: DE69433337D1
Authority: DE; Germany
Prior art keywords: manufacturing process; semiconductor component; semiconductor; component; manufacturing
Prior art date: 1993-09-20
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE69433337T

Other languages

English (en)

Other versions

DE69433337T2 (de

Inventor

Koichi Hashimoto

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Fujitsu Semiconductor Ltd

Original Assignee

Fujitsu Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1993-09-20

Filing date

1994-09-20

Publication date

2003-12-24

1994-09-20 Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd

2003-12-24 Publication of DE69433337D1 publication Critical patent/DE69433337D1/de

2004-04-15 Application granted granted Critical

2004-04-15 Publication of DE69433337T2 publication Critical patent/DE69433337T2/de

2014-09-21 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/903—FET configuration adapted for use as static memory cell

DE69433337T 1993-09-20 1994-09-20 Halbleiterbauelement und dessen Herstellungsverfahren Expired - Lifetime DE69433337T2 (de)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
JP25638693A JP3256048B2 (ja)	1993-09-20	1993-09-20	半導体装置及びその製造方法
JP25638693		1993-09-20

Publications (2)

Publication Number	Publication Date
DE69433337D1 true DE69433337D1 (de)	2003-12-24
DE69433337T2 DE69433337T2 (de)	2004-04-15

Family

ID=17291962

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE69433337T Expired - Lifetime DE69433337T2 (de)	1993-09-20	1994-09-20	Halbleiterbauelement und dessen Herstellungsverfahren

Country Status (5)

Country	Link
US (2)	US5717254A (de)
EP (1)	EP0645820B1 (de)
JP (1)	JP3256048B2 (de)
KR (2)	KR0185432B1 (de)
DE (1)	DE69433337T2 (de)

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JP3256048B2 (ja) *	1993-09-20	2002-02-12	富士通株式会社	半導体装置及びその製造方法
US5395785A (en) *	1993-12-17	1995-03-07	Sgs-Thomson Microelectronics, Inc.	SRAM cell fabrication with interlevel dielectric planarization
KR0165370B1 (ko) *	1995-12-22	1999-02-01	김광호	차아지 업에 의한 반도체장치의 손상을 방지하는 방법
KR100198634B1 (ko) *	1996-09-07	1999-06-15	구본준	반도체 소자의 배선구조 및 제조방법
EP0847080A1 (de) *	1996-12-09	1998-06-10	Texas Instruments Incorporated	Verbesserungen in, an oder in Bezug auf Halbleitervorrichtungen
US6034401A (en) *	1998-02-06	2000-03-07	Lsi Logic Corporation	Local interconnection process for preventing dopant cross diffusion in shared gate electrodes
JP3120389B2 (ja) *	1998-04-16	2000-12-25	日本電気株式会社	半導体装置
US6222240B1 (en)	1998-07-22	2001-04-24	Advanced Micro Devices, Inc.	Salicide and gate dielectric formed from a single layer of refractory metal
US6140167A (en) *	1998-08-18	2000-10-31	Advanced Micro Devices, Inc.	High performance MOSFET and method of forming the same using silicidation and junction implantation prior to gate formation
US6084280A (en) *	1998-10-15	2000-07-04	Advanced Micro Devices, Inc.	Transistor having a metal silicide self-aligned to the gate
US6410967B1 (en)	1998-10-15	2002-06-25	Advanced Micro Devices, Inc.	Transistor having enhanced metal silicide and a self-aligned gate electrode
JP2000196075A (ja) *	1998-12-25	2000-07-14	Hitachi Ltd	半導体装置及びその製造方法
US7098506B2 (en) *	2000-06-28	2006-08-29	Renesas Technology Corp.	Semiconductor device and method for fabricating the same
CN1220257C (zh) *	1999-07-08	2005-09-21	株式会社日立制作所	半导体器件及其制造方法
JP3675303B2 (ja)	2000-05-31	2005-07-27	セイコーエプソン株式会社	静電気保護回路が内蔵された半導体装置及びその製造方法
JP3467689B2 (ja)	2000-05-31	2003-11-17	セイコーエプソン株式会社	静電気保護回路が内蔵された半導体装置
US6535413B1 (en) *	2000-08-31	2003-03-18	Micron Technology, Inc.	Method of selectively forming local interconnects using design rules
TW594993B (en)	2001-02-16	2004-06-21	Sanyo Electric Co	Semiconductor device and manufacturing process therefor
JP2003133444A (ja) *	2001-08-10	2003-05-09	Mitsubishi Electric Corp	半導体記憶装置およびその製造方法
KR20030079298A (ko) *	2002-04-03	2003-10-10	삼성전자주식회사	반도체 소자 및 그 제조방법
US7936062B2 (en) *	2006-01-23	2011-05-03	Tessera Technologies Ireland Limited	Wafer level chip packaging
KR101602005B1 (ko) *	2009-03-30	2016-03-17	제이에스알 가부시끼가이샤	착색 조성물, 컬러 필터 및 컬러 액정 표시 소자
US8587068B2 (en) *	2012-01-26	2013-11-19	International Business Machines Corporation	SRAM with hybrid FinFET and planar transistors

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NL7604986A (nl) *	1976-05-11	1977-11-15	Philips Nv	Werkwijze voor het vervaardigen van een halfgeleider- inrichting, en inrichting vervaardigd door toe- passing van de werkwijze.
JPS5519857A (en) *	1978-07-28	1980-02-12	Nec Corp	Semiconductor
US4384301A (en) *	1979-11-07	1983-05-17	Texas Instruments Incorporated	High performance submicron metal-oxide-semiconductor field effect transistor device structure
JPS59121868A (ja) *	1982-12-28	1984-07-14	Toshiba Corp	相補型ｍｉｓスタテイツクメモリセル
US4545116A (en) *	1983-05-06	1985-10-08	Texas Instruments Incorporated	Method of forming a titanium disilicide
EP0190070B1 (de) *	1985-01-22	1992-08-26	Fairchild Semiconductor Corporation	Halbleiterstruktur
CA1258320A (en) *	1985-04-01	1989-08-08	Madhukar B. Vora	Small contactless ram cell
US4804636A (en) *	1985-05-01	1989-02-14	Texas Instruments Incorporated	Process for making integrated circuits having titanium nitride triple interconnect
US4890141A (en) *	1985-05-01	1989-12-26	Texas Instruments Incorporated	CMOS device with both p+ and n+ gates
US4975756A (en) *	1985-05-01	1990-12-04	Texas Instruments Incorporated	SRAM with local interconnect
US4657628A (en) *	1985-05-01	1987-04-14	Texas Instruments Incorporated	Process for patterning local interconnects
US5010032A (en) *	1985-05-01	1991-04-23	Texas Instruments Incorporated	Process for making CMOS device with both P+ and N+ gates including refractory metal silicide and nitride interconnects
US4821085A (en) *	1985-05-01	1989-04-11	Texas Instruments Incorporated	VLSI local interconnect structure
US4675073A (en) *	1986-03-07	1987-06-23	Texas Instruments Incorporated	Tin etch process
US4746219A (en) *	1986-03-07	1988-05-24	Texas Instruments Incorporated	Local interconnect
US4793896C1 (en) *	1988-02-22	2001-10-23	Texas Instruments Inc	Method for forming local interconnects using chlorine bearing agents
US4957590A (en) *	1988-02-22	1990-09-18	Texas Instruments Incorporated	Method for forming local interconnects using selective anisotropy
US5418179A (en) *	1988-05-31	1995-05-23	Yamaha Corporation	Process of fabricating complementary inverter circuit having multi-level interconnection
US5196233A (en) *	1989-01-18	1993-03-23	Sgs-Thomson Microelectronics, Inc.	Method for fabricating semiconductor circuits
JPH02202054A (ja) *	1989-01-31	1990-08-10	Texas Instr Japan Ltd	半導体装置及びその製造方法
US4980020A (en) *	1989-12-22	1990-12-25	Texas Instruments Incorporated	Local interconnect etch technique
US5279990A (en) *	1990-03-02	1994-01-18	Motorola, Inc.	Method of making a small geometry contact using sidewall spacers
JPH0463435A (ja) *	1990-07-03	1992-02-28	Fujitsu Ltd	半導体装置及びその製造方法
US5122225A (en) *	1990-11-21	1992-06-16	Texas Instruments Incorporated	Selective etch method
JPH0541378A (ja) *	1991-03-15	1993-02-19	Mitsubishi Electric Corp	半導体装置およびその製造方法
US5190893A (en) *	1991-04-01	1993-03-02	Motorola Inc.	Process for fabricating a local interconnect structure in a semiconductor device
EP0517368B1 (de) *	1991-05-03	1998-09-16	STMicroelectronics, Inc.	Lokalverbindungen für integrierte Schaltungen
US5298782A (en) *	1991-06-03	1994-03-29	Sgs-Thomson Microelectronics, Inc.	Stacked CMOS SRAM cell with polysilicon transistor load
KR930020669A (ko) *	1992-03-04	1993-10-20	김광호	고집적 반도체장치 및 그 제조방법
US5616934A (en) *	1993-05-12	1997-04-01	Micron Technology, Inc.	Fully planarized thin film transistor (TFT) and process to fabricate same
JP3256048B2 (ja) *	1993-09-20	2002-02-12	富士通株式会社	半導体装置及びその製造方法

1993
- 1993-09-20 JP JP25638693A patent/JP3256048B2/ja not_active Expired - Lifetime
1994
- 1994-09-13 US US08/305,280 patent/US5717254A/en not_active Expired - Lifetime
- 1994-09-17 KR KR1019940023781A patent/KR0185432B1/ko not_active IP Right Cessation
- 1994-09-20 EP EP94306878A patent/EP0645820B1/de not_active Expired - Lifetime
- 1994-09-20 DE DE69433337T patent/DE69433337T2/de not_active Expired - Lifetime
1997
- 1997-08-04 US US08/904,540 patent/US6160294A/en not_active Expired - Lifetime
1998
- 1998-07-13 KR KR19980028220A patent/KR100209345B1/ko not_active IP Right Cessation

Also Published As

Publication number	Publication date
JPH0794595A (ja)	1995-04-07
JP3256048B2 (ja)	2002-02-12
US5717254A (en)	1998-02-10
KR100209345B1 (en)	1999-07-15
EP0645820B1 (de)	2003-11-19
EP0645820A2 (de)	1995-03-29
US6160294A (en)	2000-12-12
EP0645820A3 (de)	1996-07-31
KR950010067A (ko)	1995-04-26
DE69433337T2 (de)	2004-04-15
KR0185432B1 (ko)	1999-03-20

Legal Events

Date	Code	Title	Description
2004-12-16	8364	No opposition during term of opposition
2009-04-16	8327	Change in the person/name/address of the patent owner	Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP
2010-11-25	8327	Change in the person/name/address of the patent owner	Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP
2011-02-10	8328	Change in the person/name/address of the agent	Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE

Publication	Publication Date	Title
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DE69430513T2 (de)	2002-10-31	Harzvergossenes Halbleiterbauteil und dessen Herstellungsverfahren
DE69433337D1 (de)	2003-12-24	Halbleiterbauelement und dessen Herstellungsverfahren
DE69430511D1 (de)	2002-06-06	Halbleiteranordnung und Herstellungverfahren
DE69435045D1 (de)	2008-01-03	Halbleiter-Anordnung und Herstellungsverfahren dafür
DE69429493T2 (de)	2002-05-16	Verbinder und dessen Herstellungsverfahren
DE69415068D1 (de)	1999-01-21	Mikromotor und Herstellungsverfahren desselben
DE69429906T2 (de)	2002-08-01	Halbleiterstruktur und Herstellungsverfahren
DE69409706T2 (de)	1998-08-13	Absorbierender Artikel und dessen Herstellungsmethode
DE69406723D1 (de)	1997-12-18	Organopolysiloxan und Herstellungsverfahren
DE69124646D1 (de)	1997-03-27	MOS-Halbleiterbauelement und dessen Herstellungsverfahren
DE69417346D1 (de)	1999-04-29	Bildaufnehmer und Herstellungsverfahren
DE69413602T2 (de)	1999-04-22	Halbleiteranordnung und Herstellungsverfahren
DE69424728T2 (de)	2000-09-28	Halbleiteranordnung und zugehörige Herstellungsmethode
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DE69504262T2 (de)	1999-05-12	Halbleiterlaser und dessen Herstellungsverfahren
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DE69403737D1 (de)	1997-07-17	Organosiloxan-Zusammensetzung und Herstellungsverfahren
DE69419881T2 (de)	2000-03-16	Verpackte Halbeiteranordnung und deren Herstellungsverfahren
DE69400459D1 (de)	1996-10-10	Halbleiterlaser und Herstellungsverfahren
DE69400533T2 (de)	1997-02-20	Halbleiterlaser und Herstellungsverfahren
DE69333098D1 (de)	2003-08-21	Integriertes Halbleiterschaltkreisbauelement und dessen Herstellungsverfahren
DE69500392T2 (de)	1998-01-15	Halbleiterlasergerät und dessen Herstellungsverfahren