DE69430511D1 - Halbleiteranordnung und Herstellungverfahren - Google Patents
Halbleiteranordnung und HerstellungverfahrenInfo
- Publication number
- DE69430511D1 DE69430511D1 DE69430511T DE69430511T DE69430511D1 DE 69430511 D1 DE69430511 D1 DE 69430511D1 DE 69430511 T DE69430511 T DE 69430511T DE 69430511 T DE69430511 T DE 69430511T DE 69430511 D1 DE69430511 D1 DE 69430511D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- manufacturing process
- manufacturing
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18165—Exposing the passive side of the semiconductor or solid-state body of a wire bonded chip
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
- Y10T29/49171—Assembling electrical component directly to terminal or elongated conductor with encapsulating
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30564293 | 1993-12-06 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69430511D1 true DE69430511D1 (de) | 2002-06-06 |
DE69430511T2 DE69430511T2 (de) | 2002-08-22 |
Family
ID=17947593
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69430511T Expired - Fee Related DE69430511T2 (de) | 1993-12-06 | 1994-10-28 | Halbleiteranordnung und Herstellungverfahren |
Country Status (4)
Country | Link |
---|---|
US (2) | US5679978A (de) |
EP (2) | EP1119038A3 (de) |
KR (1) | KR0167800B1 (de) |
DE (1) | DE69430511T2 (de) |
Families Citing this family (60)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6111306A (en) * | 1993-12-06 | 2000-08-29 | Fujitsu Limited | Semiconductor device and method of producing the same and semiconductor device unit and method of producing the same |
JPH0831988A (ja) * | 1994-07-20 | 1996-02-02 | Nec Corp | テープキャリアパッケージの封止構造 |
US5844309A (en) * | 1995-03-20 | 1998-12-01 | Fujitsu Limited | Adhesive composition, semiconductor device using the composition and method for producing a semiconductor device using the composition |
US5652463A (en) * | 1995-05-26 | 1997-07-29 | Hestia Technologies, Inc. | Transfer modlded electronic package having a passage means |
KR100386061B1 (ko) * | 1995-10-24 | 2003-08-21 | 오끼 덴끼 고오교 가부시끼가이샤 | 크랙을방지하기위한개량된구조를가지는반도체장치및리이드프레임 |
US5854511A (en) * | 1995-11-17 | 1998-12-29 | Anam Semiconductor, Inc. | Semiconductor package including heat sink with layered conductive plate and non-conductive tape bonding to leads |
US5859475A (en) * | 1996-04-24 | 1999-01-12 | Amkor Technology, Inc. | Carrier strip and molded flex circuit ball grid array |
US5852870A (en) | 1996-04-24 | 1998-12-29 | Amkor Technology, Inc. | Method of making grid array assembly |
US6011694A (en) * | 1996-08-01 | 2000-01-04 | Fuji Machinery Mfg. & Electronics Co., Ltd. | Ball grid array semiconductor package with solder ball openings in an insulative base |
KR100447035B1 (ko) * | 1996-11-21 | 2004-09-07 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 장치의 제조방법 |
US5736732A (en) * | 1996-12-23 | 1998-04-07 | General Electric Company | Induced charge prevention in semiconductor imaging devices |
US5972738A (en) * | 1997-05-07 | 1999-10-26 | Lsi Logic Corporation | PBGA stiffener package |
US5986209A (en) | 1997-07-09 | 1999-11-16 | Micron Technology, Inc. | Package stack via bottom leaded plastic (BLP) packaging |
US6173490B1 (en) * | 1997-08-20 | 2001-01-16 | National Semiconductor Corporation | Method for forming a panel of packaged integrated circuits |
KR100252051B1 (ko) * | 1997-12-03 | 2000-04-15 | 윤종용 | 휨 방지막을 구비하는 탭 테이프 |
JPH11284007A (ja) * | 1998-03-31 | 1999-10-15 | Toshiba Corp | 半導体装置及びその製造方法 |
JP3907845B2 (ja) * | 1998-08-18 | 2007-04-18 | 沖電気工業株式会社 | 半導体装置 |
TW451535B (en) * | 1998-09-04 | 2001-08-21 | Sony Corp | Semiconductor device and package, and fabrication method thereof |
WO2000059033A1 (en) | 1999-03-25 | 2000-10-05 | Seiko Epson Corporation | Wiring board, connection board, semiconductor device, method of manufacture thereof, circuit board, and electronic device |
US6287890B1 (en) * | 1999-10-18 | 2001-09-11 | Thin Film Module, Inc. | Low cost decal material used for packaging |
US6487083B1 (en) * | 2000-08-10 | 2002-11-26 | Nortel Networks Ltd. | Multilayer circuit board |
US6486554B2 (en) * | 2001-03-30 | 2002-11-26 | International Business Machines Corporation | Molded body for PBGA and chip-scale packages |
KR100415281B1 (ko) * | 2001-06-29 | 2004-01-16 | 삼성전자주식회사 | 양면 실장형 회로 기판 및 이를 포함하는 멀티 칩 패키지 |
US7015072B2 (en) | 2001-07-11 | 2006-03-21 | Asat Limited | Method of manufacturing an enhanced thermal dissipation integrated circuit package |
US6734552B2 (en) * | 2001-07-11 | 2004-05-11 | Asat Limited | Enhanced thermal dissipation integrated circuit package |
AU2002332557A1 (en) * | 2001-08-15 | 2003-03-03 | Asat Limited | Encapsulated integrated circuit package and method of manufacturing an integrated circuit package |
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US6916682B2 (en) * | 2001-11-08 | 2005-07-12 | Freescale Semiconductor, Inc. | Semiconductor package device for use with multiple integrated circuits in a stacked configuration and method of formation and testing |
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US6987032B1 (en) * | 2002-07-19 | 2006-01-17 | Asat Ltd. | Ball grid array package and process for manufacturing same |
US6979594B1 (en) | 2002-07-19 | 2005-12-27 | Asat Ltd. | Process for manufacturing ball grid array package |
US6800948B1 (en) | 2002-07-19 | 2004-10-05 | Asat Ltd. | Ball grid array package |
US7372151B1 (en) | 2003-09-12 | 2008-05-13 | Asat Ltd. | Ball grid array package and process for manufacturing same |
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EP1765740B1 (de) | 2004-07-12 | 2007-11-07 | Cardinal CG Company | Wartungsarme beschichtungen |
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JP2007115957A (ja) * | 2005-10-21 | 2007-05-10 | Seiko Epson Corp | 半導体装置及びその製造方法 |
CN100586253C (zh) * | 2005-11-09 | 2010-01-27 | 皇家飞利浦电子股份有限公司 | 包装、包装载体及其制造方法、诊断设备及其制造方法 |
EP2013150B1 (de) | 2006-04-11 | 2018-02-28 | Cardinal CG Company | Fotokatalytische beschichtungen mit verbesserten wartungsarmen eigenschaften |
US20080011599A1 (en) | 2006-07-12 | 2008-01-17 | Brabender Dennis M | Sputtering apparatus including novel target mounting and/or control |
US7635913B2 (en) * | 2006-12-09 | 2009-12-22 | Stats Chippac Ltd. | Stacked integrated circuit package-in-package system |
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US20080284038A1 (en) * | 2007-05-16 | 2008-11-20 | Dimaano Jr Antonio B | Integrated circuit package system with perimeter paddle |
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US7820309B2 (en) | 2007-09-14 | 2010-10-26 | Cardinal Cg Company | Low-maintenance coatings, and methods for producing low-maintenance coatings |
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US8318549B2 (en) * | 2009-10-29 | 2012-11-27 | Freescale Semiconductor, Inc. | Molded semiconductor package having a filler material |
US20120314390A1 (en) * | 2010-03-03 | 2012-12-13 | Mutual-Tek Industries Co., Ltd. | Multilayer circuit board |
US8310098B2 (en) | 2011-05-16 | 2012-11-13 | Unigen Corporation | Switchable capacitor arrays for preventing power interruptions and extending backup power life |
US9601417B2 (en) * | 2011-07-20 | 2017-03-21 | Unigen Corporation | “L” shaped lead integrated circuit package |
KR101440343B1 (ko) * | 2013-01-18 | 2014-09-15 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 |
US10604442B2 (en) | 2016-11-17 | 2020-03-31 | Cardinal Cg Company | Static-dissipative coating technology |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3754070A (en) * | 1970-08-03 | 1973-08-21 | Motorola Inc | Flash free molding |
JPS5349950A (en) * | 1976-10-18 | 1978-05-06 | Matsushita Electronics Corp | Semiconductor device |
JPS54126468A (en) * | 1978-03-24 | 1979-10-01 | Toshiba Corp | Production of resin-sealed semiconductor device |
US4653174A (en) * | 1984-05-02 | 1987-03-31 | Gte Products Corporation | Method of making packaged IC chip |
JPS63305542A (ja) * | 1987-06-06 | 1988-12-13 | Nec Corp | ピングリツドアレイパツケ−ジ |
JPH0779149B2 (ja) * | 1987-08-07 | 1995-08-23 | 日本電気株式会社 | 樹脂封止型半導体装置 |
US4868349A (en) * | 1988-05-09 | 1989-09-19 | National Semiconductor Corporation | Plastic molded pin-grid-array power package |
JPH03252148A (ja) * | 1990-02-28 | 1991-11-11 | Nec Corp | Tabインナーリードのバンプ構造およびその形成方法 |
KR100199261B1 (ko) * | 1990-04-27 | 1999-06-15 | 가나이 쓰도무 | 반도체장치 및 그 제조방법 그리고 그것에 사용되는 성형장치 |
JPH04219959A (ja) * | 1990-12-20 | 1992-08-11 | Citizen Watch Co Ltd | 樹脂封止形半導体装置及びその製造方法 |
JPH07118496B2 (ja) * | 1991-01-30 | 1995-12-18 | 日本電気株式会社 | Tabインナーリードのバンプ形成装置 |
JPH04245949A (ja) * | 1991-01-31 | 1992-09-02 | Honda Motor Co Ltd | 熱可塑性複合材料素材 |
JPH04306865A (ja) * | 1991-04-03 | 1992-10-29 | Seiko Epson Corp | 半導体装置及びその製造方法 |
JPH05160292A (ja) * | 1991-06-06 | 1993-06-25 | Toshiba Corp | 多層パッケージ |
JP2757594B2 (ja) * | 1991-07-17 | 1998-05-25 | 日立電線株式会社 | フィルムキャリア装置 |
JP2757593B2 (ja) * | 1991-07-17 | 1998-05-25 | 日立電線株式会社 | フィルムキャリア装置の製造方法 |
JPH0529500A (ja) * | 1991-07-22 | 1993-02-05 | Hitachi Cable Ltd | Icパツケージ |
JPH05121473A (ja) * | 1991-10-25 | 1993-05-18 | Nec Corp | 樹脂封止型半導体装置 |
US5311059A (en) * | 1992-01-24 | 1994-05-10 | Motorola, Inc. | Backplane grounding for flip-chip integrated circuit |
US5334857A (en) * | 1992-04-06 | 1994-08-02 | Motorola, Inc. | Semiconductor device with test-only contacts and method for making the same |
US5385869A (en) * | 1993-07-22 | 1995-01-31 | Motorola, Inc. | Semiconductor chip bonded to a substrate and method of making |
US5394009A (en) * | 1993-07-30 | 1995-02-28 | Sun Microsystems, Inc. | Tab semiconductor package with cushioned land grid array outer lead bumps |
US5455456A (en) * | 1993-09-15 | 1995-10-03 | Lsi Logic Corporation | Integrated circuit package lid |
-
1994
- 1994-10-24 US US08/330,848 patent/US5679978A/en not_active Expired - Fee Related
- 1994-10-28 DE DE69430511T patent/DE69430511T2/de not_active Expired - Fee Related
- 1994-10-28 EP EP01105467A patent/EP1119038A3/de not_active Withdrawn
- 1994-10-28 EP EP94117092A patent/EP0657921B1/de not_active Expired - Lifetime
- 1994-11-05 KR KR1019940029011A patent/KR0167800B1/ko not_active IP Right Cessation
-
1997
- 1997-05-13 US US08/855,647 patent/US5804467A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP1119038A2 (de) | 2001-07-25 |
KR0167800B1 (ko) | 1999-01-15 |
KR950021434A (ko) | 1995-07-26 |
EP1119038A3 (de) | 2001-11-14 |
EP0657921B1 (de) | 2002-05-02 |
US5679978A (en) | 1997-10-21 |
DE69430511T2 (de) | 2002-08-22 |
US5804467A (en) | 1998-09-08 |
EP0657921A1 (de) | 1995-06-14 |
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