CN109643653A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
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- CN109643653A CN109643653A CN201780049619.3A CN201780049619A CN109643653A CN 109643653 A CN109643653 A CN 109643653A CN 201780049619 A CN201780049619 A CN 201780049619A CN 109643653 A CN109643653 A CN 109643653A
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- electrode
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 120
- 239000010410 layer Substances 0.000 claims abstract description 171
- 239000011229 interlayer Substances 0.000 claims abstract description 97
- 239000000463 material Substances 0.000 claims abstract description 20
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 17
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 10
- 229910052751 metal Inorganic materials 0.000 claims description 76
- 239000002184 metal Substances 0.000 claims description 76
- 230000004888 barrier function Effects 0.000 claims description 41
- 230000000903 blocking effect Effects 0.000 claims description 28
- 239000004020 conductor Substances 0.000 claims description 7
- 208000037656 Respiratory Sounds Diseases 0.000 abstract description 17
- 239000013078 crystal Substances 0.000 abstract description 10
- 239000010949 copper Substances 0.000 description 120
- 230000035882 stress Effects 0.000 description 95
- 238000010276 construction Methods 0.000 description 19
- 230000033001 locomotion Effects 0.000 description 14
- 239000000758 substrate Substances 0.000 description 13
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 11
- 229910010271 silicon carbide Inorganic materials 0.000 description 11
- 230000000694 effects Effects 0.000 description 10
- 239000004642 Polyimide Substances 0.000 description 5
- 229920001721 polyimide Polymers 0.000 description 5
- 229910052681 coesite Inorganic materials 0.000 description 4
- 229910052906 cristobalite Inorganic materials 0.000 description 4
- 238000009413 insulation Methods 0.000 description 4
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- 229910052905 tridymite Inorganic materials 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 230000000116 mitigating effect Effects 0.000 description 3
- 230000008646 thermal stress Effects 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- MTPVUVINMAGMJL-UHFFFAOYSA-N trimethyl(1,1,2,2,2-pentafluoroethyl)silane Chemical compound C[Si](C)(C)C(F)(F)C(F)(F)F MTPVUVINMAGMJL-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- UGACIEPFGXRWCH-UHFFFAOYSA-N [Si].[Ti] Chemical compound [Si].[Ti] UGACIEPFGXRWCH-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
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- 230000004913 activation Effects 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
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- 238000009501 film coating Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
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- 230000005764 inhibitory process Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 150000001247 metal acetylides Chemical class 0.000 description 1
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- 239000011733 molybdenum Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- -1 tungsten nitride Chemical class 0.000 description 1
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Abstract
本发明的目的在于抑制Cu晶粒的生长所致的层间绝缘膜的裂纹。半导体装置(101)具备:源极区域(5);层间绝缘膜(7),在源极区域(5)上具有开口部地形成,包括氧化硅;Cu电极(1),经由层间绝缘膜(7)的开口部与源极区域(5)电连接,其端部位于所述层间绝缘膜(7)的端部的内侧的所述层间绝缘膜(7)上;以及应力缓和层(13),形成于Cu电极(1)与层间绝缘膜(7)之间,包括断裂韧性值比层间绝缘膜(7)大的材料,从Cu电极(1)的端部的内侧设置至外侧。
Description
技术领域
本发明涉及缓和半导体装置的导线键合(wire bonding)时的冲击的构造。
背景技术
SiC(碳化硅)相比于Si(硅),带隙更大。因此,使用SiC的半导体元件相比于在小于200℃下动作的使用Si的半导体元件,能够在更高温下动作。
在小于200℃下动作的半导体元件中,使用以Al(铝)为主成分的表面电极,对表面电极接合Al导线,但在超过200℃的温度下使这些半导体元件动作时,存在表面电极以及导线的形状变化而可靠性降低这样的问题。因此,作为代替Al的表面电极以及导线的材料,研究高温下的可靠性高的Cu(铜)。
但是,Cu导线由于相比于Al导线,在向表面电极的接合时对元件造成的冲击大,所以存在发生元件不良的问题。因此,在使用Cu导线的情况下,需要研究与Cu导线接合的表面电极的构造。
在这一点上,在专利文献1中提出了如下方案:通过对在集成电路的焊盘上或者半导体元件的集电电极上形成的层间绝缘膜形成开口部而形成冲击吸收梁,在元件的集电电极上形成经由层间保护膜的开口部与集电电极连接的Cu厚膜电极,从而用Cu厚膜电极和冲击吸收梁缓和或者吸收向所述厚膜电极的导线接合时的冲击。
现有技术文献
专利文献
专利文献1:日本特开2006-165515号公报
发明内容
然而,在专利文献1的构造中,Cu电极仅经由阻挡金属层与层间绝缘膜接合,所以在产品制造时或者元件的动作中Cu电极成为高温时,通过Cu电极内的Cu晶粒生长而Cu电极收缩,应力施加到层间绝缘膜,结果存在在层间绝缘膜中发生裂纹的可能性。
本发明是鉴于上述问题完成的,其目的在于抑制Cu晶粒的生长所致的层间绝缘膜的裂纹。
本发明的半导体装置具备:半导体层;层间绝缘膜,在半导体层上具有开口部地形成,包括氧化硅;Cu电极,经由层间绝缘膜的开口部与半导体层电连接,其端部位于层间绝缘膜的端部的内侧的层间绝缘膜上;以及应力缓和层,形成于Cu电极与层间绝缘膜之间,包括断裂韧性(fracture toughness)值比层间绝缘膜大的材料,从Cu电极的端部的内侧设置至外侧。
本发明的半导体装置具备:半导体层;层间绝缘膜,在半导体层上具有开口部地形成,包括氧化硅;Cu电极,经由层间绝缘膜的开口部与半导体层电连接,其端部位于层间绝缘膜的端部的内侧的层间绝缘膜上;以及应力缓和层,形成于Cu电极与层间绝缘膜之间,包括断裂韧性值比层间绝缘膜大的材料,从Cu电极的端部的内侧设置至外侧。因此,能够通过层间绝缘膜和Cu电极,缓和Cu导线键合时的冲击,抑制半导体元件的元件不良。另外,能够用应力缓和层缓和由于高温时的Cu晶粒的生长从Cu电极产生的应力,所以能够抑制在层间绝缘膜中发生裂纹。
本发明的目的、特征、方案、以及优点通过以下的详细的说明和附图将变得更加明确。
附图说明
图1是示出实施方式1所涉及的功率半导体元件的构造的剖面图。
图2是示出实施方式1所涉及的半导体装置的构造的剖面图。
图3是示出实施方式1的变形例所涉及的半导体装置的构造的剖面图。
图4是示出实施方式2所涉及的半导体装置的构造的剖面图。
图5是示出实施方式3所涉及的半导体装置的构造的剖面图。
图6是示出实施方式3的变形例所涉及的半导体装置的构造的剖面图。
图7是示出实施方式4所涉及的半导体装置的构造的剖面图。
(附图标记说明)
1:Cu电极;2:漂移层;3:SiC基板;4:背面电极;5:源极区域;6、7:层间绝缘膜;8:栅电极;9:栅极氧化膜;10:基区;11:基极接触区域;12:功率半导体元件;13:应力缓和层;14:阻挡金属(barrier metal)层;15:聚酰亚胺;16:Cu导线;17:接合材料;18:底板;19:主电极布线;20:接合材料;21:非阻挡金属应力缓和层;101、102、103、104、105、106:半导体装置。
具体实施方式
<A.实施方式1>
<A-1.结构>
图1是示出本发明的实施方式1所涉及的功率半导体元件12的构造的剖面图。以下,说明功率半导体元件12的结构。功率半导体元件12的基板使用SiC基板3,对其形成元件构造。在使用SiC基板的情况下,相比于以往使用的Si基板,能够制作低损失且能够进行高速动作以及高温动作的半导体元件。在图1中,将功率半导体元件12表示为MOSFET(Metal-Oxide-Semiconductor Field-Effect-Transistor)。
在SiC基板3的表面侧,通过外延生长形成漂移层2,在背面侧,形成与SiC基板3电连接的背面电极4。在漂移层2的表层,部分性地形成基区10,在基区10的表层,部分性地形成源极区域5。源极区域5与漂移层2之间的基区10表面成为功率半导体元件12的沟道区域。基极接触区域11从源极区域5的表面贯通源极区域5而形成至基区10。基区10、源极区域5、以及基极接触区域11通过离子注入以及活性化退火形成。
在功率半导体元件12的沟道区域上,隔着栅极氧化膜9形成栅电极8。即,沟道区域隔着栅极氧化膜9与栅电极8相向,在导通动作时形成反型层。能够在栅极氧化膜9中使用SiO2(氧化硅),在栅电极8中使用多晶硅。栅电极8用具有接触孔的层间绝缘膜6覆盖。能够在层间绝缘膜6中,使用SiO2。以上是功率半导体元件12的结构。
图2是示出具备功率半导体元件12的半导体装置101的构造的剖面图。以下,说明半导体装置101的结构。在功率半导体元件12的表面,部分性地形成包括SiO2的层间绝缘膜7。层间绝缘膜7形成为:在俯视时形成Cu电极1的区域中,以包围Cu电极1的中心的方式相对Cu电极1的中心具有开口部。因此,层间绝缘膜7的一部分还形成于Cu电极1的下层。另外,层间绝缘膜7的端部比Cu电极1的端部位于外侧。
在层间绝缘膜7上形成应力缓和层13。应力缓和层13与层间绝缘膜7同样地,相对Cu电极1的中心具有开口部,但该开口部的宽度小于层间绝缘膜7的开口部的宽度。因此,在层间绝缘膜7的开口部,层间绝缘膜7的端部被应力缓和层13覆盖。应力缓和层13包括断裂韧性值比包括SiO2的层间绝缘膜7高的材料。作为应力缓和层13的材料,可以举出例如Al、聚酰亚胺、氮化硅等。应力缓和层13的厚度最好为100nm以上,如果是200nm以上,则能够更可靠地抑制向层间绝缘膜7发生裂纹。通过实验确认:在作为应力缓和层13的材料使用氮化硅的情况下,通过使厚度成为200nm,即使在形成超过厚度30μm的比较厚的Cu电极的情况下也能够抑制向层间绝缘膜7发生裂纹。
在应力缓和层13上,形成Cu电极1。Cu电极1在层间绝缘膜7的开口部,更具体而言在应力缓和层13的开口部,经由应力缓和层13与功率半导体元件12的源极区域5电连接,作为功率半导体元件12的表面电极动作。关于Cu电极1,例如使厚度成为15μm以上。这是为了在Cu导线16的键合时,用Cu电极1缓和施加到功率半导体元件12的冲击,防止功率半导体元件12的元件破坏。
如图2所示,Cu电极1的端部比应力缓和层13的端部位于内侧。即,在图2中,Cu电极1的左端比应力缓和层13的左端位于右侧,Cu电极1的右端比应力缓和层13的右端位于左侧。
层间绝缘膜7、应力缓和层13、Cu电极1被聚酰亚胺15覆盖。聚酰亚胺15从功率半导体元件12的芯片端形成到Cu电极1上,作为保护层发挥功能。
聚酰亚胺15在Cu电极1上具有开口部,在该开口部中Cu导线16与Cu电极1接合。在功率半导体中处置的电流量大,所以为了使大电流流过,在Cu导线16中使用径为100μmφ以上的粗线。另外,Cu导线16的根数既可以是1根,也可以根据从功率半导体元件12取出的电流量而设为多根。在Cu导线16的材料中能够使用纯Cu,但不限定于此,能够使用以Cu为主成分的Cu含有量是重量比50%以上的材料。另外,也可以使用用Al等其他金属、有机膜涂敷Cu而得到的材料。
功率半导体元件12的背面通过焊料等接合材料17与底板18电以及机械地接合。
以往,在产品制造时或者元件动作中Cu电极1成为高温时,Cu电极1的Cu晶粒生长,因而对Cu电极1下的层间绝缘膜7施加应力,从而在层间绝缘膜7中发生裂纹这一点成为问题。但是,根据实施方式1所涉及的半导体装置101的结构,在Cu电极1与层间绝缘膜7之间存在应力缓和层13,所以能够用应力缓和层13缓和Cu晶粒的生长所致的应力,抑制在层间绝缘膜7中发生裂纹。
<A-2.变形例>
也可以是应力缓和层13的一部分或者全部由断裂韧性值比包括SiO2的层间绝缘膜7大的阻挡金属层14构成。图3是示出应力缓和层13的一部分由阻挡金属层14构成的半导体装置102的构造的剖面图。除了应力缓和层13以外,半导体装置102的结构与半导体装置101相同。
将阻挡金属层14以外的应力缓和层13称为非阻挡金属应力缓和层21。即,在半导体装置102中,应力缓和层13包括非阻挡金属应力缓和层21和阻挡金属层14。非阻挡金属应力缓和层21在俯视时与Cu电极1的中心重叠的位置具有开口部。阻挡金属层14是覆盖非阻挡金属应力缓和层21和其开口部而形成的。能够通过阻挡金属层14,防止Cu扩散到源极区域5以及非阻挡金属应力缓和层21。在阻挡金属层14中,使用W(钨)、Ta(钽)、Mo(钼)、Ti(钛)等金属、TiN(氮化钛)、TiSiN(氮化硅钛)、WN(氮化钨)、TaN(氮化钽)等氮化物、TaC(碳化钽)、TiC(碳化钛)等金属碳化物等材料。
在以上的说明中,在功率半导体元件12的半导体基板中使用了SiC基板,但也可以使用Si基板等其他半导体基板。另外,功率半导体元件12除了MOSFET以外,也可以是IGBT(Insulated Gate Bipolar Transistor,绝缘栅双极晶体管)等具备绝缘栅电极的功率半导体元件、肖特基势垒二极管、PN二极管等其他功率半导体元件。
<A-3.效果>
实施方式1所涉及的半导体装置101具备:作为半导体层的源极区域5;层间绝缘膜7,在源极区域5上具有开口部地形成,包括氧化硅;Cu电极1,经由层间绝缘膜7的开口部与源极区域5电连接,其端部位于层间绝缘膜7的端部的内侧的层间绝缘膜7上;以及应力缓和层13,形成于Cu电极1与层间绝缘膜7之间,包括断裂韧性值比层间绝缘膜7大的材料,从Cu电极1的端部的内侧设置至外侧。因此,能够通过层间绝缘膜7和Cu电极1,吸收Cu导线键合时的冲击,抑制半导体元件的元件不良。另外,能够用应力缓和层13缓和由于高温时的Cu晶粒的生长从Cu电极1产生的应力,所以能够抑制在层间绝缘膜7中发生裂纹。
另外,在半导体装置101中,应力缓和层13在层间绝缘膜7的开口部上具有开口部地形成,应力缓和层13的开口部端比层间绝缘膜7的开口部端位于内侧。因此,Cu电极1经由应力缓和层13的开口部以及层间绝缘膜7的开口部与源极区域5电连接。
另外,半导体装置102由于应力缓和层13的一部分或者全部是阻挡金属层14,所以能够通过阻挡金属层14防止Cu扩散到源极区域5。
另外,在半导体装置102中,应力缓和层13具备阻挡金属层14、和非阻挡金属应力缓和层21,非阻挡金属应力缓和层21在层间绝缘膜7的开口部上具有开口部地形成,阻挡金属层14从非阻挡金属应力缓和层21的开口部中的源极区域5上形成至非阻挡金属应力缓和层21上,其端部比Cu电极1的端部位于外侧。因此,能够通过阻挡金属层14防止Cu扩散到应力缓和层13。
另外,在半导体装置101、102中,通过使Cu电极1的厚度成为15μm以上,能够利用Cu电极1缓和Cu导线键合的冲击,抑制功率半导体元件12的元件不良。
另外,在半导体装置101、102中,通过使应力缓和层13的厚度成为100nm以上,能够缓和Cu结晶生长所致的向层间绝缘膜7的应力。进而,如果使应力缓和层13的厚度成为200nm以上,则能够更可靠地缓和Cu结晶生长所致的向层间绝缘膜7的应力,抑制向层间绝缘膜7发生裂纹。
另外,在半导体装置101、102的Cu电极1上接合Cu导线16。根据半导体装置101、102的结构,能够在通过Cu电极1缓和Cu导线键合所致的向功率半导体元件12的冲击的同时,抑制由于Cu晶粒的生长向层间绝缘膜7发生裂纹。
另外,通过使功率半导体元件12的基板成为SiC基板,使源极区域5成为SiC层,能够得到低损失且能够高速动作以及高温动作的半导体装置。
<B.实施方式2>
<B-1.结构>
图4是示出本发明的实施方式2所涉及的半导体装置103的构造的剖面图。半导体装置103用断裂韧性值比包括SiO2的层间绝缘膜7大的阻挡金属层14构成应力缓和层13的一部分这一点与半导体装置102相同,但在层间绝缘膜7与非阻挡金属应力缓和层21之间设置阻挡金属层14这一点与半导体装置102不同。其以外的半导体装置103的结构与半导体装置102相同。
在半导体装置102中,为了不使Cu电极的Cu在应力缓和层13中扩散,在Cu电极1与非阻挡金属应力缓和层21之间设置阻挡金属层14。但是,在非阻挡金属应力缓和层21使用即使与Cu接触也不会使Cu扩散到内部的材料的情况下,也可以从层间绝缘膜7的开口部上至层间绝缘膜7上、即在非阻挡金属应力缓和层21与层间绝缘膜7之间设置阻挡金属层14。即使是这样的结构,由于在源极区域5与Cu电极1之间存在阻挡金属层14,所以能够防止Cu扩散到源极区域5。
根据实施方式2所涉及的半导体装置103,除了实施方式1的效果以外还起到以下的效果。即,Cu电极1的端部不与阻挡金属层14接触,所以能够抑制起因于高温时的Cu晶粒的生长而发生的应力所致的向阻挡金属层14的损伤。因此,能够提高高温动作的可靠性。
<B-2.效果>
根据实施方式2所涉及的半导体装置103,应力缓和层13具备阻挡金属层14、和非阻挡金属应力缓和层21,阻挡金属层14从层间绝缘膜7的开口部中的半导体层5上形成至层间绝缘膜7上。即,阻挡金属层14形成于非阻挡金属应力缓和层21与层间绝缘膜7之间。因此,Cu电极1的端部不与阻挡金属层14接触,所以能够抑制起因于高温时的Cu晶粒的生长而发生的应力所致的向阻挡金属层14的损伤,所以能够提高高温动作的可靠性。
另外,在半导体装置103中,通过使应力缓和层13的厚度、即阻挡金属层14和非阻挡金属应力缓和层21的合计厚度成为100nm以上,能够缓和Cu结晶生长所致的向层间绝缘膜7的应力。进而,如果使应力缓和层13的厚度、即阻挡金属层14和非阻挡金属应力缓和层21的合计厚度成为200nm以上,则能够更可靠地缓和Cu结晶生长所致的向层间绝缘膜7的应力,抑制向层间绝缘膜7发生裂纹。
<C.实施方式3>
<C-1.结构>
图5是示出本发明的实施方式3所涉及的半导体装置104的构造的剖面图。在实施方式1以及实施方式2中,应力缓和层13在层间绝缘膜7的开口部上具有开口部,Cu电极1和功率半导体元件12的源极区域5经由应力缓和层13的开口部电连接。相对于此,在实施方式3中构成为:从层间绝缘膜7的开口部至层间绝缘膜7上,在Cu电极1的下方整体形成应力缓和层13。即使是这样的结构,通过用导电体形成应力缓和层13,Cu电极1在层间绝缘膜7的开口部中,经由应力缓和层13与功率半导体元件12的源极区域5电连接。作为应力缓和层13的材料,可以举出Al等。应力缓和层13的厚度最好为100nm以上,如果是200nm以上,则能够更可靠地抑制向层间绝缘膜7发生裂纹。
根据半导体装置104,除了实施方式1的效果以外还起到以下的效果。即,Cu电极1经由层间绝缘膜7的开口部与功率半导体元件12的半导体层电连接,所以能够使Cu电极1的电阻低于实施方式1。另外,通过应力缓和层13覆盖Cu电极1的下部整体,能够高效地向应力缓和层13吸收高温时的Cu晶粒的生长所引起的应力。因此,相比于实施方式1,能够更可靠地抑制在层间绝缘膜7中发生裂纹,能够提高高温动作的可靠性。
<C-2.变形例>
应力缓和层13的一部分或者全部也可以由断裂韧性值比包括SiO2的层间绝缘膜7大的阻挡金属层14构成。图6是示出应力缓和层13的一部分由阻挡金属层14构成的半导体装置105的构造的剖面图。除了应力缓和层13以外,半导体装置105的结构与半导体装置104相同。
在半导体装置105中,应力缓和层13包括非阻挡金属应力缓和层21和阻挡金属层14。非阻挡金属应力缓和层21由导电体形成。阻挡金属层14如图6所示,设置于非阻挡金属应力缓和层21的上表面、即非阻挡金属应力缓和层21与Cu电极1之间。
<C-3.效果>
根据实施方式3所涉及的半导体装置104,应力缓和层13由导电体形成,从层间绝缘膜7的开口部形成至层间绝缘膜7上。因此,Cu电极1经由层间绝缘膜7的开口部与功率半导体元件12的半导体层电连接,所以能够降低Cu电极1的电阻。另外,通过应力缓和层13覆盖Cu电极1的下部整体,能够高效地向应力缓和层13吸收高温时的Cu晶粒的生长所引起的应力。因此,能够抑制在层间绝缘膜7中发生裂纹,能够提高高温动作的可靠性。
另外,根据实施方式3的变形例所涉及的半导体装置105,应力缓和层13具备阻挡金属层14和非阻挡金属应力缓和层21,阻挡金属层14设置于非阻挡金属应力缓和层21与Cu电极1之间,所以能够抑制Cu扩散到非阻挡金属应力缓和层21。
<D.实施方式4>
<D-1.结构>
图7是示出本发明的实施方式4所涉及的半导体装置106的构造的剖面图。在实施方式1、实施方式2以及实施方式3中,Cu导线16与Cu电极1接合。相对于此,在实施方式4中,功率模块的主电极布线19直接与Cu电极1接合。主电极布线19和Cu电极1既可以使用图7所示的焊料等接合材料20接合,也可以不使用接合材料而使用超声波接合来接合。
在图7中,使半导体装置106的Cu电极1与功率半导体元件12之间的构造成为与实施方式1的变形例所涉及的半导体装置102同样的构造。但是,这些构造也可以与半导体装置101、103、104、105中的任意一个相同。
根据实施方式4所涉及的半导体装置106,除了实施方式1、实施方式2以及实施方式3的效果以外,还起到以下的效果。即,主电极布线19直接与Cu电极1接合,所以相比于使用Cu导线的情况,能够改善功率半导体元件12的开关动作的反复所引起的热应力所致的Cu电极1上部的疲劳寿命,而且能够降低功率模块的阻抗。通过主电极布线19直接与Cu电极1接合,向功率半导体元件12的热应力增加,但通过设置应力缓和层13,能够抑制在层间绝缘膜7中发生裂纹,能够提高高温动作的可靠性。
<D-2.效果>
根据实施方式4所涉及的半导体装置106,主电极布线19直接与Cu电极1接合。因此,相比于实施方式1、实施方式2以及实施方式3,能够改善功率器件的开关动作的反复所引起的热应力所致的Cu电极1上部的疲劳寿命,而且能够降低功率模块的阻抗。另外,能够用应力缓和层13缓和由于高温时的Cu晶粒的生长从Cu电极1产生的应力,所以能够抑制在场绝缘膜7中发生裂纹,能够提高高温动作的可靠性。
此外,本发明能够在该发明的范围内,自由地组合各实施方式或者将各实施方式适宜地变形、省略。
虽然详细说明了本发明,但上述说明在所有方案中仅为例示,本发明不限于此。应被理解为不脱离本发明的范围而能够设想未例示的无数的变形例。
Claims (13)
1.一种半导体装置,具备:
半导体层(5);
层间绝缘膜(7),在所述半导体层(5)上具有开口部地形成,包括氧化硅;
Cu电极(1),经由所述层间绝缘膜(7)的开口部而与所述半导体层(5)电连接,其端部位于所述层间绝缘膜(7)的端部的内侧的所述层间绝缘膜(7)上;以及
应力缓和层(13),形成于所述Cu电极(1)与所述层间绝缘膜(7)之间,包括断裂韧性值比所述层间绝缘膜(7)大的材料,从所述Cu电极(1)的端部的内侧设置至外侧。
2.根据权利要求1所述的半导体装置,其中,
所述应力缓和层(13)的厚度是100nm以上。
3.根据权利要求2所述的半导体装置,其中,
所述应力缓和层(13)的厚度是200nm以上。
4.根据权利要求1至3中的任意一项所述的半导体装置,其中,
所述应力缓和层(13)在所述层间绝缘膜(7)的开口部上具有开口部地形成,所述应力缓和层(13)的开口部端比所述层间绝缘膜(7)的开口部端位于内侧。
5.根据权利要求1至3中的任意一项所述的半导体装置,其中,
所述应力缓和层(13)的一部分或者全部是阻挡金属层(14)。
6.根据权利要求5所述的半导体装置,其中,
所述应力缓和层(13)具备所述阻挡金属层(14)和非阻挡金属应力缓和层(21),
所述非阻挡金属应力缓和层(21)在所述层间绝缘膜(7)的开口部上具有开口部地形成,
所述阻挡金属层从所述非阻挡金属应力缓和层(21)的开口部中的所述半导体层(5)上形成至所述非阻挡金属应力缓和层(21)上,其端部比所述Cu电极(1)的端部位于外侧。
7.根据权利要求5所述的半导体装置,其中,
所述应力缓和层(13)具备所述阻挡金属层(14)和非阻挡金属应力缓和层(21),
所述阻挡金属层(14)从所述层间绝缘膜(7)的开口部中的所述半导体层(5)上形成至所述层间绝缘膜(7)上。
8.根据权利要求1至3中的任意一项所述的半导体装置,其中,
所述应力缓和层(13)由导电体形成,从所述层间绝缘膜(7)的开口部形成至所述层间绝缘膜(7)上。
9.根据权利要求8所述的半导体装置,其中,
所述应力缓和层(13)具备阻挡金属层(14)和非阻挡金属应力缓和层(21),
所述阻挡金属层(14)设置于所述非阻挡金属应力缓和层(21)与所述Cu电极(1)之间。
10.根据权利要求1至9中的任意一项所述的半导体装置,其中,
所述Cu电极(1)的厚度是15μm以上。
11.根据权利要求1至10中的任意一项所述的半导体装置,其中,
在所述Cu电极(1)上接合Cu导线(16)。
12.根据权利要求1至10中的任意一项所述的半导体装置,其中,
在所述Cu电极(1)上接合主电极布线(19)。
13.根据权利要求1至12中的任意一项所述的半导体装置,其中,
所述半导体层(5)是SiC。
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CN111244117B (zh) * | 2020-04-24 | 2020-07-28 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
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