CN106298730B - 具有电连接至导电结构的金属结构的半导体器件 - Google Patents

具有电连接至导电结构的金属结构的半导体器件 Download PDF

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CN106298730B
CN106298730B CN201610365247.2A CN201610365247A CN106298730B CN 106298730 B CN106298730 B CN 106298730B CN 201610365247 A CN201610365247 A CN 201610365247A CN 106298730 B CN106298730 B CN 106298730B
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metal
layer
semiconductor
precursor
semiconductor devices
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CN106298730A (zh
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M·施内甘斯
F·黑林
H-J·舒尔策
B·魏德甘斯
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本发明的各个实施例涉及具有电连接至导电结构的金属结构的半导体器件。半导体器件(500)包括半导体裸片(900)，该半导体裸片(900)包括导电结构(150)。金属结构(350)电连接至导电结构(150)并且包含第一金属。辅助层堆叠(320)夹设在导电结构(150)与金属结构(350)之间，并且包括粘附层(325)，该粘附层(325)包括第二金属。辅助层堆叠(320)进一步包括金属扩散阻挡层(321)，该金属扩散阻挡层(321)在粘附层(325)与导电结构(150)之间。粘附层(325)包含该第一金属和第二金属。

Description

具有电连接至导电结构的金属结构的半导体器件
技术领域
本公开总体上涉及半导体器件，具体地涉及具有电连接至导电结构的金属结构的半导体器件。
背景技术
金属结构诸如功率半导体开关的功率金属化***通常通过电化学金属图案电镀而形成，并且可以形成用于在半导体裸片中形成的导电结构的端子或者键合焊盘。金属扩散阻挡层防止金属原子从金属结构扩散到在半导体裸片中的结构中。
需要改进形成在半导体裸片的表面上的金属结构。
发明内容
本发明的目的通过独立权利要求项的主题来实现。从属权利要求项涉及另外的实施例。
根据一个实施例，半导体器件包括半导体裸片，该半导体裸片包括导电结构。包含第一金属的金属结构电连接至导电结构，其中辅助层堆叠夹设在导电结构与金属结构之间。辅助层堆叠包括粘附层，该粘附层包含第二金属；以及金属扩散阻挡层，该金属扩散阻挡层在粘附层与导电结构之间。粘附层包含该第一金属和第二金属。
根据另一实施例，半导体器件包括半导体裸片，该半导体裸片包括导电结构。金属结构电连接至导电结构并且包含第一金属。辅助层堆叠夹设在导电结构与金属结构之间并且包括粘附层，该粘附层包含第二金属；金属扩散阻挡层，该金属扩散阻挡层在粘附层与导电结构之间；以及辅助阻挡层，该辅助阻挡层在粘附层与金属结构之间。
根据另一实施例，制造半导体器件的方法包括：形成包括导电结构的半导体衬底。在导电结构的第一部分上形成前体辅助层堆叠，其中前体辅助层堆叠包括前体粘附层和阻挡层，该阻挡层在前体粘附层与导电结构之间，以及其中前体粘附层包含第二金属。在前体辅助层堆叠上，形成包含第一金属的金属结构。通过前体辅助层堆叠的部分，形成包含第一金属和第二金属的粘附层。
本领域的技术人员通过阅读以下详细说明和对应附图会认识到附加的特征和优点。
附图说明
所附附图被包含进来以提供对本发明的进一步理解，并且被包含在本说明书中并且构成本说明书的一部分。附图图示了本发明的各个实施例，并且同说明书一起用于说明本发明的原理。本发明的其它实施例和预期优点将由于通过参考以下详细说明得到更好地理解而容易理解。
图1是根据一个实施例的具有在金属结构与导电结构之间的辅助层堆叠的半导体器件的部分的示意性竖直截面图。
图2A是根据一个实施例的具有在金属结构与导电结构之间的辅助层堆叠的半导体器件的部分的示意性竖直截面图，其中导电结构形成在半导体部分中。
图2B是根据一个实施例的具有在金属结构与导电结构之间的辅助层堆叠的半导体器件的部分的示意性竖直截面图，其中形成在半导体部分中的导电结构被介电钝化层覆盖。
图2C是根据一个实施例的具有在金属结构与导电结构之间的辅助层堆叠的半导体器件的部分的示意性竖直截面图，其中布线线路形成导电结构。
图2D是根据一个实施例的具有在金属结构与导电结构之间的辅助层堆叠的半导体器件的部分的示意性竖直截面图，其中导电结构形成在半导体部分的背侧上。
图2E是根据另一实施例的具有在金属结构与导电结构之间的辅助层堆叠的半导体器件的部分的示意性竖直截面图。
图3A是根据一个实施例的具有夹设在金属结构与接触结构之间的辅助层堆叠的半导体器件的部分的示意性竖直截面图，其中金属结构包括粘附层的金属原子。
图3B是根据一个实施例的具有夹设在金属结构与接触结构之间的辅助层堆叠的半导体器件的部分的示意性竖直截面图，其中辅助阻挡层在粘附层与金属结构之间。
图4A是根据一个实施例的半导体器件的部分的截面的FIB(聚焦离子束)图像，该实施例涉及粘附层和包含该粘附层的扩散金属原子的金属结构。
图4B是根据一个实施例的半导体器件的部分的截面图的FIB图像，该实施例涉及由第二金属和金属结构的第一金属的合金形成的粘附层。
图5是根据另一实施例的具有在功率金属化与布线层之间的辅助层堆叠的功率半导体器件的示意性竖直截面图。
图6A是半导体衬底的部分的示例性竖直截面图，用于图示在沉积了金属扩散阻挡层之后制造根据一个实施例的具有粘附层的半导体器件的方法，该实施例涉及由合金形成的粘附层。
图6B是在金属扩散阻挡层上形成合金形成层和前体粘附层之后图6A的半导体衬底部分的示意性竖直截面图。
图6C示出了在通过使前体粘附层和合金形成层合金化而形成的粘附层上形成电镀掩膜之后图6B的半导体衬底部分。
图6D是在通过电化学金属图案电镀形成金属结构之后图6C的半导体衬底部分的示意性截面图。
图6E是在将包含在粘附层中的扩散金属原子热处理到金属结构中之后图6D的半导体衬底部分的示意性截面图。
图7A是半导体衬底的部分的示意性竖直截面图，用于图示在形成电镀掩膜之后制造具有根据一个实施例的具有粘附层的半导体器件的方法，其中前体粘附层的原子扩散到金属结构中。
图7B是在前体粘附层的原子扩散到通过电化学金属图案电镀形成的金属结构中之后图7A的半导体衬底部分的示意性竖直截面图。
图8A是半导体衬底的部分的示意性竖直截面图，用于图示在沉积合金形成层和前体粘附层之后制造根据一个实施例的具有粘附层的半导体器件的方法，该实施例涉及在金属结构与粘附层之间的辅助阻挡层。
图8B是在将辅助阻挡层沉积在由前体粘附层和合金形成层形成的粘附层上之后图8A的半导体衬底部分的示意性竖直截面图。
图8C是在通过电化学金属图案电镀形成金属结构之后图8B的半导体衬底部分的示意性截面图。
具体实施方式
在以下详细说明中参照对应附图，对应附图构成本详细说明的一部分，并且以图示的方式在其中示出了可以实践本发明的具体实施例。应理解，可以使用其它实施例，并且在不背离本发明的范围的情况下，可以作出结构上或者逻辑上的改变。例如，针对一个实施例图示或描述的特征可以用于其它实施例，或者与其它实施例结合以产生另一实施例。本发明意在包括这种修改和变型。使用特定语言对示例进行描述，该特定语言不应该理解为对所附权利要求书的范围进行限制。附图未按比例绘制，并且仅用作图示之目的。为清楚起见，如果没有另行说明，那么在不同附图中通过相应的附图标记表示相同的元件。
术语“具有”、“包含”、“包括”等是开放性术语，并且这些术语表示存在所述结构、元件者特征的，但也不排除存在其它元件或者特征。“一”、“一个”和“该”旨在包括复数形式和单数形式，除非上下文另有明确指示。
术语“电连接”描述了在电连接的元件之间的永久低欧姆连接，例如，在相关元件之间的直接接触、或者经由金属和/或高掺杂半导体的低欧姆连接。术语“电耦合”包括：可以在电耦合的元件之间设置一种或多种用于信号传输的中间元件，例如，可控制为在第一状态下临时提供低欧姆连接并且在第二状态下临时提供高欧姆电去耦合的元件。
附图通过在掺杂类型“n”或者“p”旁标注“-”或者“+”来图示相对掺杂浓度。例如，“n-”指比“n”掺杂区域的掺杂浓度更低的掺杂浓度，而“n+”掺杂区域具有比“n”掺杂区域的掺杂浓度更高的掺杂浓度。相对掺杂浓度相同的掺杂区域并不一定具有相同的绝对掺杂浓度。例如，两个“n”掺杂的不同区域可以具有相同或者不同的绝对掺杂浓度。
图1示出了半导体器件500，该半导体器件500可以是用于切换或者整流大于10mA(例如，大于100mA、或者1A、或者10A、或者100A)的负载电流的功率半导体器件。半导体器件500可以是功率半导体二极管并且/或者可以包括晶体管单元。例如，半导体器件500可以是IGFET(绝缘栅极场效应晶体管)或者可以包括IGFET，例如，MOSFET(金属氧化物半导体FET)，其在通常意义中包括具有金属栅极的FET以及具有非金属栅极的FET、沟槽场板FET、超结FET、或者集成了功率MOSFET的晶体管单元和例如采用CMOS(互补金属氧化物半导体)技术的逻辑和/或驱动器电路的低压晶体管单元的智能FET集成晶体管单元、IGBT(绝缘栅极双极晶体管)、或者MCD(MOS控制二极管)。
半导体器件500包括半导体裸片900，该半导体裸片900包括导电结构150，其中导电结构150可以从主表面901延伸到半导体裸片900中或者可以形成为与半导体裸片900的主表面901相距一定距离。主表面901可以在形成有布线层和晶体管单元的正侧处，或者与该正侧相对。
例如，半导体裸片900可以包括半导体部分，该半导体部分包括导电结构150，其中导电结构150可以是重掺杂区域或者来自非半导体材料的另外的导电结构。根据另一实施例，半导体裸片900进一步包括在半导体部分的第一表面上的介电结构，并且形成在介电结构的与半导体部分相对的一侧的布线板中的布线线路形成导电结构150。
在图示的实施例中，半导体裸片900包括直接沿着在半导体裸片900的正侧处的主表面901的介电钝化层200，其中半导体裸片900的主表面901可以是近似平面的或者可以由共面表面部分所跨的平面来限定。主表面901的法线限定竖直方向。与半导体裸片900的主表面901平行的方向是水平方向。
钝化层200可以是均质层或者可以是包括两个或者更多个介电材料子层的层堆叠，例如氧化硅、氮化硅、氮氧化硅、硅酸玻璃(例如，USG(未掺杂硅酸玻璃)、BSG(硼硅酸玻璃)、PSG(磷硅酸玻璃)、BPSG(硼磷硅酸玻璃)、FSG(氟硅酸玻璃)或者OSG(有机硅酸玻璃)、SOG(旋涂玻璃))、或者介电树脂(例如，聚酰亚胺)。
金属结构350形成在主表面901上。金属结构350是最终的金属化平面的一部分，该最终金属化平面是在主表面901上方的最上的金属化平面，并且是半导体器件500的最外的金属化平面。金属结构350可以包括接触部分355，该接触部分355通过在钝化层200中的开口延伸至导电结构150或者延伸到导电结构150中。金属结构350可以包含第一金属作为主要成分，其中该主要成分为具有最高质量分数的成分。第一金属可以为铜(Cu)、铝(Al)或者银(Ag)，并且金属结构350的基础材料可以为银(Ag)、铜(Cu)、铜合金、铝(Al)、铝合金、或者可以包含另外的成分的铜铝合金。除了基础材料之外，金属结构350可以包含另外的成分，例如，扩散到基础材料中的另外的金属的原子358。
金属结构350的竖直延伸可以是至少500nm，例如，至少2μm或者至少5μm。
辅助层堆叠320夹设在金属结构350与半导体裸片900之间。延伸穿过介电钝化层200的这部分金属结构350可以形成接触部分355。
辅助层堆叠320包括至少粘附层325和金属扩散阻挡层321，该金属扩散阻挡层321在粘附层325与半导体裸片900之间。
金属扩散阻挡层321阻挡至少第一金属的原子的扩散，并且也可以阻挡另外的金属原子的扩散。金属扩散阻挡层321可以是通过钛化钨(TiW)或者钨(W)和钛(Ti)溅射的层、钛层(Ti)、氮化钛层(TiN)、钨层(W)、氮化钽层(TaN)、或者钽层(Ta)。根据一个实施例，金属扩散阻挡层321是包含70wt％至95wt％的钨(W)和5wt％至30wt％的钛(Ti)的溅射层。
粘附层325包含具有至少80wt％的质量分数的作为主要成分或者作为次要成分的第二金属，该第二金属不是第一金属。根据一个实施例，粘附层325包含纯钛(Ti)、纯铝(Al)、或者铝铜合金AlxCuy，其中x＝80％至99.5％，并且y＝100％-x。第二金属具有比第一金属更大的对于金属扩散阻挡层的一种或者多种成分的束缚能。另外，第二金属可以与第一金属形成合金，例如，固溶体或者金属间相。进一步地，第二金属的杨氏模量可以低于第一金属的杨氏模量。例如，第一金属的杨氏模量可以超过第二金属的杨氏模量至少20％。
例如，第一金属为铜，并且第二金属可以为铝(Al)、金(Au)、银(Ag)、锡(Sn)、锌(Zn)、铅(Pb)、或者镍(Ni)。粘附层325可以包含另外的成分，例如，第一金属和/或选自铝(Al)、金(Au)、银(Ag)、锡(Sn)、锌(Zn)、铅(Pb)和镍(Ni)中的至少一种另外的金属。根据一个实施例，第一金属为具有大约120GPa的杨氏模量的铜(Cu)，并且第二金属为具有大约70GPa的杨氏模量的铝(Al)。
典型功率金属化***包括：功率金属(例如，铜)的较厚金属化层，以及防止功率金属的原子扩散到半导体裸片中的扩散阻挡层。在功率金属与扩散阻挡层的成分之间的束缚能可以为低。另外，典型金属扩散阻挡层的热膨胀系数可以较大地偏离功率金属的热膨胀系数。可替代地或者另外地，典型的金属扩散阻挡层仅仅提供至来自例如铜的金属结构的纯的粘附(pure adhesion)。结果，当重复接通和切断功率开关器件时所生成的循环热应力倾向于使金属化层与阻挡层局部地分层。功率半导体器件的倾向于分层的部分可能会局部过热，并且功率半导体器件可能会受到不可挽回的损坏。
相反，在适当热处理之后，包含与第一金属不同的、并且选自铝(Al)、金(Au)、银(Ag)、锡(Sn)、锌(Zn)、铅(Pb)和镍(Ni)的至少一种第二金属的粘附层，形成至基底金属扩散阻挡层321的高键合能量的强键合。
另外，第二金属可以溶入第一金属中从而使得第一金属和第二金属形成第二金属在第一金属中的固溶体，第一金属充当溶剂。在固溶体中，第二金属的原子替代在第一金属的晶格中的第一金属的原子，或者可以间隙地结合在晶格中。可替代地或者另外地，第一金属和第二金属可以形成金属间相，在该金属间相中，第一金属和第二金属的原子有序地布置到晶体的不同部位中，并且在该金属间相中，形成包含这两种金属的晶胞。对于固溶体和金属间相两者而言，在第一金属和第二金属的原子之间的相互作用改进了金属结构350在金属扩散阻挡层321上的粘附。
根据一个实施例，第二金属的扩散到第一金属的原子矩阵中的原子形成粘附层325，该粘附层325具有至金属扩散阻挡层321和金属结构两者的高的键合能量，并且在第一金属与第二金属之间不形成金属间相。
在粘附层325中，第一金属的原子可以对与在金属结构350中的第一金属的原子更高的键合能量有贡献。第二金属的原子可以具有与金属扩散阻挡层321的成分更高的键合能量。可替代地或者另外地，粘附层325可以具有比金属结构350更低的杨氏模量，从而减少在金属结构350与金属扩散阻挡层321之间的热机械应力。金属结构350可以包含高达10wt％的第二金属，其中第二金属的浓度可以随着与粘附层325相距的距离的增加而降低。
根据另一实施例，第二金属不与第一金属相互作用，并且形成不具有第一金属但是比金属结构350更易延展的粘附层325，以缓和在金属结构350与金属扩散阻挡层321之间的热机械应力。
第二金属形成与金属扩散阻挡层321的成分中的至少一种成分的强键合，该金属扩散阻挡层321可以包含钨(W)和钛(Ti)，例如90wt％的W和10wt％的Ti。另外，第二金属的杨氏模量可以显著低于第一金属的杨氏模量，从而使得粘附层325比金属结构350更易延展。结果，粘附层325可以在一定程度上补偿金属扩散阻挡层321和金属结构350的不同的热膨胀系数，例如，在辅助阻挡层使粘附层325与金属结构350分离的情况下。根据其它实施例，例如，在金属结构350与粘附层325之间未形成辅助阻挡层的情况下，在适当的热处理期间第二金属的原子可以扩散到金属结构350中。
粘附层325可以提供至金属扩散阻挡层321的高的键合能量并且/或者可以减少在金属结构350与金属扩散阻挡层321之间的热机械应力。
图2A涉及在金属结构350与半导体部分100(即，功率半导体二极管)之间具有广的接触面积区域(area)的半导体器件500。半导体部分100包括可以形成例如阳极区域的掺杂区域154。如上所描述的并且包括至少金属扩散阻挡层321和粘附层325的辅助层堆叠320可以夹设在金属结构350与半导体裸片900之间，并且可以直接邻接掺杂区域154和金属结构350两者。金属结构350可以由第一金属(例如，铜)形成，并且可以包括第二金属(例如，源自辅助层堆叠320的铝)的原子358，其中第一金属和第二金属可以形成金属间相或者固溶体。
图2B至图2E的半导体器件500可以是基于半导体裸片900的功率半导体开关器件，包括电子元件，例如，二极管或者晶体管单元TC，该晶体管单元可以是控制与半导体部分100的第一表面101平行的负载电流的平面晶体管单元、或者用于控制在竖直方向上通过半导体部分100的负载电流的竖直晶体管单元TC。
半导体裸片900的半导体部分100包括一个或者多个掺杂区域154，该掺杂区域154可以是，例如，晶体管单元TC的源极区、本体区或者漏极区。半导体裸片900进一步包括覆盖半导体部分100的第一表面101的部分的介电结构210。
在半导体裸片900的主表面901上的金属结构350延伸穿过在介电结构210中的开口。
图2C涉及具有半导体裸片900的半导体器件500，包括在半导体部分100的具有如参照图2B所描述的晶体管单元TC的第一表面101上形成的介电结构210。介电结构210使布线线路152与半导体部分100分离。接触过孔153延伸穿过在介电结构210中的开口，并且将布线线路152与在半导体部分100中的掺杂区域154电连接。层间电介质220覆盖介电材料210和布线线路152。金属结构350延伸穿过在层间电介质220中的开口，并且电连接至布线线路152。如上所描述的辅助层堆叠320可以夹设在金属结构350与布线线路152之间。
在图2D中，半导体裸片900包括多个晶体管单元TC和多个空间上分离的掺杂区域154，该多个空间上分离的掺杂区域154可以沿着或者接近半导体部分100的第一表面101形成。延伸穿过介电结构210的接触过孔153，可以将第一负载电极370与在半导体器件500的正侧处的掺杂区域154电连接。
在背侧上，另外的掺杂区域156可以沿着半导体部分100的第二表面102形成，其中第二表面102与第一表面101相对。如上所描述的并且包括至少金属扩散阻挡层321和粘附层325的辅助层堆叠320夹设在第二表面102与金属结构350之间，该金属结构350主要基于第一金属并且可以包含第二金属(例如，源自辅助层堆叠320的铝)的原子358。
图2E的半导体器件500将用于第一金属结构和第二金属结构350x、350y的辅助层堆叠320x、320y组合在半导体裸片900的相对侧上。
第一金属结构350x电连接至在半导体裸片900的第一侧处的第一导电结构150x，其中第一导电结构150x可以是掺杂区域或者如图所示的布线线路。第二金属结构350y电连接至在半导体裸片900的与第一侧相对的第二侧处的第二导电结构150y，其中第二导电结构150y可以是掺杂区域。第一辅助层堆叠320x夹设在第一导电结构150x与第一金属结构350x之间。第二辅助层堆叠320y夹设在第二导电结构150y与第二金属结构350y之间。
第一金属结构350x可以包含另外的第一金属作为第二金属结构350y，例如，第一金属结构350x可以包含铜或者铝作为主要成分，而第二金属结构350y可以包含例如银(Ag)作为主要成分。根据一个实施例，第一金属结构和第二金属结构350x、350y包含相同的金属作为主要成分。
第一辅助层堆叠和第二辅助层堆叠320x、320y可以具有根据各个实施例的配置中的任一种，其中第一辅助层堆叠和第二辅助层堆叠320x、320y可以具有相同的内部配置和层顺序或者不同的配置。
图3A涉及具有包含第二金属的扩散原子358的金属结构350的各个实施例，并且示出了沿着穿过具有金属结构350的半导体器件500的竖直截面的、第二金属的原子358的分布。暗点与检测到的第二金属的原子358相对应。第二金属的原子358沿着至金属扩散阻挡层321的界面和至金属结构350的暴露表面351两者高密度地存在。
第二金属的原子358沿着与金属扩散阻挡层321的界面累积。由于与金属扩散阻挡层321的材料的高键合能量的作用，第二金属的原子358提供了至金属扩散阻挡层321的良好粘附。与金属结构350的第一金属组合，第二金属的原子358可以形成在粘附层325，在该粘附层325中第二金属的原子358溶解在第一原子的矩阵中，并且/或者在该粘附层325中第一金属和第二金属形成金属间相，其中在这两种情况下粘附层325都减少了金属结构350发生分层的倾向。
在第一金属为铜并且第二金属为铝的一个实施例中，铝原子可以沿着金属结构350的暴露表面351累积，并且可以防止金属结构350在暴露表面351处氧化，从而使得金属结构350维持良好的键合和焊接特性。进一步地，第二金属可以修饰在金属结构350中的裂纹和/或晶界。通过沿着裂纹和/或晶界局部地形成金属间相，第二金属可以通过改进跨裂纹和/或晶界的凝聚力来增加器件的可靠性。
在图3B中，辅助层堆叠320包括有在粘附层325与金属结构350之间的辅助阻挡层329。辅助阻挡层329可以夹设在粘附层325与金属结构350之间，并且可以直接邻接它们两者，如图所示。根据另一实施例，至少一个另外的层可以在粘附层325与金属结构350之间。金属扩散阻挡层321可以夹设在粘附层325与半导体裸片900之间，如图所示。根据另一实施例，至少一个另外的层可以在粘附层325与半导体裸片900之间。
粘附层325可以包含第二金属作为主要成分，该第二金属不是金属结构350的第一金属。例如，粘附层325是由Al、Sn、Zn、Ni、Pb、Au、Ag和Ti中的一种或者多种组成的层。根据一个实施例，粘附层325包含Al作为主要成分或者可以完全由Al组成。根据其它实施例，粘附层325可以包含合金或者由合金组成，该合金可以是第一金属和第二金属的固溶体或者金属间相，例如，铜(Cu)和铝(Al)的合金，或者，例如，铝(Al)在银(Ag)中的固溶体。
在半导体器件500的制造期间，粘附层325可以通过使包括包含第二金属的前体粘附层和包含第一金属的合金形成层的层堆叠合金化而形成，其中合金形成层可以是与用于电镀的种子层相似的层。辅助阻挡层329防止第二金属的原子扩散到金属结构350中，从而使得包含第一金属和第二金属两者的原子的金属间相排他地形成在金属扩散阻挡层321与辅助阻挡层329之间。粘附层325的竖直延伸和性能两者被精确地限定。另外，辅助阻挡层329防止第二金属的原子扩散到金属结构350中，从而使得金属结构350的高的导热率被充分维持，并且不会由于受第二金属的原子的任何污染而降低。
图4A是形成在半导体裸片900上的金属结构350的界面的截面的FIB图像。
包含例如90wt％的钨和10wt％的钛的金属扩散阻挡层321溅射在半导体裸片900上。金属扩散阻挡层321的厚度可以在从50nm至大约500nm的范围内。粘附层325覆盖金属扩散阻挡层321。粘附层325可以通过将由第二金属组成或者包含第二金属的前体粘附层沉积在金属扩散阻挡层321的至少部分上并且将由第一金属组成或者包含第一金属的前体金属结构沉积在前体粘附层的至少部分上而形成。粘附层325的厚度可以在从5nm至大约500nm的范围内。
在沉积前体金属结构之前的第一热处理，可以在第二金属的原子与金属扩散阻挡层321的成分之间形成键合。在沉积前体金属结构的之后的第二热处理，可以使第二金属的原子从前体粘附层扩散到前体金属结构的邻接部分中。第二热处理可以或者可以不完全消耗前体粘附层。
第二热处理形成粘附层325，在该粘附层325中，第二金属的浓度为至少10％，并且该该粘附层325可以包括前体粘附层的残余部分。在图4A的左侧，前体粘附层的残余324作为直接在金属扩散阻挡层321上的细暗线可见。金属结构350由在其中第二金属的浓度低于10％的这部分前体结构形成。
粘附层325强键合至金属扩散阻挡层321和金属结构350两者，并且降低金属结构350发生局部分层的风险。
在图4B中，在第一热处理之前，将由第一金属组成或者包含第一金属的合金形成层或者前体金属结构的至少一部分沉积到前体粘附层上。除了在第二金属的原子与金属扩散阻挡层321的至少一种成分之间的强键合之外，第一热处理形成第一金属和第二金属的较厚合金层。由此生成的合金层有效地作为将金属结构350强键合至金属扩散阻挡层321的粘附层。
根据一个实施例，金属结构350包含铜作为主要成分，并且粘附层325由铜-铝合金组成或者包含铜-铝合金，其中在粘附层325中的铝含量可以导致粘附层325的杨氏模量低于金属结构350的杨氏模量。粘附层325的增加的延展性可以减少发生在金属结构350与金属扩散阻挡层321之间的界面处的热机械应力。
图5涉及场板类型的IGFET，包括来自晶体半导体材料诸如硅的半导体部分100。在半导体部分100的正侧的第一表面101与平面第二表面102平行。在第一表面与第二表面101、102之间的距离与半导体器件500的电压阻断能力有关，并且可以为至少40μm。根据其它实施例，该距离可以在数百μm范围内。在与截面平面垂直的平面中，半导体部分100可以具有矩形形状，该矩形形状具有数毫米的边长。
晶体管单元TC是具有绝缘栅极的场效应晶体管单元，并且控制在第一表面101与第二表面102之间的竖直方向上流动的负载电流。晶体管单元TC的源极区110可以电连接至在半导体器件500的正侧处形成功率金属化的金属结构350，其中金属结构350可以形成或者可以电连接至或者耦合至源极端子S。晶体管单元TC的漏极区可以电连接至在半导体器件500的背侧上的另外的金属结构390。该另外的金属结构390可以形成或者可以电耦合或者连接至漏极端子D。
半导体部分100包括漏极结构120，该漏极结构120包括晶体管单元TC的漏极区并且电连接至该另外的金属结构390。漏极结构120包括漂移区121，在该漂移区121中，掺杂剂浓度可以至少在其竖直延伸的部分处，随着与第一表面101的距离的增加而逐渐地或者阶跃地增加或者减小。根据其它实施例，在漂移区121中的掺杂剂浓度可以近似均匀。
漏极结构120进一步包括接触部分129，该接触部分129可以是重掺杂的基础衬底或者重掺杂层。沿着第二表面102，在接触部分129中的掺杂剂浓度足够高，以与该另外的金属结构390形成欧姆接触。接触部分129可以直接邻接漂移区121。根据其它实施例，一个或者多个另外的层可以夹设在漂移区121与接触部分129之间。
漂移区121包括连续漂移区部分121a，该连续漂移区部分121a形成在位于补偿结构190与接触部分129之间的这部分半导体部分100中，其中补偿结构190从第一表面101延伸到半导体部分100中。半导体部分100的在补偿结构190之间的部分形成半导体台体170，该半导体台体170包括漂移区121的台体部分121b。台体部分121b直接邻接连续漂移区部分121a并且形成第一pn结pn1，该第一pn结pn1具有本体区115，该本体区115在相邻的补偿结构190之间的半导体台体170中延伸。本体区115形成第二pn结pn2，该第二pn结pn2具有源极区110，该源极区110夹设在第一表面101与本体区115之间。
在n沟道沟槽场板FET中，本体区115为p掺杂，并且源极区110和漂移区121为n掺杂。p沟道沟槽场板FET包括n掺杂本体区115和p掺杂源极区110以及p掺杂漂移区121。
补偿结构190可以具有近似竖直的侧壁，或者可以随着与第一表面101相距的距离的增加而成锥形。补偿结构190可以是条状的、并且彼此相距一定距离地沿着水平方向延伸，或者可以是点状的、并且按矩阵形式布置成行和列。
补偿结构190可以包括栅极电极155的部分、以及栅极电介质151的使栅极电极155与本体区115分离的部分。栅极电极155可以嵌入在补偿结构190中。根据其它实施例，栅极电极155的部分通过半导体台体170的第一台体部分而与补偿结构190间隔隔开，其中第一台体部分包括源极区110以及本体区115。栅极电极155包括包含材料的金属和/或重掺杂的多晶硅材料、或者由包含材料的金属和/或重掺杂多晶硅材料组成，并且电连接至或者耦合至栅极端子。
栅极电介质151可以包括半导体部分100的半导体材料的热氧化和/或氮化产生的热部分、和/或一个或者多个沉积的介电层。栅极电介质151将栅极电极155电容耦合至本体区115。在本体区115的直接邻接栅极电介质151的沟道部分中，施加至栅极端子G的电位可以累积少数载流子，以在晶体管单元TC的导通状态下在源极区110与漂移区121之间沿着栅极电介质151形成导电沟道。
补偿结构190进一步包括场电极165和场电介质161，该场电介质161将场电极165与漂移区121分离。场电极165包括重掺杂多晶硅材料和/或包含材料的金属。中间电介质145可以使场电极165与栅极电极155分离。场电介质161可以包括热生长部分和/或至少一个沉积介电层。
介电结构210可以使场电极155与金属结构350分离。举例说明，介电结构210可以包括，来自以下各项的、一个或者多个介电层：氧化硅、氮化硅、氮氧化硅、掺杂或者未掺杂硅酸玻璃，例如BSG(硼硅酸玻璃)、PSG(磷硅酸玻璃)或者BPSG(硼磷硅酸玻璃)。
金属结构350的部分形成接触部分355，该接触部分355延伸穿过在介电结构210中的开口，并且将金属结构350与源极区110并且与晶体管单元TC的本体区115电连接。如上所描述的包括至少金属扩散阻挡层321和粘附层325的辅助层堆叠320，使金属结构350与半导体部分100并且与介电结构210分离。
图6A至图6E涉及一种制造半导体器件的方法，该半导体器件具有通过辅助层堆叠连接至导电结构的金属结构。
图6A示出了由单晶半导体材料的半导体层100a组成或者包含单晶半导体材料的半导体层100a的半导体衬底500a。半导体衬底500a可以是从其获得多个相同半导体裸片的半导体晶片。举例说明，半导体层100a的半导体材料可以为硅(Si)、碳化硅(SiC)、锗(Ge)、硅锗晶体(SiGe)、氮化镓(GaN)或者砷化镓(GaAs)或者任何其它AIIIBIV半导体。
相对于半导体层100a的处理表面101a的垂直线定义出竖直方向，并且与竖直方向正交的方向为水平方向。
半导体层100a包括至少一个电子元件的半导电部分。例如，在半导体层100a中形成半导体二极管和/或多个晶体管单元TC。
可以在半导体层100a的处理表面101a上形成第一介电层210a。第一介电层210a可以包括以下各项或者由以下各项组成：热生长介电层、一个或者多个沉积层、或者热生长层和沉积介电层的组合，诸如，热生长氧化硅、氮化硅、氮氧化硅、硅酸玻璃(例如，BSG、PSG、BPSG、FSG、或者OSG、SOG)或者介电树脂。可以在第一介电层210a上形成布线线路152。布线线路可以由金属层(例如，包含铝、铜和/或钨的层)形成。可以将第二介电层220沉积到第一布线线路152和第一介电层210a上，并且可以通过光刻进行图案化以在第二介电层220a中形成使布线线路152的部分暴露出来的接触沟槽310。可以沉积前体阻挡层321a，该前体阻挡层321a内衬接触沟槽310并且覆盖第二介电层220a的剩余部分。
图6A示出了来自金属扩散抵抗材料的前体阻挡层321a，该金属扩散抵抗材料由以下各项中的至少一项组成或者包含以下各项中的至少一项：钛、氮化钛、钽、氮化钽、钨和钼。根据一个实施例，前体阻挡层321a是包含钨和钛(例如，大约90wt％的钨和大约10wt％的钛)的溅射层。前体阻挡层321a的层厚可以在从50nm至500nm的范围内。
将包含第二金属或者由第二金属组成的前体粘附层324a沉积在前体阻挡层321a上，并且将包含第一金属或者由第一金属组成的合金形成层326a沉积在前体粘附层324a上。例如，可以在相同的沉积真空工具处或者在相同的沉积真空腔室中，在随后的处理中，在无需使半导体衬底500a暴露于包含反应气体(诸如，氧气)的气氛的情况下，来执行前体阻挡层321a、前体粘附层324a和合金形成层326a的沉积。
图6B示出了在合金形成层326a与前体阻挡层321a之间的前体粘附层324a。根据一个实施例，可以将另外的层沉积在前体阻挡层321a、前体粘附层324a与合金形成层326a之间。在图示的实施例中，前体粘附层324a夹设在合金形成层326a与前体阻挡层321a之间。前体阻挡层324a的厚度可以在从5nm至500nm的范围内，例如，在从10nm至100nm的范围内。合金形成层326a的厚度可以在从5nm至500nm的范围内，例如，在从10nm至100nm的范围内。
在从300℃至450℃的范围内，例如，在从350℃至450℃的范围内的温度下，对半导体衬底500a进行热处理。例如，可以在用于沉积前体阻挡层321a、前体粘附层324a和合金形成层326a的相同工具处或者相同处理腔室中、在合金形成层326a的沉积与例如接续的热处理之间、没有使半导体衬底500a暴露于含氧的气氛的情况下，来执行该热处理。
该热处理在前体粘附层324a与前体阻挡层321a的成分之间生成键合。进一步地，前体粘附层324a和合金形成层326a形成金属间相或者合金。可以通过光刻来沉积并且图案化电镀掩膜层，以形成电镀掩膜410。
图6C示出了来自图6B的合金形成层326a和前体粘附层324a的通过热处理而形成的粘附层325a。根据涉及来自铝的前体粘附层324a和来自铜的合金形成层326a的一个实施例，粘附层325a是或者包含AlCu合金。电镀掩膜410使粘附层325a的包括并且围绕接触沟槽310的第一部分暴露出来，并且覆盖粘附层325a的第二部分。
通过电镀与最终金属结构的竖直延伸对应的厚度来沉积第一金属，其中第一金属选择性地沉积在粘附层325a的被电镀掩膜410暴露出来的第一部分中。
可以去除电镀掩膜410，并且可以去除通过去除电镀掩膜410而暴露出来的粘附层325a和前体阻挡层321a的部分。可以在至少400℃的温度下对半导体衬底500a进行进一步的热处理，从而使得第二金属的原子358可以扩散到第一金属中以形成金属结构350，该金属结构350基于第一金属并且包含第二金属的原子358。
图6E示出了辅助层堆叠320，该辅助层堆叠320至少包括图案化的粘附层325和图案化的金属扩散阻挡层321，该图案化金属扩散阻挡层321夹设在金属结构350与第二介电层220a之间、以及在金属结构350与布线线路152之间。金属结构350包括第二金属的原子358。
替代在布线线路152与金属结构350之间，辅助层堆叠320还可以形成在金属结构350与在半导体层100a中的掺杂区域之间。
图7A和图7B涉及不使用专用合金形成层的方法。
如参照图6A所描述的，形成前体阻挡层321a。如参照图6B所描述的，在前体阻挡层321a上形成薄的前体粘附层324a。可以在前体粘附层324a上形成电镀掩膜410。
图7A示出了具有最多20nm(例如，最多10nm)的厚度的薄前体粘附层324a。电镀掩膜410直接邻接前体粘附层324a。
如参照图6D所描述的，可以将第一金属电镀为与最终金属结构的竖直延伸相对应的厚度。在350℃与450℃之间的温度下的热处理，可以在前体阻挡层321a的至少一种成分与第二金属之间形成键合，并且通过使前体粘附层324a与第一金属合金化来形成粘附层。可以去除电镀掩膜410，并且可以去除通过去除电镀掩膜410而暴露出来的粘附层325a和前体阻挡层321a的部分。
图7B示出了来自第一金属和第二金属的金属间相的图案化粘附层325。利用较薄前体粘附层324a，由此产生的合金层仅仅具有小的竖直延伸，并且，在金属结构350中，第二金属的原子的总含量低。在金属结构350主要基于铜的情况下，第二金属不利地影响了铜的优越导电性和导热性以及热容量仅仅至低程度。
图8A至图8C涉及与附加阻挡层相关的制造方法。
如参照图6A所描述的，形成前体阻挡层321a。在前体阻挡层321a上形成前体粘附层324a，并且在前体粘附层324a上形合金形成层326a，如参照图6B所描述的。可以改变合金形成层326a和前体粘附层324a的沉积顺序，从而使得合金形成层326a形成在前体阻挡层321a上并且前体粘附层324a形成在合金形成层326a上。
图8A与图6B相对应，并且示出了合金形成层326和形成在前体阻挡层321a上的前体粘附层324a。
在合金形成层326a上，或者如果合金形成层326a在前体粘附层324a之前形成、则在前体粘附层324a上，形成附加阻挡层329a。通过合金形成层326a和前体粘附层324a，热处理形成第一金属和第二金属的合金的粘附层325a。可以在形成附加阻挡层329a之前、或者在形成附加阻挡层329a之后原位地，执行在350℃与450℃之间的温度下的热处理。
图8B示出了夹设在前体阻挡层321a与附加阻挡层329a之间的粘附层325a。
如参照图6D所描述的，可以电镀金属结构350。
由于附加阻挡层329a阻挡第二金属的原子的任何外扩散，所以在图8C中图示的金属结构350没有降低铜的优越导电性和导热性和热容量的任何污染。金属间相的形成仅仅发生在前体阻挡层321a与附加阻挡层329a之间。根据另一实施例，可以省略合金形成层的沉积，并且包含第二金属或者由第二金属组成但是不包含第一金属的层，在图案化的金属扩散阻挡层321与图案化的辅助阻挡层329之间。
虽然此处图示并且描述了具体实施例，但是本领域的技术人员应理解，在不背离本发明的范围下，可以用各种可替代的和/或等效的实施方式取代示出并且描述的具体实施例。本申请旨在涵盖本文所论述的各个具体实施例的任何改动和变型。因此，本发明旨在仅仅受到权利要求书及其等同物的限制。

Claims (23)

1.一种半导体器件，包括：
半导体裸片(900)，所述半导体裸片(900)包括导电结构(150)；
金属结构(350)，所述金属结构(350)电连接至所述导电结构(150)，并且包含第一金属作为主要成分，其中所述第一金属是铜或银；以及
辅助层堆叠(320)，所述辅助层堆叠(320)夹设在所述导电结构(150)与所述金属结构(350)之间，并且包括包含第二金属作为主要成分的粘附层(325)、以及在所述粘附层(325)与所述导电结构(150)之间的金属扩散阻挡层(321)，其中所述粘附层(325)的至少一部分包含固溶体和/或所述第一金属和所述第二金属的金属间相，并且所述第二金属的原子扩散到所述金属结构(350)中，其中所述第二金属与所述第一金属不同。
2.根据权利要求1所述的半导体器件，进一步包括：
介电钝化层(200)，所述介电钝化层(200)位于所述金属结构(350)与所述导电结构(150)之间，其中所述金属结构(350)通过在所述介电钝化层(200)中的开口而电连接至所述导电结构(150)。
3.根据上述权利要求中任一项所述的半导体器件，其中
所述半导体裸片(900)包括半导体部分(100)，所述半导体部分(100)包括形成所述导电结构(150)的掺杂区域(154)。
4.根据权利要求1至2中任一项所述的半导体器件，其中
所述半导体裸片(900)包括半导体部分(100)和布线线路(152)，所述布线线路(152)电连接至形成在所述半导体部分(100)中的掺杂区域(154)，所述布线线路(152)形成所述导电结构(150)。
5.根据权利要求1或2所述的半导体器件，其中
所述辅助层堆叠(320)包括辅助阻挡层(329)，所述辅助阻挡层(329)位于所述金属结构(350)与所述粘附层(325)之间。
6.根据权利要求1或2所述的半导体器件，其中
所述金属结构(350)包含所述第二金属。
7.根据权利要求1或2所述的半导体器件，其中
所述第一金属的杨氏模量大于所述第二金属的杨氏模量。
8.根据权利要求1或2所述的半导体器件，其中
所述金属扩散阻挡层(321)包含钨、钛、钽和氮中的至少一种。
9.根据权利要求1或2所述的半导体器件，其中
所述第二金属为铝、锡、锌、金、银、铅、镍和钛中的一种。
10.根据权利要求1或2所述的半导体器件，其中
在所述粘附层(325)中的所述第二金属的最大含量为99.95wt％。
11.根据权利要求1或2所述的半导体器件，其中
在所述粘附层(325)中的所述第二金属的最小含量为80wt％。
12.根据权利要求1或2所述的半导体器件，进一步包括：
晶体管单元(TC)，所述晶体管单元(TC)位于所述半导体裸片(900)中，所述晶体管单元(TC)适用于控制在所述半导体裸片(900)的第一侧处的所述金属结构(350)与在相对的第二侧处的另外的金属结构(390)之间的负载电流。
13.根据权利要求1或2所述的半导体器件，其中
所述第二金属的原子(358)在所述金属结构(350)的暴露的表面(351)处累积。
14.根据权利要求1或2所述的半导体器件，其中
在所述粘附层(325)与所述金属扩散阻挡层(321)之间的界面处，金属间相通过所述金属扩散阻挡层(321)的成分中的至少一种成分和所述第二金属形成。
15.根据权利要求1或2所述的半导体器件，其中
所述第二金属修饰在所述金属结构(350)中的裂纹和晶界中的至少一方。
16.根据权利要求1或2所述的半导体器件，其中
所述金属结构(350)包括：第一金属结构(350x)，所述第一金属结构(350x)电连接至在所述半导体裸片(900)的第一侧处的第一导电结构(150x)；以及第二金属结构(350y)，所述第二金属结构(350y)电连接至在所述半导体裸片(900)的与所述第一侧相对的第二侧处的第二导电结构(150y)；并且
所述辅助层堆叠(320)包括：第一辅助层堆叠(320x)，所述第一辅助层堆叠(320x)夹设在所述第一导电结构(150x)与所述第一金属结构(350x)之间；以及第二辅助层堆叠(320y)，所述第二辅助层堆叠(320y)夹设在所述第二导电结构(150y)与所述第二金属结构(350y)之间。
17.根据权利要求16所述的半导体器件，其中
所述第一金属结构和所述第二金属结构(350x、350y)包含相同的第一金属。
18.一种制造半导体器件的方法，所述方法包括：
形成包括导电结构(150)的半导体衬底(500a)；
在所述导电结构(150)的第一部分上形成前体辅助层堆叠(320a)，所述前体辅助层堆叠(320a)包括前体粘附层(324a)、在所述前体粘附层(324a)与所述导电结构(150)之间的前体阻挡层(321a)、以及在所述前体粘附层(324a)上的合金形成层(326a)，其中所述合金形成层(326a)包含第一金属作为主要成分并且所述前体粘附层(324a)包含第二金属作为主要成分；
通过热处理或激光处理由所述前体辅助层堆叠(320a)的部分形成粘附层(325a)，其中所述粘附层(325a)具有固溶体和/或所述第一金属和所述第二金属的金属间相；以及
形成包含所述第一金属作为主要成分的金属结构(350)，
其中所述第二金属与所述第一金属不同。
19.根据权利要求18所述的方法，其中
通过在不使所述半导体衬底(500a)暴露于反应气体的情况下、在相同的处理室中的连续的处理，形成辅助层堆叠(320)。
20.根据权利要求18或19所述的方法，其中
通过电镀所述第一金属而形成所述金属结构(350)。
21.根据权利要求18或19所述的方法，进一步包括：
将所述半导体衬底(500a)加热至如下这样的温度，在所述温度下形成包含所述前体阻挡层(321a)的至少一种成分和所述第二金属的金属间相。
22.根据权利要求19所述的方法，进一步包括：
在进行电镀之前，形成使所述前体辅助层堆叠(320a)的第一部分暴露出来并且覆盖所述前体辅助层堆叠(320a)的第二部分的电镀掩膜(450)，并且在进行电镀之后，去除所述电镀掩膜(450)、以及由于去除所述电镀掩膜(450)而暴露出来的所述辅助层堆叠(320)的部分。
23.根据权利要求18或19所述的方法，进一步包括：
在形成所述前体辅助层堆叠(320a)之前，形成介电钝化层(200a)，其中在所述介电钝化层(200a)中的开口将所述导电结构(150)的第一部分暴露出来。
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